pci/oxygen/xonar_cs43xx.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
0004  *
0005  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
0006  */
0007
0008 /*
0009  * Xonar D1/DX
0010  * -----------
0011  *
0012  * CMI8788:
0013  *
0014  *   I²C <-> CS4398 (addr 1001111) (front)
0015  *       <-> CS4362A (addr 0011000) (surround, center/LFE, back)
0016  *
0017  *   GPI 0 <- external power present (DX only)
0018  *
0019  *   GPIO 0 -> enable output to speakers
0020  *   GPIO 1 -> route output to front panel
0021  *   GPIO 2 -> M0 of CS5361
0022  *   GPIO 3 -> M1 of CS5361
0023  *   GPIO 6 -> ?
0024  *   GPIO 7 -> ?
0025  *   GPIO 8 -> route input jack to line-in (0) or mic-in (1)
0026  *
0027  * CM9780:
0028  *
0029  *   LINE_OUT -> input of ADC
0030  *
0031  *   AUX_IN  <- aux
0032  *   MIC_IN  <- mic
0033  *   FMIC_IN <- front mic
0034  *
0035  *   GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
0036  */
0037
0038 #include <linux/pci.h>
0039 #include <linux/delay.h>
0040 #include <sound/ac97_codec.h>
0041 #include <sound/control.h>
0042 #include <sound/core.h>
0043 #include <sound/pcm.h>
0044 #include <sound/pcm_params.h>
0045 #include <sound/tlv.h>
0046 #include "xonar.h"
0047 #include "cm9780.h"
0048 #include "cs4398.h"
0049 #include "cs4362a.h"
0050
0051 #define GPI_EXT_POWER       0x01
0052 #define GPIO_D1_OUTPUT_ENABLE   0x0001
0053 #define GPIO_D1_FRONT_PANEL 0x0002
0054 #define GPIO_D1_MAGIC       0x00c0
0055 #define GPIO_D1_INPUT_ROUTE 0x0100
0056
0057 #define I2C_DEVICE_CS4398   0x9e    /* 10011, AD1=1, AD0=1, /W=0 */
0058 #define I2C_DEVICE_CS4362A  0x30    /* 001100, AD0=0, /W=0 */
0059
0060 struct xonar_cs43xx {
0061     struct xonar_generic generic;
0062     u8 cs4398_regs[8];
0063     u8 cs4362a_regs[15];
0064 };
0065
0066 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
0067 {
0068     struct xonar_cs43xx *data = chip->model_data;
0069
0070     oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
0071     if (reg < ARRAY_SIZE(data->cs4398_regs))
0072         data->cs4398_regs[reg] = value;
0073 }
0074
0075 static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
0076 {
0077     struct xonar_cs43xx *data = chip->model_data;
0078
0079     if (value != data->cs4398_regs[reg])
0080         cs4398_write(chip, reg, value);
0081 }
0082
0083 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
0084 {
0085     struct xonar_cs43xx *data = chip->model_data;
0086
0087     oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
0088     if (reg < ARRAY_SIZE(data->cs4362a_regs))
0089         data->cs4362a_regs[reg] = value;
0090 }
0091
0092 static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
0093 {
0094     struct xonar_cs43xx *data = chip->model_data;
0095
0096     if (value != data->cs4362a_regs[reg])
0097         cs4362a_write(chip, reg, value);
0098 }
0099
0100 static void cs43xx_registers_init(struct oxygen *chip)
0101 {
0102     struct xonar_cs43xx *data = chip->model_data;
0103     unsigned int i;
0104
0105     /* set CPEN (control port mode) and power down */
0106     cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
0107     cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
0108     /* configure */
0109     cs4398_write(chip, 2, data->cs4398_regs[2]);
0110     cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
0111     cs4398_write(chip, 4, data->cs4398_regs[4]);
0112     cs4398_write(chip, 5, data->cs4398_regs[5]);
0113     cs4398_write(chip, 6, data->cs4398_regs[6]);
0114     cs4398_write(chip, 7, data->cs4398_regs[7]);
0115     cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
0116     cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
0117               CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
0118     cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
0119     cs4362a_write(chip, 0x05, 0);
0120     for (i = 6; i <= 14; ++i)
0121         cs4362a_write(chip, i, data->cs4362a_regs[i]);
0122     /* clear power down */
0123     cs4398_write(chip, 8, CS4398_CPEN);
0124     cs4362a_write(chip, 0x01, CS4362A_CPEN);
0125 }
0126
0127 static void xonar_d1_init(struct oxygen *chip)
0128 {
0129     struct xonar_cs43xx *data = chip->model_data;
0130
0131     data->generic.anti_pop_delay = 800;
0132     data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
0133     data->cs4398_regs[2] =
0134         CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
0135     data->cs4398_regs[4] = CS4398_MUTEP_LOW |
0136         CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
0137     data->cs4398_regs[5] = 60 * 2;
0138     data->cs4398_regs[6] = 60 * 2;
0139     data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
0140         CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
0141     data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
0142     data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
0143         CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
0144     data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
0145     data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
0146     data->cs4362a_regs[9] = data->cs4362a_regs[6];
0147     data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
0148     data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
0149     data->cs4362a_regs[12] = data->cs4362a_regs[6];
0150     data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
0151     data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
0152
0153     oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
0154                OXYGEN_2WIRE_LENGTH_8 |
0155                OXYGEN_2WIRE_INTERRUPT_MASK |
0156                OXYGEN_2WIRE_SPEED_FAST);
0157
0158     cs43xx_registers_init(chip);
0159
0160     oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
0161               GPIO_D1_FRONT_PANEL |
0162               GPIO_D1_MAGIC |
0163               GPIO_D1_INPUT_ROUTE);
0164     oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
0165                 GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
0166
0167     xonar_init_cs53x1(chip);
0168     xonar_enable_output(chip);
0169
0170     snd_component_add(chip->card, "CS4398");
0171     snd_component_add(chip->card, "CS4362A");
0172     snd_component_add(chip->card, "CS5361");
0173 }
0174
0175 static void xonar_dx_init(struct oxygen *chip)
0176 {
0177     struct xonar_cs43xx *data = chip->model_data;
0178
0179     data->generic.ext_power_reg = OXYGEN_GPI_DATA;
0180     data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
0181     data->generic.ext_power_bit = GPI_EXT_POWER;
0182     xonar_init_ext_power(chip);
0183     xonar_d1_init(chip);
0184 }
0185
0186 static void xonar_d1_cleanup(struct oxygen *chip)
0187 {
0188     xonar_disable_output(chip);
0189     cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
0190     oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
0191 }
0192
0193 static void xonar_d1_suspend(struct oxygen *chip)
0194 {
0195     xonar_d1_cleanup(chip);
0196 }
0197
0198 static void xonar_d1_resume(struct oxygen *chip)
0199 {
0200     oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
0201     msleep(1);
0202     cs43xx_registers_init(chip);
0203     xonar_enable_output(chip);
0204 }
0205
0206 static void set_cs43xx_params(struct oxygen *chip,
0207                   struct snd_pcm_hw_params *params)
0208 {
0209     struct xonar_cs43xx *data = chip->model_data;
0210     u8 cs4398_fm, cs4362a_fm;
0211
0212     if (params_rate(params) <= 50000) {
0213         cs4398_fm = CS4398_FM_SINGLE;
0214         cs4362a_fm = CS4362A_FM_SINGLE;
0215     } else if (params_rate(params) <= 100000) {
0216         cs4398_fm = CS4398_FM_DOUBLE;
0217         cs4362a_fm = CS4362A_FM_DOUBLE;
0218     } else {
0219         cs4398_fm = CS4398_FM_QUAD;
0220         cs4362a_fm = CS4362A_FM_QUAD;
0221     }
0222     cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
0223     cs4398_write_cached(chip, 2, cs4398_fm);
0224     cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
0225     cs4362a_write_cached(chip, 6, cs4362a_fm);
0226     cs4362a_write_cached(chip, 12, cs4362a_fm);
0227     cs4362a_fm &= CS4362A_FM_MASK;
0228     cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
0229     cs4362a_write_cached(chip, 9, cs4362a_fm);
0230 }
0231
0232 static void update_cs4362a_volumes(struct oxygen *chip)
0233 {
0234     unsigned int i;
0235     u8 mute;
0236
0237     mute = chip->dac_mute ? CS4362A_MUTE : 0;
0238     for (i = 0; i < 6; ++i)
0239         cs4362a_write_cached(chip, 7 + i + i / 2,
0240                      (127 - chip->dac_volume[2 + i]) | mute);
0241 }
0242
0243 static void update_cs43xx_volume(struct oxygen *chip)
0244 {
0245     cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
0246     cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
0247     update_cs4362a_volumes(chip);
0248 }
0249
0250 static void update_cs43xx_mute(struct oxygen *chip)
0251 {
0252     u8 reg;
0253
0254     reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
0255     if (chip->dac_mute)
0256         reg |= CS4398_MUTE_B | CS4398_MUTE_A;
0257     cs4398_write_cached(chip, 4, reg);
0258     update_cs4362a_volumes(chip);
0259 }
0260
0261 static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
0262 {
0263     struct xonar_cs43xx *data = chip->model_data;
0264     u8 reg;
0265
0266     reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
0267     if (mixed)
0268         reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
0269     else
0270         reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
0271     cs4362a_write_cached(chip, 9, reg);
0272 }
0273
0274 static const struct snd_kcontrol_new front_panel_switch = {
0275     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0276     .name = "Front Panel Playback Switch",
0277     .info = snd_ctl_boolean_mono_info,
0278     .get = xonar_gpio_bit_switch_get,
0279     .put = xonar_gpio_bit_switch_put,
0280     .private_value = GPIO_D1_FRONT_PANEL,
0281 };
0282
0283 static int rolloff_info(struct snd_kcontrol *ctl,
0284             struct snd_ctl_elem_info *info)
0285 {
0286     static const char *const names[2] = {
0287         "Fast Roll-off", "Slow Roll-off"
0288     };
0289
0290     return snd_ctl_enum_info(info, 1, 2, names);
0291 }
0292
0293 static int rolloff_get(struct snd_kcontrol *ctl,
0294                struct snd_ctl_elem_value *value)
0295 {
0296     struct oxygen *chip = ctl->private_data;
0297     struct xonar_cs43xx *data = chip->model_data;
0298
0299     value->value.enumerated.item[0] =
0300         (data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
0301     return 0;
0302 }
0303
0304 static int rolloff_put(struct snd_kcontrol *ctl,
0305                struct snd_ctl_elem_value *value)
0306 {
0307     struct oxygen *chip = ctl->private_data;
0308     struct xonar_cs43xx *data = chip->model_data;
0309     int changed;
0310     u8 reg;
0311
0312     mutex_lock(&chip->mutex);
0313     reg = data->cs4398_regs[7];
0314     if (value->value.enumerated.item[0])
0315         reg |= CS4398_FILT_SEL;
0316     else
0317         reg &= ~CS4398_FILT_SEL;
0318     changed = reg != data->cs4398_regs[7];
0319     if (changed) {
0320         cs4398_write(chip, 7, reg);
0321         if (reg & CS4398_FILT_SEL)
0322             reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
0323         else
0324             reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
0325         cs4362a_write(chip, 0x04, reg);
0326     }
0327     mutex_unlock(&chip->mutex);
0328     return changed;
0329 }
0330
0331 static const struct snd_kcontrol_new rolloff_control = {
0332     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0333     .name = "DAC Filter Playback Enum",
0334     .info = rolloff_info,
0335     .get = rolloff_get,
0336     .put = rolloff_put,
0337 };
0338
0339 static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
0340                       unsigned int reg, unsigned int mute)
0341 {
0342     if (reg == AC97_LINE) {
0343         spin_lock_irq(&chip->reg_lock);
0344         oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
0345                       mute ? GPIO_D1_INPUT_ROUTE : 0,
0346                       GPIO_D1_INPUT_ROUTE);
0347         spin_unlock_irq(&chip->reg_lock);
0348     }
0349 }
0350
0351 static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
0352
0353 static int xonar_d1_mixer_init(struct oxygen *chip)
0354 {
0355     int err;
0356
0357     err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
0358     if (err < 0)
0359         return err;
0360     err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
0361     if (err < 0)
0362         return err;
0363     return 0;
0364 }
0365
0366 static void dump_cs4362a_registers(struct xonar_cs43xx *data,
0367                    struct snd_info_buffer *buffer)
0368 {
0369     unsigned int i;
0370
0371     snd_iprintf(buffer, "\nCS4362A:");
0372     for (i = 1; i <= 14; ++i)
0373         snd_iprintf(buffer, " %02x", data->cs4362a_regs[i]);
0374     snd_iprintf(buffer, "\n");
0375 }
0376
0377 static void dump_d1_registers(struct oxygen *chip,
0378                   struct snd_info_buffer *buffer)
0379 {
0380     struct xonar_cs43xx *data = chip->model_data;
0381     unsigned int i;
0382
0383     snd_iprintf(buffer, "\nCS4398: 7?");
0384     for (i = 2; i < 8; ++i)
0385         snd_iprintf(buffer, " %02x", data->cs4398_regs[i]);
0386     snd_iprintf(buffer, "\n");
0387     dump_cs4362a_registers(data, buffer);
0388 }
0389
0390 static const struct oxygen_model model_xonar_d1 = {
0391     .longname = "Asus Virtuoso 100",
0392     .chip = "AV200",
0393     .init = xonar_d1_init,
0394     .mixer_init = xonar_d1_mixer_init,
0395     .cleanup = xonar_d1_cleanup,
0396     .suspend = xonar_d1_suspend,
0397     .resume = xonar_d1_resume,
0398     .set_dac_params = set_cs43xx_params,
0399     .set_adc_params = xonar_set_cs53x1_params,
0400     .update_dac_volume = update_cs43xx_volume,
0401     .update_dac_mute = update_cs43xx_mute,
0402     .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
0403     .ac97_switch = xonar_d1_line_mic_ac97_switch,
0404     .dump_registers = dump_d1_registers,
0405     .dac_tlv = cs4362a_db_scale,
0406     .model_data_size = sizeof(struct xonar_cs43xx),
0407     .device_config = PLAYBACK_0_TO_I2S |
0408              PLAYBACK_1_TO_SPDIF |
0409              CAPTURE_0_FROM_I2S_2 |
0410              CAPTURE_1_FROM_SPDIF |
0411              AC97_FMIC_SWITCH,
0412     .dac_channels_pcm = 8,
0413     .dac_channels_mixer = 8,
0414     .dac_volume_min = 127 - 60,
0415     .dac_volume_max = 127,
0416     .function_flags = OXYGEN_FUNCTION_2WIRE,
0417     .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
0418     .adc_mclks = OXYGEN_MCLKS(256, 128, 128),
0419     .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
0420     .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
0421 };
0422
0423 int get_xonar_cs43xx_model(struct oxygen *chip,
0424                const struct pci_device_id *id)
0425 {
0426     switch (id->subdevice) {
0427     case 0x834f:
0428         chip->model = model_xonar_d1;
0429         chip->model.shortname = "Xonar D1";
0430         break;
0431     case 0x8275:
0432     case 0x8327:
0433         chip->model = model_xonar_d1;
0434         chip->model.shortname = "Xonar DX";
0435         chip->model.init = xonar_dx_init;
0436         break;
0437     default:
0438         return -EINVAL;
0439     }
0440     return 0;
0441 }