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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * C-Media CMI8788 driver for C-Media's reference design and similar models
0004  *
0005  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
0006  */
0007 
0008 /*
0009  * CMI8788:
0010  *
0011  *   SPI 0 -> 1st AK4396 (front)
0012  *   SPI 1 -> 2nd AK4396 (surround)
0013  *   SPI 2 -> 3rd AK4396 (center/LFE)
0014  *   SPI 3 -> WM8785
0015  *   SPI 4 -> 4th AK4396 (back)
0016  *
0017  *   GPIO 0 -> DFS0 of AK5385
0018  *   GPIO 1 -> DFS1 of AK5385
0019  *
0020  * X-Meridian models:
0021  *   GPIO 4 -> enable extension S/PDIF input
0022  *   GPIO 6 -> enable on-board S/PDIF input
0023  *
0024  * Claro models:
0025  *   GPIO 6 -> S/PDIF from optical (0) or coaxial (1) input
0026  *   GPIO 8 -> enable headphone amplifier
0027  *
0028  * CM9780:
0029  *
0030  *   LINE_OUT -> input of ADC
0031  *
0032  *   AUX_IN <- aux
0033  *   CD_IN  <- CD
0034  *   MIC_IN <- mic
0035  *
0036  *   GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
0037  */
0038 
0039 #include <linux/delay.h>
0040 #include <linux/mutex.h>
0041 #include <linux/pci.h>
0042 #include <linux/module.h>
0043 #include <sound/ac97_codec.h>
0044 #include <sound/control.h>
0045 #include <sound/core.h>
0046 #include <sound/info.h>
0047 #include <sound/initval.h>
0048 #include <sound/pcm.h>
0049 #include <sound/pcm_params.h>
0050 #include <sound/tlv.h>
0051 #include "oxygen.h"
0052 #include "xonar_dg.h"
0053 #include "ak4396.h"
0054 #include "wm8785.h"
0055 
0056 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
0057 MODULE_DESCRIPTION("C-Media CMI8788 driver");
0058 MODULE_LICENSE("GPL v2");
0059 
0060 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
0061 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
0062 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
0063 
0064 module_param_array(index, int, NULL, 0444);
0065 MODULE_PARM_DESC(index, "card index");
0066 module_param_array(id, charp, NULL, 0444);
0067 MODULE_PARM_DESC(id, "ID string");
0068 module_param_array(enable, bool, NULL, 0444);
0069 MODULE_PARM_DESC(enable, "enable card");
0070 
0071 enum {
0072     MODEL_CMEDIA_REF,
0073     MODEL_MERIDIAN,
0074     MODEL_MERIDIAN_2G,
0075     MODEL_CLARO,
0076     MODEL_CLARO_HALO,
0077     MODEL_FANTASIA,
0078     MODEL_SERENADE,
0079     MODEL_2CH_OUTPUT,
0080     MODEL_HG2PCI,
0081     MODEL_XONAR_DG,
0082     MODEL_XONAR_DGX,
0083 };
0084 
0085 static const struct pci_device_id oxygen_ids[] = {
0086     /* C-Media's reference design */
0087     { OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
0088     { OXYGEN_PCI_SUBID(0x10b0, 0x0217), .driver_data = MODEL_CMEDIA_REF },
0089     { OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
0090     { OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
0091     { OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
0092     { OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
0093     { OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
0094     { OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
0095     { OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
0096     /* Asus Xonar DG */
0097     { OXYGEN_PCI_SUBID(0x1043, 0x8467), .driver_data = MODEL_XONAR_DG },
0098     /* Asus Xonar DGX */
0099     { OXYGEN_PCI_SUBID(0x1043, 0x8521), .driver_data = MODEL_XONAR_DGX },
0100     /* PCI 2.0 HD Audio */
0101     { OXYGEN_PCI_SUBID(0x13f6, 0x8782), .driver_data = MODEL_2CH_OUTPUT },
0102     /* Kuroutoshikou CMI8787-HG2PCI */
0103     { OXYGEN_PCI_SUBID(0x13f6, 0xffff), .driver_data = MODEL_HG2PCI },
0104     /* TempoTec HiFier Fantasia */
0105     { OXYGEN_PCI_SUBID(0x14c3, 0x1710), .driver_data = MODEL_FANTASIA },
0106     /* TempoTec HiFier Serenade */
0107     { OXYGEN_PCI_SUBID(0x14c3, 0x1711), .driver_data = MODEL_SERENADE },
0108     /* AuzenTech X-Meridian */
0109     { OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
0110     /* AuzenTech X-Meridian 2G */
0111     { OXYGEN_PCI_SUBID(0x5431, 0x017a), .driver_data = MODEL_MERIDIAN_2G },
0112     /* HT-Omega Claro */
0113     { OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
0114     /* HT-Omega Claro halo */
0115     { OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
0116     { }
0117 };
0118 MODULE_DEVICE_TABLE(pci, oxygen_ids);
0119 
0120 
0121 #define GPIO_AK5385_DFS_MASK    0x0003
0122 #define GPIO_AK5385_DFS_NORMAL  0x0000
0123 #define GPIO_AK5385_DFS_DOUBLE  0x0001
0124 #define GPIO_AK5385_DFS_QUAD    0x0002
0125 
0126 #define GPIO_MERIDIAN_DIG_MASK  0x0050
0127 #define GPIO_MERIDIAN_DIG_EXT   0x0010
0128 #define GPIO_MERIDIAN_DIG_BOARD 0x0040
0129 
0130 #define GPIO_CLARO_DIG_COAX 0x0040
0131 #define GPIO_CLARO_HP       0x0100
0132 
0133 struct generic_data {
0134     unsigned int dacs;
0135     u8 ak4396_regs[4][5];
0136     u16 wm8785_regs[3];
0137 };
0138 
0139 static void ak4396_write(struct oxygen *chip, unsigned int codec,
0140              u8 reg, u8 value)
0141 {
0142     /* maps ALSA channel pair number to SPI output */
0143     static const u8 codec_spi_map[4] = {
0144         0, 1, 2, 4
0145     };
0146     struct generic_data *data = chip->model_data;
0147 
0148     oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
0149              OXYGEN_SPI_DATA_LENGTH_2 |
0150              OXYGEN_SPI_CLOCK_160 |
0151              (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
0152              OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
0153              AK4396_WRITE | (reg << 8) | value);
0154     data->ak4396_regs[codec][reg] = value;
0155 }
0156 
0157 static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
0158                 u8 reg, u8 value)
0159 {
0160     struct generic_data *data = chip->model_data;
0161 
0162     if (value != data->ak4396_regs[codec][reg])
0163         ak4396_write(chip, codec, reg, value);
0164 }
0165 
0166 static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
0167 {
0168     struct generic_data *data = chip->model_data;
0169 
0170     oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
0171              OXYGEN_SPI_DATA_LENGTH_2 |
0172              OXYGEN_SPI_CLOCK_160 |
0173              (3 << OXYGEN_SPI_CODEC_SHIFT) |
0174              OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
0175              (reg << 9) | value);
0176     if (reg < ARRAY_SIZE(data->wm8785_regs))
0177         data->wm8785_regs[reg] = value;
0178 }
0179 
0180 static void ak4396_registers_init(struct oxygen *chip)
0181 {
0182     struct generic_data *data = chip->model_data;
0183     unsigned int i;
0184 
0185     for (i = 0; i < data->dacs; ++i) {
0186         ak4396_write(chip, i, AK4396_CONTROL_1,
0187                  AK4396_DIF_24_MSB | AK4396_RSTN);
0188         ak4396_write(chip, i, AK4396_CONTROL_2,
0189                  data->ak4396_regs[0][AK4396_CONTROL_2]);
0190         ak4396_write(chip, i, AK4396_CONTROL_3,
0191                  AK4396_PCM);
0192         ak4396_write(chip, i, AK4396_LCH_ATT,
0193                  chip->dac_volume[i * 2]);
0194         ak4396_write(chip, i, AK4396_RCH_ATT,
0195                  chip->dac_volume[i * 2 + 1]);
0196     }
0197 }
0198 
0199 static void ak4396_init(struct oxygen *chip)
0200 {
0201     struct generic_data *data = chip->model_data;
0202 
0203     data->dacs = chip->model.dac_channels_pcm / 2;
0204     data->ak4396_regs[0][AK4396_CONTROL_2] =
0205         AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
0206     ak4396_registers_init(chip);
0207     snd_component_add(chip->card, "AK4396");
0208 }
0209 
0210 static void ak5385_init(struct oxygen *chip)
0211 {
0212     oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
0213     oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
0214     snd_component_add(chip->card, "AK5385");
0215 }
0216 
0217 static void wm8785_registers_init(struct oxygen *chip)
0218 {
0219     struct generic_data *data = chip->model_data;
0220 
0221     wm8785_write(chip, WM8785_R7, 0);
0222     wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
0223     wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
0224 }
0225 
0226 static void wm8785_init(struct oxygen *chip)
0227 {
0228     struct generic_data *data = chip->model_data;
0229 
0230     data->wm8785_regs[0] =
0231         WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
0232     data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
0233     wm8785_registers_init(chip);
0234     snd_component_add(chip->card, "WM8785");
0235 }
0236 
0237 static void generic_init(struct oxygen *chip)
0238 {
0239     ak4396_init(chip);
0240     wm8785_init(chip);
0241 }
0242 
0243 static void meridian_init(struct oxygen *chip)
0244 {
0245     oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
0246               GPIO_MERIDIAN_DIG_MASK);
0247     oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
0248                   GPIO_MERIDIAN_DIG_BOARD, GPIO_MERIDIAN_DIG_MASK);
0249     ak4396_init(chip);
0250     ak5385_init(chip);
0251 }
0252 
0253 static void claro_enable_hp(struct oxygen *chip)
0254 {
0255     msleep(300);
0256     oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
0257     oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
0258 }
0259 
0260 static void claro_init(struct oxygen *chip)
0261 {
0262     oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
0263     oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
0264     ak4396_init(chip);
0265     wm8785_init(chip);
0266     claro_enable_hp(chip);
0267 }
0268 
0269 static void claro_halo_init(struct oxygen *chip)
0270 {
0271     oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_DIG_COAX);
0272     oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_DIG_COAX);
0273     ak4396_init(chip);
0274     ak5385_init(chip);
0275     claro_enable_hp(chip);
0276 }
0277 
0278 static void fantasia_init(struct oxygen *chip)
0279 {
0280     ak4396_init(chip);
0281     snd_component_add(chip->card, "CS5340");
0282 }
0283 
0284 static void stereo_output_init(struct oxygen *chip)
0285 {
0286     ak4396_init(chip);
0287 }
0288 
0289 static void generic_cleanup(struct oxygen *chip)
0290 {
0291 }
0292 
0293 static void claro_disable_hp(struct oxygen *chip)
0294 {
0295     oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
0296 }
0297 
0298 static void claro_cleanup(struct oxygen *chip)
0299 {
0300     claro_disable_hp(chip);
0301 }
0302 
0303 static void claro_suspend(struct oxygen *chip)
0304 {
0305     claro_disable_hp(chip);
0306 }
0307 
0308 static void generic_resume(struct oxygen *chip)
0309 {
0310     ak4396_registers_init(chip);
0311     wm8785_registers_init(chip);
0312 }
0313 
0314 static void meridian_resume(struct oxygen *chip)
0315 {
0316     ak4396_registers_init(chip);
0317 }
0318 
0319 static void claro_resume(struct oxygen *chip)
0320 {
0321     ak4396_registers_init(chip);
0322     claro_enable_hp(chip);
0323 }
0324 
0325 static void stereo_resume(struct oxygen *chip)
0326 {
0327     ak4396_registers_init(chip);
0328 }
0329 
0330 static void set_ak4396_params(struct oxygen *chip,
0331                   struct snd_pcm_hw_params *params)
0332 {
0333     struct generic_data *data = chip->model_data;
0334     unsigned int i;
0335     u8 value;
0336 
0337     value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
0338     if (params_rate(params) <= 54000)
0339         value |= AK4396_DFS_NORMAL;
0340     else if (params_rate(params) <= 108000)
0341         value |= AK4396_DFS_DOUBLE;
0342     else
0343         value |= AK4396_DFS_QUAD;
0344 
0345     msleep(1); /* wait for the new MCLK to become stable */
0346 
0347     if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
0348         for (i = 0; i < data->dacs; ++i) {
0349             ak4396_write(chip, i, AK4396_CONTROL_1,
0350                      AK4396_DIF_24_MSB);
0351             ak4396_write(chip, i, AK4396_CONTROL_2, value);
0352             ak4396_write(chip, i, AK4396_CONTROL_1,
0353                      AK4396_DIF_24_MSB | AK4396_RSTN);
0354         }
0355     }
0356 }
0357 
0358 static void update_ak4396_volume(struct oxygen *chip)
0359 {
0360     struct generic_data *data = chip->model_data;
0361     unsigned int i;
0362 
0363     for (i = 0; i < data->dacs; ++i) {
0364         ak4396_write_cached(chip, i, AK4396_LCH_ATT,
0365                     chip->dac_volume[i * 2]);
0366         ak4396_write_cached(chip, i, AK4396_RCH_ATT,
0367                     chip->dac_volume[i * 2 + 1]);
0368     }
0369 }
0370 
0371 static void update_ak4396_mute(struct oxygen *chip)
0372 {
0373     struct generic_data *data = chip->model_data;
0374     unsigned int i;
0375     u8 value;
0376 
0377     value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
0378     if (chip->dac_mute)
0379         value |= AK4396_SMUTE;
0380     for (i = 0; i < data->dacs; ++i)
0381         ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
0382 }
0383 
0384 static void set_wm8785_params(struct oxygen *chip,
0385                   struct snd_pcm_hw_params *params)
0386 {
0387     struct generic_data *data = chip->model_data;
0388     unsigned int value;
0389 
0390     value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
0391     if (params_rate(params) <= 48000)
0392         value |= WM8785_OSR_SINGLE;
0393     else if (params_rate(params) <= 96000)
0394         value |= WM8785_OSR_DOUBLE;
0395     else
0396         value |= WM8785_OSR_QUAD;
0397     if (value != data->wm8785_regs[0]) {
0398         wm8785_write(chip, WM8785_R7, 0);
0399         wm8785_write(chip, WM8785_R0, value);
0400         wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
0401     }
0402 }
0403 
0404 static void set_ak5385_params(struct oxygen *chip,
0405                   struct snd_pcm_hw_params *params)
0406 {
0407     unsigned int value;
0408 
0409     if (params_rate(params) <= 54000)
0410         value = GPIO_AK5385_DFS_NORMAL;
0411     else if (params_rate(params) <= 108000)
0412         value = GPIO_AK5385_DFS_DOUBLE;
0413     else
0414         value = GPIO_AK5385_DFS_QUAD;
0415     oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
0416                   value, GPIO_AK5385_DFS_MASK);
0417 }
0418 
0419 static void set_no_params(struct oxygen *chip, struct snd_pcm_hw_params *params)
0420 {
0421 }
0422 
0423 static int rolloff_info(struct snd_kcontrol *ctl,
0424             struct snd_ctl_elem_info *info)
0425 {
0426     static const char *const names[2] = {
0427         "Sharp Roll-off", "Slow Roll-off"
0428     };
0429 
0430     return snd_ctl_enum_info(info, 1, 2, names);
0431 }
0432 
0433 static int rolloff_get(struct snd_kcontrol *ctl,
0434                struct snd_ctl_elem_value *value)
0435 {
0436     struct oxygen *chip = ctl->private_data;
0437     struct generic_data *data = chip->model_data;
0438 
0439     value->value.enumerated.item[0] =
0440         (data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
0441     return 0;
0442 }
0443 
0444 static int rolloff_put(struct snd_kcontrol *ctl,
0445                struct snd_ctl_elem_value *value)
0446 {
0447     struct oxygen *chip = ctl->private_data;
0448     struct generic_data *data = chip->model_data;
0449     unsigned int i;
0450     int changed;
0451     u8 reg;
0452 
0453     mutex_lock(&chip->mutex);
0454     reg = data->ak4396_regs[0][AK4396_CONTROL_2];
0455     if (value->value.enumerated.item[0])
0456         reg |= AK4396_SLOW;
0457     else
0458         reg &= ~AK4396_SLOW;
0459     changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
0460     if (changed) {
0461         for (i = 0; i < data->dacs; ++i)
0462             ak4396_write(chip, i, AK4396_CONTROL_2, reg);
0463     }
0464     mutex_unlock(&chip->mutex);
0465     return changed;
0466 }
0467 
0468 static const struct snd_kcontrol_new rolloff_control = {
0469     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0470     .name = "DAC Filter Playback Enum",
0471     .info = rolloff_info,
0472     .get = rolloff_get,
0473     .put = rolloff_put,
0474 };
0475 
0476 static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
0477 {
0478     static const char *const names[2] = {
0479         "None", "High-pass Filter"
0480     };
0481 
0482     return snd_ctl_enum_info(info, 1, 2, names);
0483 }
0484 
0485 static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
0486 {
0487     struct oxygen *chip = ctl->private_data;
0488     struct generic_data *data = chip->model_data;
0489 
0490     value->value.enumerated.item[0] =
0491         (data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
0492     return 0;
0493 }
0494 
0495 static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
0496 {
0497     struct oxygen *chip = ctl->private_data;
0498     struct generic_data *data = chip->model_data;
0499     unsigned int reg;
0500     int changed;
0501 
0502     mutex_lock(&chip->mutex);
0503     reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
0504     if (value->value.enumerated.item[0])
0505         reg |= WM8785_HPFR | WM8785_HPFL;
0506     changed = reg != data->wm8785_regs[WM8785_R2];
0507     if (changed)
0508         wm8785_write(chip, WM8785_R2, reg);
0509     mutex_unlock(&chip->mutex);
0510     return changed;
0511 }
0512 
0513 static const struct snd_kcontrol_new hpf_control = {
0514     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0515     .name = "ADC Filter Capture Enum",
0516     .info = hpf_info,
0517     .get = hpf_get,
0518     .put = hpf_put,
0519 };
0520 
0521 static int meridian_dig_source_info(struct snd_kcontrol *ctl,
0522                     struct snd_ctl_elem_info *info)
0523 {
0524     static const char *const names[2] = { "On-board", "Extension" };
0525 
0526     return snd_ctl_enum_info(info, 1, 2, names);
0527 }
0528 
0529 static int claro_dig_source_info(struct snd_kcontrol *ctl,
0530                  struct snd_ctl_elem_info *info)
0531 {
0532     static const char *const names[2] = { "Optical", "Coaxial" };
0533 
0534     return snd_ctl_enum_info(info, 1, 2, names);
0535 }
0536 
0537 static int meridian_dig_source_get(struct snd_kcontrol *ctl,
0538                    struct snd_ctl_elem_value *value)
0539 {
0540     struct oxygen *chip = ctl->private_data;
0541 
0542     value->value.enumerated.item[0] =
0543         !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
0544            GPIO_MERIDIAN_DIG_EXT);
0545     return 0;
0546 }
0547 
0548 static int claro_dig_source_get(struct snd_kcontrol *ctl,
0549                 struct snd_ctl_elem_value *value)
0550 {
0551     struct oxygen *chip = ctl->private_data;
0552 
0553     value->value.enumerated.item[0] =
0554         !!(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
0555            GPIO_CLARO_DIG_COAX);
0556     return 0;
0557 }
0558 
0559 static int meridian_dig_source_put(struct snd_kcontrol *ctl,
0560                    struct snd_ctl_elem_value *value)
0561 {
0562     struct oxygen *chip = ctl->private_data;
0563     u16 old_reg, new_reg;
0564     int changed;
0565 
0566     mutex_lock(&chip->mutex);
0567     old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
0568     new_reg = old_reg & ~GPIO_MERIDIAN_DIG_MASK;
0569     if (value->value.enumerated.item[0] == 0)
0570         new_reg |= GPIO_MERIDIAN_DIG_BOARD;
0571     else
0572         new_reg |= GPIO_MERIDIAN_DIG_EXT;
0573     changed = new_reg != old_reg;
0574     if (changed)
0575         oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
0576     mutex_unlock(&chip->mutex);
0577     return changed;
0578 }
0579 
0580 static int claro_dig_source_put(struct snd_kcontrol *ctl,
0581                 struct snd_ctl_elem_value *value)
0582 {
0583     struct oxygen *chip = ctl->private_data;
0584     u16 old_reg, new_reg;
0585     int changed;
0586 
0587     mutex_lock(&chip->mutex);
0588     old_reg = oxygen_read16(chip, OXYGEN_GPIO_DATA);
0589     new_reg = old_reg & ~GPIO_CLARO_DIG_COAX;
0590     if (value->value.enumerated.item[0])
0591         new_reg |= GPIO_CLARO_DIG_COAX;
0592     changed = new_reg != old_reg;
0593     if (changed)
0594         oxygen_write16(chip, OXYGEN_GPIO_DATA, new_reg);
0595     mutex_unlock(&chip->mutex);
0596     return changed;
0597 }
0598 
0599 static const struct snd_kcontrol_new meridian_dig_source_control = {
0600     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0601     .name = "IEC958 Source Capture Enum",
0602     .info = meridian_dig_source_info,
0603     .get = meridian_dig_source_get,
0604     .put = meridian_dig_source_put,
0605 };
0606 
0607 static const struct snd_kcontrol_new claro_dig_source_control = {
0608     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0609     .name = "IEC958 Source Capture Enum",
0610     .info = claro_dig_source_info,
0611     .get = claro_dig_source_get,
0612     .put = claro_dig_source_put,
0613 };
0614 
0615 static int generic_mixer_init(struct oxygen *chip)
0616 {
0617     return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
0618 }
0619 
0620 static int generic_wm8785_mixer_init(struct oxygen *chip)
0621 {
0622     int err;
0623 
0624     err = generic_mixer_init(chip);
0625     if (err < 0)
0626         return err;
0627     err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
0628     if (err < 0)
0629         return err;
0630     return 0;
0631 }
0632 
0633 static int meridian_mixer_init(struct oxygen *chip)
0634 {
0635     int err;
0636 
0637     err = generic_mixer_init(chip);
0638     if (err < 0)
0639         return err;
0640     err = snd_ctl_add(chip->card,
0641               snd_ctl_new1(&meridian_dig_source_control, chip));
0642     if (err < 0)
0643         return err;
0644     return 0;
0645 }
0646 
0647 static int claro_mixer_init(struct oxygen *chip)
0648 {
0649     int err;
0650 
0651     err = generic_wm8785_mixer_init(chip);
0652     if (err < 0)
0653         return err;
0654     err = snd_ctl_add(chip->card,
0655               snd_ctl_new1(&claro_dig_source_control, chip));
0656     if (err < 0)
0657         return err;
0658     return 0;
0659 }
0660 
0661 static int claro_halo_mixer_init(struct oxygen *chip)
0662 {
0663     int err;
0664 
0665     err = generic_mixer_init(chip);
0666     if (err < 0)
0667         return err;
0668     err = snd_ctl_add(chip->card,
0669               snd_ctl_new1(&claro_dig_source_control, chip));
0670     if (err < 0)
0671         return err;
0672     return 0;
0673 }
0674 
0675 static void dump_ak4396_registers(struct oxygen *chip,
0676                   struct snd_info_buffer *buffer)
0677 {
0678     struct generic_data *data = chip->model_data;
0679     unsigned int dac, i;
0680 
0681     for (dac = 0; dac < data->dacs; ++dac) {
0682         snd_iprintf(buffer, "\nAK4396 %u:", dac + 1);
0683         for (i = 0; i < 5; ++i)
0684             snd_iprintf(buffer, " %02x", data->ak4396_regs[dac][i]);
0685     }
0686     snd_iprintf(buffer, "\n");
0687 }
0688 
0689 static void dump_wm8785_registers(struct oxygen *chip,
0690                   struct snd_info_buffer *buffer)
0691 {
0692     struct generic_data *data = chip->model_data;
0693     unsigned int i;
0694 
0695     snd_iprintf(buffer, "\nWM8785:");
0696     for (i = 0; i < 3; ++i)
0697         snd_iprintf(buffer, " %03x", data->wm8785_regs[i]);
0698     snd_iprintf(buffer, "\n");
0699 }
0700 
0701 static void dump_oxygen_registers(struct oxygen *chip,
0702                   struct snd_info_buffer *buffer)
0703 {
0704     dump_ak4396_registers(chip, buffer);
0705     dump_wm8785_registers(chip, buffer);
0706 }
0707 
0708 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
0709 
0710 static const struct oxygen_model model_generic = {
0711     .shortname = "C-Media CMI8788",
0712     .longname = "C-Media Oxygen HD Audio",
0713     .chip = "CMI8788",
0714     .init = generic_init,
0715     .mixer_init = generic_wm8785_mixer_init,
0716     .cleanup = generic_cleanup,
0717     .resume = generic_resume,
0718     .set_dac_params = set_ak4396_params,
0719     .set_adc_params = set_wm8785_params,
0720     .update_dac_volume = update_ak4396_volume,
0721     .update_dac_mute = update_ak4396_mute,
0722     .dump_registers = dump_oxygen_registers,
0723     .dac_tlv = ak4396_db_scale,
0724     .model_data_size = sizeof(struct generic_data),
0725     .device_config = PLAYBACK_0_TO_I2S |
0726              PLAYBACK_1_TO_SPDIF |
0727              PLAYBACK_2_TO_AC97_1 |
0728              CAPTURE_0_FROM_I2S_1 |
0729              CAPTURE_1_FROM_SPDIF |
0730              CAPTURE_2_FROM_AC97_1 |
0731              AC97_CD_INPUT,
0732     .dac_channels_pcm = 8,
0733     .dac_channels_mixer = 8,
0734     .dac_volume_min = 0,
0735     .dac_volume_max = 255,
0736     .function_flags = OXYGEN_FUNCTION_SPI |
0737               OXYGEN_FUNCTION_ENABLE_SPI_4_5,
0738     .dac_mclks = OXYGEN_MCLKS(256, 128, 128),
0739     .adc_mclks = OXYGEN_MCLKS(256, 256, 128),
0740     .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
0741     .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
0742 };
0743 
0744 static int get_oxygen_model(struct oxygen *chip,
0745                 const struct pci_device_id *id)
0746 {
0747     static const char *const names[] = {
0748         [MODEL_MERIDIAN]    = "AuzenTech X-Meridian",
0749         [MODEL_MERIDIAN_2G] = "AuzenTech X-Meridian 2G",
0750         [MODEL_CLARO]       = "HT-Omega Claro",
0751         [MODEL_CLARO_HALO]  = "HT-Omega Claro halo",
0752         [MODEL_FANTASIA]    = "TempoTec HiFier Fantasia",
0753         [MODEL_SERENADE]    = "TempoTec HiFier Serenade",
0754         [MODEL_HG2PCI]      = "CMI8787-HG2PCI",
0755         [MODEL_XONAR_DG]        = "Xonar DG",
0756         [MODEL_XONAR_DGX]       = "Xonar DGX",
0757     };
0758 
0759     chip->model = model_generic;
0760     switch (id->driver_data) {
0761     case MODEL_MERIDIAN:
0762     case MODEL_MERIDIAN_2G:
0763         chip->model.init = meridian_init;
0764         chip->model.mixer_init = meridian_mixer_init;
0765         chip->model.resume = meridian_resume;
0766         chip->model.set_adc_params = set_ak5385_params;
0767         chip->model.dump_registers = dump_ak4396_registers;
0768         chip->model.device_config = PLAYBACK_0_TO_I2S |
0769                         PLAYBACK_1_TO_SPDIF |
0770                         CAPTURE_0_FROM_I2S_2 |
0771                         CAPTURE_1_FROM_SPDIF;
0772         if (id->driver_data == MODEL_MERIDIAN)
0773             chip->model.device_config |= AC97_CD_INPUT;
0774         break;
0775     case MODEL_CLARO:
0776         chip->model.init = claro_init;
0777         chip->model.mixer_init = claro_mixer_init;
0778         chip->model.cleanup = claro_cleanup;
0779         chip->model.suspend = claro_suspend;
0780         chip->model.resume = claro_resume;
0781         break;
0782     case MODEL_CLARO_HALO:
0783         chip->model.init = claro_halo_init;
0784         chip->model.mixer_init = claro_halo_mixer_init;
0785         chip->model.cleanup = claro_cleanup;
0786         chip->model.suspend = claro_suspend;
0787         chip->model.resume = claro_resume;
0788         chip->model.set_adc_params = set_ak5385_params;
0789         chip->model.dump_registers = dump_ak4396_registers;
0790         chip->model.device_config = PLAYBACK_0_TO_I2S |
0791                         PLAYBACK_1_TO_SPDIF |
0792                         CAPTURE_0_FROM_I2S_2 |
0793                         CAPTURE_1_FROM_SPDIF;
0794         break;
0795     case MODEL_FANTASIA:
0796     case MODEL_SERENADE:
0797     case MODEL_2CH_OUTPUT:
0798     case MODEL_HG2PCI:
0799         chip->model.shortname = "C-Media CMI8787";
0800         chip->model.chip = "CMI8787";
0801         if (id->driver_data == MODEL_FANTASIA)
0802             chip->model.init = fantasia_init;
0803         else
0804             chip->model.init = stereo_output_init;
0805         chip->model.resume = stereo_resume;
0806         chip->model.mixer_init = generic_mixer_init;
0807         chip->model.set_adc_params = set_no_params;
0808         chip->model.dump_registers = dump_ak4396_registers;
0809         chip->model.device_config = PLAYBACK_0_TO_I2S |
0810                         PLAYBACK_1_TO_SPDIF;
0811         if (id->driver_data == MODEL_FANTASIA) {
0812             chip->model.device_config |= CAPTURE_0_FROM_I2S_1;
0813             chip->model.adc_mclks = OXYGEN_MCLKS(256, 128, 128);
0814         }
0815         chip->model.dac_channels_pcm = 2;
0816         chip->model.dac_channels_mixer = 2;
0817         break;
0818     case MODEL_XONAR_DG:
0819     case MODEL_XONAR_DGX:
0820         chip->model = model_xonar_dg;
0821         break;
0822     }
0823     if (id->driver_data == MODEL_MERIDIAN ||
0824         id->driver_data == MODEL_MERIDIAN_2G ||
0825         id->driver_data == MODEL_CLARO_HALO) {
0826         chip->model.misc_flags = OXYGEN_MISC_MIDI;
0827         chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
0828     }
0829     if (id->driver_data < ARRAY_SIZE(names) && names[id->driver_data])
0830         chip->model.shortname = names[id->driver_data];
0831     return 0;
0832 }
0833 
0834 static int generic_oxygen_probe(struct pci_dev *pci,
0835                 const struct pci_device_id *pci_id)
0836 {
0837     static int dev;
0838     int err;
0839 
0840     if (dev >= SNDRV_CARDS)
0841         return -ENODEV;
0842     if (!enable[dev]) {
0843         ++dev;
0844         return -ENOENT;
0845     }
0846     err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
0847                    oxygen_ids, get_oxygen_model);
0848     if (err >= 0)
0849         ++dev;
0850     return err;
0851 }
0852 
0853 static struct pci_driver oxygen_driver = {
0854     .name = KBUILD_MODNAME,
0855     .id_table = oxygen_ids,
0856     .probe = generic_oxygen_probe,
0857 #ifdef CONFIG_PM_SLEEP
0858     .driver = {
0859         .pm = &oxygen_pci_pm,
0860     },
0861 #endif
0862 };
0863 
0864 module_pci_driver(oxygen_driver);
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