pci/oxygen/cs4245.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #define CS4245_CHIP_ID      0x01
0003 #define CS4245_POWER_CTRL   0x02
0004 #define CS4245_DAC_CTRL_1   0x03
0005 #define CS4245_ADC_CTRL     0x04
0006 #define CS4245_MCLK_FREQ    0x05
0007 #define CS4245_SIGNAL_SEL   0x06
0008 #define CS4245_PGA_B_CTRL   0x07
0009 #define CS4245_PGA_A_CTRL   0x08
0010 #define CS4245_ANALOG_IN    0x09
0011 #define CS4245_DAC_A_CTRL   0x0a
0012 #define CS4245_DAC_B_CTRL   0x0b
0013 #define CS4245_DAC_CTRL_2   0x0c
0014 #define CS4245_INT_STATUS   0x0d
0015 #define CS4245_INT_MASK     0x0e
0016 #define CS4245_INT_MODE_MSB 0x0f
0017 #define CS4245_INT_MODE_LSB 0x10
0018
0019 /* Chip ID */
0020 #define CS4245_CHIP_PART_MASK   0xf0
0021 #define CS4245_CHIP_REV_MASK    0x0f
0022
0023 /* Power Control */
0024 #define CS4245_FREEZE       0x80
0025 #define CS4245_PDN_MIC      0x08
0026 #define CS4245_PDN_ADC      0x04
0027 #define CS4245_PDN_DAC      0x02
0028 #define CS4245_PDN      0x01
0029
0030 /* DAC Control */
0031 #define CS4245_DAC_FM_MASK  0xc0
0032 #define CS4245_DAC_FM_SINGLE    0x00
0033 #define CS4245_DAC_FM_DOUBLE    0x40
0034 #define CS4245_DAC_FM_QUAD  0x80
0035 #define CS4245_DAC_DIF_MASK 0x30
0036 #define CS4245_DAC_DIF_LJUST    0x00
0037 #define CS4245_DAC_DIF_I2S  0x10
0038 #define CS4245_DAC_DIF_RJUST_16 0x20
0039 #define CS4245_DAC_DIF_RJUST_24 0x30
0040 #define CS4245_RESERVED_1   0x08
0041 #define CS4245_MUTE_DAC     0x04
0042 #define CS4245_DEEMPH       0x02
0043 #define CS4245_DAC_MASTER   0x01
0044
0045 /* ADC Control */
0046 #define CS4245_ADC_FM_MASK  0xc0
0047 #define CS4245_ADC_FM_SINGLE    0x00
0048 #define CS4245_ADC_FM_DOUBLE    0x40
0049 #define CS4245_ADC_FM_QUAD  0x80
0050 #define CS4245_ADC_DIF_MASK 0x10
0051 #define CS4245_ADC_DIF_LJUST    0x00
0052 #define CS4245_ADC_DIF_I2S  0x10
0053 #define CS4245_MUTE_ADC     0x04
0054 #define CS4245_HPF_FREEZE   0x02
0055 #define CS4245_ADC_MASTER   0x01
0056
0057 /* MCLK Frequency */
0058 #define CS4245_MCLK1_MASK   0x70
0059 #define CS4245_MCLK1_SHIFT  4
0060 #define CS4245_MCLK2_MASK   0x07
0061 #define CS4245_MCLK2_SHIFT  0
0062 #define CS4245_MCLK_1       0
0063 #define CS4245_MCLK_1_5     1
0064 #define CS4245_MCLK_2       2
0065 #define CS4245_MCLK_3       3
0066 #define CS4245_MCLK_4       4
0067
0068 /* Signal Selection */
0069 #define CS4245_A_OUT_SEL_MASK   0x60
0070 #define CS4245_A_OUT_SEL_HIZ    0x00
0071 #define CS4245_A_OUT_SEL_DAC    0x20
0072 #define CS4245_A_OUT_SEL_PGA    0x40
0073 #define CS4245_LOOP     0x02
0074 #define CS4245_ASYNCH       0x01
0075
0076 /* Channel B/A PGA Control */
0077 #define CS4245_PGA_GAIN_MASK    0x3f
0078
0079 /* ADC Input Control */
0080 #define CS4245_PGA_SOFT     0x10
0081 #define CS4245_PGA_ZERO     0x08
0082 #define CS4245_SEL_MASK     0x07
0083 #define CS4245_SEL_MIC      0x00
0084 #define CS4245_SEL_INPUT_1  0x01
0085 #define CS4245_SEL_INPUT_2  0x02
0086 #define CS4245_SEL_INPUT_3  0x03
0087 #define CS4245_SEL_INPUT_4  0x04
0088 #define CS4245_SEL_INPUT_5  0x05
0089 #define CS4245_SEL_INPUT_6  0x06
0090
0091 /* DAC Channel A/B Volume Control */
0092 #define CS4245_VOL_MASK     0xff
0093
0094 /* DAC Control 2 */
0095 #define CS4245_DAC_SOFT     0x80
0096 #define CS4245_DAC_ZERO     0x40
0097 #define CS4245_INVERT_DAC   0x20
0098 #define CS4245_INT_ACTIVE_HIGH  0x01
0099
0100 /* Interrupt Status/Mask/Mode */
0101 #define CS4245_ADC_CLK_ERR  0x08
0102 #define CS4245_DAC_CLK_ERR  0x04
0103 #define CS4245_ADC_OVFL     0x02
0104 #define CS4245_ADC_UNDRFL   0x01
0105
0106 #define CS4245_SPI_ADDRESS_S    (0x9e << 16)
0107 #define CS4245_SPI_WRITE_S  (0 << 16)
0108
0109 #define CS4245_SPI_ADDRESS  0x9e
0110 #define CS4245_SPI_WRITE    0
0111 #define CS4245_SPI_READ     1