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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* 
0003  * Driver for NeoMagic 256AV and 256ZX chipsets.
0004  * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
0005  *
0006  * Based on nm256_audio.c OSS driver in linux kernel.
0007  * The original author of OSS nm256 driver wishes to remain anonymous,
0008  * so I just put my acknoledgment to him/her here.
0009  * The original author's web page is found at
0010  *  http://www.uglx.org/sony.html
0011  */
0012   
0013 #include <linux/io.h>
0014 #include <linux/delay.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/init.h>
0017 #include <linux/pci.h>
0018 #include <linux/slab.h>
0019 #include <linux/module.h>
0020 #include <linux/mutex.h>
0021 
0022 #include <sound/core.h>
0023 #include <sound/info.h>
0024 #include <sound/control.h>
0025 #include <sound/pcm.h>
0026 #include <sound/ac97_codec.h>
0027 #include <sound/initval.h>
0028 
0029 #define CARD_NAME "NeoMagic 256AV/ZX"
0030 #define DRIVER_NAME "NM256"
0031 
0032 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
0033 MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
0034 MODULE_LICENSE("GPL");
0035 
0036 /*
0037  * some compile conditions.
0038  */
0039 
0040 static int index = SNDRV_DEFAULT_IDX1;  /* Index */
0041 static char *id = SNDRV_DEFAULT_STR1;   /* ID for this card */
0042 static int playback_bufsize = 16;
0043 static int capture_bufsize = 16;
0044 static bool force_ac97;         /* disabled as default */
0045 static int buffer_top;          /* not specified */
0046 static bool use_cache;          /* disabled */
0047 static bool vaio_hack;          /* disabled */
0048 static bool reset_workaround;
0049 static bool reset_workaround_2;
0050 
0051 module_param(index, int, 0444);
0052 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
0053 module_param(id, charp, 0444);
0054 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
0055 module_param(playback_bufsize, int, 0444);
0056 MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
0057 module_param(capture_bufsize, int, 0444);
0058 MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
0059 module_param(force_ac97, bool, 0444);
0060 MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
0061 module_param(buffer_top, int, 0444);
0062 MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
0063 module_param(use_cache, bool, 0444);
0064 MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
0065 module_param(vaio_hack, bool, 0444);
0066 MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
0067 module_param(reset_workaround, bool, 0444);
0068 MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
0069 module_param(reset_workaround_2, bool, 0444);
0070 MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
0071 
0072 /* just for backward compatibility */
0073 static bool enable;
0074 module_param(enable, bool, 0444);
0075 
0076 
0077 
0078 /*
0079  * hw definitions
0080  */
0081 
0082 /* The BIOS signature. */
0083 #define NM_SIGNATURE 0x4e4d0000
0084 /* Signature mask. */
0085 #define NM_SIG_MASK 0xffff0000
0086 
0087 /* Size of the second memory area. */
0088 #define NM_PORT2_SIZE 4096
0089 
0090 /* The base offset of the mixer in the second memory area. */
0091 #define NM_MIXER_OFFSET 0x600
0092 
0093 /* The maximum size of a coefficient entry. */
0094 #define NM_MAX_PLAYBACK_COEF_SIZE   0x5000
0095 #define NM_MAX_RECORD_COEF_SIZE     0x1260
0096 
0097 /* The interrupt register. */
0098 #define NM_INT_REG 0xa04
0099 /* And its bits. */
0100 #define NM_PLAYBACK_INT 0x40
0101 #define NM_RECORD_INT 0x100
0102 #define NM_MISC_INT_1 0x4000
0103 #define NM_MISC_INT_2 0x1
0104 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
0105 
0106 /* The AV's "mixer ready" status bit and location. */
0107 #define NM_MIXER_STATUS_OFFSET 0xa04
0108 #define NM_MIXER_READY_MASK 0x0800
0109 #define NM_MIXER_PRESENCE 0xa06
0110 #define NM_PRESENCE_MASK 0x0050
0111 #define NM_PRESENCE_VALUE 0x0040
0112 
0113 /*
0114  * For the ZX.  It uses the same interrupt register, but it holds 32
0115  * bits instead of 16.
0116  */
0117 #define NM2_PLAYBACK_INT 0x10000
0118 #define NM2_RECORD_INT 0x80000
0119 #define NM2_MISC_INT_1 0x8
0120 #define NM2_MISC_INT_2 0x2
0121 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
0122 
0123 /* The ZX's "mixer ready" status bit and location. */
0124 #define NM2_MIXER_STATUS_OFFSET 0xa06
0125 #define NM2_MIXER_READY_MASK 0x0800
0126 
0127 /* The playback registers start from here. */
0128 #define NM_PLAYBACK_REG_OFFSET 0x0
0129 /* The record registers start from here. */
0130 #define NM_RECORD_REG_OFFSET 0x200
0131 
0132 /* The rate register is located 2 bytes from the start of the register area. */
0133 #define NM_RATE_REG_OFFSET 2
0134 
0135 /* Mono/stereo flag, number of bits on playback, and rate mask. */
0136 #define NM_RATE_STEREO 1
0137 #define NM_RATE_BITS_16 2
0138 #define NM_RATE_MASK 0xf0
0139 
0140 /* Playback enable register. */
0141 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
0142 #define NM_PLAYBACK_ENABLE_FLAG 1
0143 #define NM_PLAYBACK_ONESHOT 2
0144 #define NM_PLAYBACK_FREERUN 4
0145 
0146 /* Mutes the audio output. */
0147 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
0148 #define NM_AUDIO_MUTE_LEFT 0x8000
0149 #define NM_AUDIO_MUTE_RIGHT 0x0080
0150 
0151 /* Recording enable register. */
0152 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
0153 #define NM_RECORD_ENABLE_FLAG 1
0154 #define NM_RECORD_FREERUN 2
0155 
0156 /* coefficient buffer pointer */
0157 #define NM_COEFF_START_OFFSET   0x1c
0158 #define NM_COEFF_END_OFFSET 0x20
0159 
0160 /* DMA buffer offsets */
0161 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
0162 #define NM_RBUFFER_END   (NM_RECORD_REG_OFFSET + 0x10)
0163 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
0164 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
0165 
0166 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
0167 #define NM_PBUFFER_END   (NM_PLAYBACK_REG_OFFSET + 0x14)
0168 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
0169 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
0170 
0171 struct nm256_stream {
0172 
0173     struct nm256 *chip;
0174     struct snd_pcm_substream *substream;
0175     int running;
0176     int suspended;
0177     
0178     u32 buf;    /* offset from chip->buffer */
0179     int bufsize;    /* buffer size in bytes */
0180     void __iomem *bufptr;       /* mapped pointer */
0181     unsigned long bufptr_addr;  /* physical address of the mapped pointer */
0182 
0183     int dma_size;       /* buffer size of the substream in bytes */
0184     int period_size;    /* period size in bytes */
0185     int periods;        /* # of periods */
0186     int shift;      /* bit shifts */
0187     int cur_period;     /* current period # */
0188 
0189 };
0190 
0191 struct nm256 {
0192     
0193     struct snd_card *card;
0194 
0195     void __iomem *cport;        /* control port */
0196     unsigned long cport_addr;   /* physical address */
0197 
0198     void __iomem *buffer;       /* buffer */
0199     unsigned long buffer_addr;  /* buffer phyiscal address */
0200 
0201     u32 buffer_start;       /* start offset from pci resource 0 */
0202     u32 buffer_end;         /* end offset */
0203     u32 buffer_size;        /* total buffer size */
0204 
0205     u32 all_coeff_buf;      /* coefficient buffer */
0206     u32 coeff_buf[2];       /* coefficient buffer for each stream */
0207 
0208     unsigned int coeffs_current: 1; /* coeff. table is loaded? */
0209     unsigned int use_cache: 1;  /* use one big coef. table */
0210     unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
0211     unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
0212     unsigned int in_resume: 1;
0213 
0214     int mixer_base;         /* register offset of ac97 mixer */
0215     int mixer_status_offset;    /* offset of mixer status reg. */
0216     int mixer_status_mask;      /* bit mask to test the mixer status */
0217 
0218     int irq;
0219     int irq_acks;
0220     irq_handler_t interrupt;
0221     int badintrcount;       /* counter to check bogus interrupts */
0222     struct mutex irq_mutex;
0223 
0224     struct nm256_stream streams[2];
0225 
0226     struct snd_ac97 *ac97;
0227     unsigned short *ac97_regs; /* register caches, only for valid regs */
0228 
0229     struct snd_pcm *pcm;
0230 
0231     struct pci_dev *pci;
0232 
0233     spinlock_t reg_lock;
0234 
0235 };
0236 
0237 
0238 /*
0239  * include coefficient table
0240  */
0241 #include "nm256_coef.c"
0242 
0243 
0244 /*
0245  * PCI ids
0246  */
0247 static const struct pci_device_id snd_nm256_ids[] = {
0248     {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0},
0249     {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0},
0250     {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0},
0251     {0,},
0252 };
0253 
0254 MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
0255 
0256 
0257 /*
0258  * lowlvel stuffs
0259  */
0260 
0261 static inline u8
0262 snd_nm256_readb(struct nm256 *chip, int offset)
0263 {
0264     return readb(chip->cport + offset);
0265 }
0266 
0267 static inline u16
0268 snd_nm256_readw(struct nm256 *chip, int offset)
0269 {
0270     return readw(chip->cport + offset);
0271 }
0272 
0273 static inline u32
0274 snd_nm256_readl(struct nm256 *chip, int offset)
0275 {
0276     return readl(chip->cport + offset);
0277 }
0278 
0279 static inline void
0280 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
0281 {
0282     writeb(val, chip->cport + offset);
0283 }
0284 
0285 static inline void
0286 snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
0287 {
0288     writew(val, chip->cport + offset);
0289 }
0290 
0291 static inline void
0292 snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
0293 {
0294     writel(val, chip->cport + offset);
0295 }
0296 
0297 static inline void
0298 snd_nm256_write_buffer(struct nm256 *chip, const void *src, int offset, int size)
0299 {
0300     offset -= chip->buffer_start;
0301 #ifdef CONFIG_SND_DEBUG
0302     if (offset < 0 || offset >= chip->buffer_size) {
0303         dev_err(chip->card->dev,
0304             "write_buffer invalid offset = %d size = %d\n",
0305                offset, size);
0306         return;
0307     }
0308 #endif
0309     memcpy_toio(chip->buffer + offset, src, size);
0310 }
0311 
0312 /*
0313  * coefficient handlers -- what a magic!
0314  */
0315 
0316 static u16
0317 snd_nm256_get_start_offset(int which)
0318 {
0319     u16 offset = 0;
0320     while (which-- > 0)
0321         offset += coefficient_sizes[which];
0322     return offset;
0323 }
0324 
0325 static void
0326 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
0327 {
0328     u32 coeff_buf = chip->coeff_buf[stream];
0329     u16 offset = snd_nm256_get_start_offset(which);
0330     u16 size = coefficient_sizes[which];
0331 
0332     snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
0333     snd_nm256_writel(chip, port, coeff_buf);
0334     /* ???  Record seems to behave differently than playback.  */
0335     if (stream == SNDRV_PCM_STREAM_PLAYBACK)
0336         size--;
0337     snd_nm256_writel(chip, port + 4, coeff_buf + size);
0338 }
0339 
0340 static void
0341 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
0342 {
0343     /* The enable register for the specified engine.  */
0344     u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
0345                NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
0346     u32 addr = NM_COEFF_START_OFFSET;
0347 
0348     addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
0349          NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
0350 
0351     if (snd_nm256_readb(chip, poffset) & 1) {
0352         dev_dbg(chip->card->dev,
0353             "NM256: Engine was enabled while loading coefficients!\n");
0354         return;
0355     }
0356 
0357     /* The recording engine uses coefficient values 8-15.  */
0358     number &= 7;
0359     if (stream == SNDRV_PCM_STREAM_CAPTURE)
0360         number += 8;
0361 
0362     if (! chip->use_cache) {
0363         snd_nm256_load_one_coefficient(chip, stream, addr, number);
0364         return;
0365     }
0366     if (! chip->coeffs_current) {
0367         snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
0368                        NM_TOTAL_COEFF_COUNT * 4);
0369         chip->coeffs_current = 1;
0370     } else {
0371         u32 base = chip->all_coeff_buf;
0372         u32 offset = snd_nm256_get_start_offset(number);
0373         u32 end_offset = offset + coefficient_sizes[number];
0374         snd_nm256_writel(chip, addr, base + offset);
0375         if (stream == SNDRV_PCM_STREAM_PLAYBACK)
0376             end_offset--;
0377         snd_nm256_writel(chip, addr + 4, base + end_offset);
0378     }
0379 }
0380 
0381 
0382 /* The actual rates supported by the card. */
0383 static const unsigned int samplerates[8] = {
0384     8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
0385 };
0386 static const struct snd_pcm_hw_constraint_list constraints_rates = {
0387     .count = ARRAY_SIZE(samplerates), 
0388     .list = samplerates,
0389     .mask = 0,
0390 };
0391 
0392 /*
0393  * return the index of the target rate
0394  */
0395 static int
0396 snd_nm256_fixed_rate(unsigned int rate)
0397 {
0398     unsigned int i;
0399     for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
0400         if (rate == samplerates[i])
0401             return i;
0402     }
0403     snd_BUG();
0404     return 0;
0405 }
0406 
0407 /*
0408  * set sample rate and format
0409  */
0410 static void
0411 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
0412              struct snd_pcm_substream *substream)
0413 {
0414     struct snd_pcm_runtime *runtime = substream->runtime;
0415     int rate_index = snd_nm256_fixed_rate(runtime->rate);
0416     unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
0417 
0418     s->shift = 0;
0419     if (snd_pcm_format_width(runtime->format) == 16) {
0420         ratebits |= NM_RATE_BITS_16;
0421         s->shift++;
0422     }
0423     if (runtime->channels > 1) {
0424         ratebits |= NM_RATE_STEREO;
0425         s->shift++;
0426     }
0427 
0428     runtime->rate = samplerates[rate_index];
0429 
0430     switch (substream->stream) {
0431     case SNDRV_PCM_STREAM_PLAYBACK:
0432         snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
0433         snd_nm256_writeb(chip,
0434                  NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
0435                  ratebits);
0436         break;
0437     case SNDRV_PCM_STREAM_CAPTURE:
0438         snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
0439         snd_nm256_writeb(chip,
0440                  NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
0441                  ratebits);
0442         break;
0443     }
0444 }
0445 
0446 /* acquire interrupt */
0447 static int snd_nm256_acquire_irq(struct nm256 *chip)
0448 {
0449     mutex_lock(&chip->irq_mutex);
0450     if (chip->irq < 0) {
0451         if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
0452                 KBUILD_MODNAME, chip)) {
0453             dev_err(chip->card->dev,
0454                 "unable to grab IRQ %d\n", chip->pci->irq);
0455             mutex_unlock(&chip->irq_mutex);
0456             return -EBUSY;
0457         }
0458         chip->irq = chip->pci->irq;
0459         chip->card->sync_irq = chip->irq;
0460     }
0461     chip->irq_acks++;
0462     mutex_unlock(&chip->irq_mutex);
0463     return 0;
0464 }
0465 
0466 /* release interrupt */
0467 static void snd_nm256_release_irq(struct nm256 *chip)
0468 {
0469     mutex_lock(&chip->irq_mutex);
0470     if (chip->irq_acks > 0)
0471         chip->irq_acks--;
0472     if (chip->irq_acks == 0 && chip->irq >= 0) {
0473         free_irq(chip->irq, chip);
0474         chip->irq = -1;
0475         chip->card->sync_irq = -1;
0476     }
0477     mutex_unlock(&chip->irq_mutex);
0478 }
0479 
0480 /*
0481  * start / stop
0482  */
0483 
0484 /* update the watermark (current period) */
0485 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
0486 {
0487     s->cur_period++;
0488     s->cur_period %= s->periods;
0489     snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
0490 }
0491 
0492 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
0493 #define snd_nm256_capture_mark(chip, s)  snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
0494 
0495 static void
0496 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
0497              struct snd_pcm_substream *substream)
0498 {
0499     /* program buffer pointers */
0500     snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
0501     snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
0502     snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
0503     snd_nm256_playback_mark(chip, s);
0504 
0505     /* Enable playback engine and interrupts. */
0506     snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
0507              NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
0508     /* Enable both channels. */
0509     snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
0510 }
0511 
0512 static void
0513 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
0514             struct snd_pcm_substream *substream)
0515 {
0516     /* program buffer pointers */
0517     snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
0518     snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
0519     snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
0520     snd_nm256_capture_mark(chip, s);
0521 
0522     /* Enable playback engine and interrupts. */
0523     snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
0524              NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
0525 }
0526 
0527 /* Stop the play engine. */
0528 static void
0529 snd_nm256_playback_stop(struct nm256 *chip)
0530 {
0531     /* Shut off sound from both channels. */
0532     snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
0533              NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
0534     /* Disable play engine. */
0535     snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
0536 }
0537 
0538 static void
0539 snd_nm256_capture_stop(struct nm256 *chip)
0540 {
0541     /* Disable recording engine. */
0542     snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
0543 }
0544 
0545 static int
0546 snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
0547 {
0548     struct nm256 *chip = snd_pcm_substream_chip(substream);
0549     struct nm256_stream *s = substream->runtime->private_data;
0550     int err = 0;
0551 
0552     if (snd_BUG_ON(!s))
0553         return -ENXIO;
0554 
0555     spin_lock(&chip->reg_lock);
0556     switch (cmd) {
0557     case SNDRV_PCM_TRIGGER_RESUME:
0558         s->suspended = 0;
0559         fallthrough;
0560     case SNDRV_PCM_TRIGGER_START:
0561         if (! s->running) {
0562             snd_nm256_playback_start(chip, s, substream);
0563             s->running = 1;
0564         }
0565         break;
0566     case SNDRV_PCM_TRIGGER_SUSPEND:
0567         s->suspended = 1;
0568         fallthrough;
0569     case SNDRV_PCM_TRIGGER_STOP:
0570         if (s->running) {
0571             snd_nm256_playback_stop(chip);
0572             s->running = 0;
0573         }
0574         break;
0575     default:
0576         err = -EINVAL;
0577         break;
0578     }
0579     spin_unlock(&chip->reg_lock);
0580     return err;
0581 }
0582 
0583 static int
0584 snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
0585 {
0586     struct nm256 *chip = snd_pcm_substream_chip(substream);
0587     struct nm256_stream *s = substream->runtime->private_data;
0588     int err = 0;
0589 
0590     if (snd_BUG_ON(!s))
0591         return -ENXIO;
0592 
0593     spin_lock(&chip->reg_lock);
0594     switch (cmd) {
0595     case SNDRV_PCM_TRIGGER_START:
0596     case SNDRV_PCM_TRIGGER_RESUME:
0597         if (! s->running) {
0598             snd_nm256_capture_start(chip, s, substream);
0599             s->running = 1;
0600         }
0601         break;
0602     case SNDRV_PCM_TRIGGER_STOP:
0603     case SNDRV_PCM_TRIGGER_SUSPEND:
0604         if (s->running) {
0605             snd_nm256_capture_stop(chip);
0606             s->running = 0;
0607         }
0608         break;
0609     default:
0610         err = -EINVAL;
0611         break;
0612     }
0613     spin_unlock(&chip->reg_lock);
0614     return err;
0615 }
0616 
0617 
0618 /*
0619  * prepare playback/capture channel
0620  */
0621 static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
0622 {
0623     struct nm256 *chip = snd_pcm_substream_chip(substream);
0624     struct snd_pcm_runtime *runtime = substream->runtime;
0625     struct nm256_stream *s = runtime->private_data;
0626 
0627     if (snd_BUG_ON(!s))
0628         return -ENXIO;
0629     s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
0630     s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
0631     s->periods = substream->runtime->periods;
0632     s->cur_period = 0;
0633 
0634     spin_lock_irq(&chip->reg_lock);
0635     s->running = 0;
0636     snd_nm256_set_format(chip, s, substream);
0637     spin_unlock_irq(&chip->reg_lock);
0638 
0639     return 0;
0640 }
0641 
0642 
0643 /*
0644  * get the current pointer
0645  */
0646 static snd_pcm_uframes_t
0647 snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
0648 {
0649     struct nm256 *chip = snd_pcm_substream_chip(substream);
0650     struct nm256_stream *s = substream->runtime->private_data;
0651     unsigned long curp;
0652 
0653     if (snd_BUG_ON(!s))
0654         return 0;
0655     curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
0656     curp %= s->dma_size;
0657     return bytes_to_frames(substream->runtime, curp);
0658 }
0659 
0660 static snd_pcm_uframes_t
0661 snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
0662 {
0663     struct nm256 *chip = snd_pcm_substream_chip(substream);
0664     struct nm256_stream *s = substream->runtime->private_data;
0665     unsigned long curp;
0666 
0667     if (snd_BUG_ON(!s))
0668         return 0;
0669     curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
0670     curp %= s->dma_size;    
0671     return bytes_to_frames(substream->runtime, curp);
0672 }
0673 
0674 /* Remapped I/O space can be accessible as pointer on i386 */
0675 /* This might be changed in the future */
0676 #ifndef __i386__
0677 /*
0678  * silence / copy for playback
0679  */
0680 static int
0681 snd_nm256_playback_silence(struct snd_pcm_substream *substream,
0682                int channel, unsigned long pos, unsigned long count)
0683 {
0684     struct snd_pcm_runtime *runtime = substream->runtime;
0685     struct nm256_stream *s = runtime->private_data;
0686 
0687     memset_io(s->bufptr + pos, 0, count);
0688     return 0;
0689 }
0690 
0691 static int
0692 snd_nm256_playback_copy(struct snd_pcm_substream *substream,
0693             int channel, unsigned long pos,
0694             void __user *src, unsigned long count)
0695 {
0696     struct snd_pcm_runtime *runtime = substream->runtime;
0697     struct nm256_stream *s = runtime->private_data;
0698 
0699     if (copy_from_user_toio(s->bufptr + pos, src, count))
0700         return -EFAULT;
0701     return 0;
0702 }
0703 
0704 static int
0705 snd_nm256_playback_copy_kernel(struct snd_pcm_substream *substream,
0706                    int channel, unsigned long pos,
0707                    void *src, unsigned long count)
0708 {
0709     struct snd_pcm_runtime *runtime = substream->runtime;
0710     struct nm256_stream *s = runtime->private_data;
0711 
0712     memcpy_toio(s->bufptr + pos, src, count);
0713     return 0;
0714 }
0715 
0716 /*
0717  * copy to user
0718  */
0719 static int
0720 snd_nm256_capture_copy(struct snd_pcm_substream *substream,
0721                int channel, unsigned long pos,
0722                void __user *dst, unsigned long count)
0723 {
0724     struct snd_pcm_runtime *runtime = substream->runtime;
0725     struct nm256_stream *s = runtime->private_data;
0726 
0727     if (copy_to_user_fromio(dst, s->bufptr + pos, count))
0728         return -EFAULT;
0729     return 0;
0730 }
0731 
0732 static int
0733 snd_nm256_capture_copy_kernel(struct snd_pcm_substream *substream,
0734                   int channel, unsigned long pos,
0735                   void *dst, unsigned long count)
0736 {
0737     struct snd_pcm_runtime *runtime = substream->runtime;
0738     struct nm256_stream *s = runtime->private_data;
0739 
0740     memcpy_fromio(dst, s->bufptr + pos, count);
0741     return 0;
0742 }
0743 
0744 #endif /* !__i386__ */
0745 
0746 
0747 /*
0748  * update playback/capture watermarks
0749  */
0750 
0751 /* spinlock held! */
0752 static void
0753 snd_nm256_playback_update(struct nm256 *chip)
0754 {
0755     struct nm256_stream *s;
0756 
0757     s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
0758     if (s->running && s->substream) {
0759         spin_unlock(&chip->reg_lock);
0760         snd_pcm_period_elapsed(s->substream);
0761         spin_lock(&chip->reg_lock);
0762         snd_nm256_playback_mark(chip, s);
0763     }
0764 }
0765 
0766 /* spinlock held! */
0767 static void
0768 snd_nm256_capture_update(struct nm256 *chip)
0769 {
0770     struct nm256_stream *s;
0771 
0772     s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
0773     if (s->running && s->substream) {
0774         spin_unlock(&chip->reg_lock);
0775         snd_pcm_period_elapsed(s->substream);
0776         spin_lock(&chip->reg_lock);
0777         snd_nm256_capture_mark(chip, s);
0778     }
0779 }
0780 
0781 /*
0782  * hardware info
0783  */
0784 static const struct snd_pcm_hardware snd_nm256_playback =
0785 {
0786     .info =         SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
0787                 SNDRV_PCM_INFO_INTERLEAVED |
0788                 /*SNDRV_PCM_INFO_PAUSE |*/
0789                 SNDRV_PCM_INFO_RESUME,
0790     .formats =      SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
0791     .rates =        SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
0792     .rate_min =     8000,
0793     .rate_max =     48000,
0794     .channels_min =     1,
0795     .channels_max =     2,
0796     .periods_min =      2,
0797     .periods_max =      1024,
0798     .buffer_bytes_max = 128 * 1024,
0799     .period_bytes_min = 256,
0800     .period_bytes_max = 128 * 1024,
0801 };
0802 
0803 static const struct snd_pcm_hardware snd_nm256_capture =
0804 {
0805     .info =         SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
0806                 SNDRV_PCM_INFO_INTERLEAVED |
0807                 /*SNDRV_PCM_INFO_PAUSE |*/
0808                 SNDRV_PCM_INFO_RESUME,
0809     .formats =      SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
0810     .rates =        SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
0811     .rate_min =     8000,
0812     .rate_max =     48000,
0813     .channels_min =     1,
0814     .channels_max =     2,
0815     .periods_min =      2,
0816     .periods_max =      1024,
0817     .buffer_bytes_max = 128 * 1024,
0818     .period_bytes_min = 256,
0819     .period_bytes_max = 128 * 1024,
0820 };
0821 
0822 
0823 /* set dma transfer size */
0824 static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
0825                    struct snd_pcm_hw_params *hw_params)
0826 {
0827     /* area and addr are already set and unchanged */
0828     substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
0829     return 0;
0830 }
0831 
0832 /*
0833  * open
0834  */
0835 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
0836                    struct snd_pcm_substream *substream,
0837                    const struct snd_pcm_hardware *hw_ptr)
0838 {
0839     struct snd_pcm_runtime *runtime = substream->runtime;
0840 
0841     s->running = 0;
0842     runtime->hw = *hw_ptr;
0843     runtime->hw.buffer_bytes_max = s->bufsize;
0844     runtime->hw.period_bytes_max = s->bufsize / 2;
0845     runtime->dma_area = (void __force *) s->bufptr;
0846     runtime->dma_addr = s->bufptr_addr;
0847     runtime->dma_bytes = s->bufsize;
0848     runtime->private_data = s;
0849     s->substream = substream;
0850 
0851     snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
0852                    &constraints_rates);
0853 }
0854 
0855 static int
0856 snd_nm256_playback_open(struct snd_pcm_substream *substream)
0857 {
0858     struct nm256 *chip = snd_pcm_substream_chip(substream);
0859 
0860     if (snd_nm256_acquire_irq(chip) < 0)
0861         return -EBUSY;
0862     snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
0863                    substream, &snd_nm256_playback);
0864     return 0;
0865 }
0866 
0867 static int
0868 snd_nm256_capture_open(struct snd_pcm_substream *substream)
0869 {
0870     struct nm256 *chip = snd_pcm_substream_chip(substream);
0871 
0872     if (snd_nm256_acquire_irq(chip) < 0)
0873         return -EBUSY;
0874     snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
0875                    substream, &snd_nm256_capture);
0876     return 0;
0877 }
0878 
0879 /*
0880  * close - we don't have to do special..
0881  */
0882 static int
0883 snd_nm256_playback_close(struct snd_pcm_substream *substream)
0884 {
0885     struct nm256 *chip = snd_pcm_substream_chip(substream);
0886 
0887     snd_nm256_release_irq(chip);
0888     return 0;
0889 }
0890 
0891 
0892 static int
0893 snd_nm256_capture_close(struct snd_pcm_substream *substream)
0894 {
0895     struct nm256 *chip = snd_pcm_substream_chip(substream);
0896 
0897     snd_nm256_release_irq(chip);
0898     return 0;
0899 }
0900 
0901 /*
0902  * create a pcm instance
0903  */
0904 static const struct snd_pcm_ops snd_nm256_playback_ops = {
0905     .open =     snd_nm256_playback_open,
0906     .close =    snd_nm256_playback_close,
0907     .hw_params =    snd_nm256_pcm_hw_params,
0908     .prepare =  snd_nm256_pcm_prepare,
0909     .trigger =  snd_nm256_playback_trigger,
0910     .pointer =  snd_nm256_playback_pointer,
0911 #ifndef __i386__
0912     .copy_user =    snd_nm256_playback_copy,
0913     .copy_kernel =  snd_nm256_playback_copy_kernel,
0914     .fill_silence = snd_nm256_playback_silence,
0915 #endif
0916     .mmap =     snd_pcm_lib_mmap_iomem,
0917 };
0918 
0919 static const struct snd_pcm_ops snd_nm256_capture_ops = {
0920     .open =     snd_nm256_capture_open,
0921     .close =    snd_nm256_capture_close,
0922     .hw_params =    snd_nm256_pcm_hw_params,
0923     .prepare =  snd_nm256_pcm_prepare,
0924     .trigger =  snd_nm256_capture_trigger,
0925     .pointer =  snd_nm256_capture_pointer,
0926 #ifndef __i386__
0927     .copy_user =    snd_nm256_capture_copy,
0928     .copy_kernel =  snd_nm256_capture_copy_kernel,
0929 #endif
0930     .mmap =     snd_pcm_lib_mmap_iomem,
0931 };
0932 
0933 static int
0934 snd_nm256_pcm(struct nm256 *chip, int device)
0935 {
0936     struct snd_pcm *pcm;
0937     int i, err;
0938 
0939     for (i = 0; i < 2; i++) {
0940         struct nm256_stream *s = &chip->streams[i];
0941         s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
0942         s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
0943     }
0944 
0945     err = snd_pcm_new(chip->card, chip->card->driver, device,
0946               1, 1, &pcm);
0947     if (err < 0)
0948         return err;
0949 
0950     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
0951     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
0952 
0953     pcm->private_data = chip;
0954     pcm->info_flags = 0;
0955     chip->pcm = pcm;
0956 
0957     return 0;
0958 }
0959 
0960 
0961 /* 
0962  * Initialize the hardware. 
0963  */
0964 static void
0965 snd_nm256_init_chip(struct nm256 *chip)
0966 {
0967     /* Reset everything. */
0968     snd_nm256_writeb(chip, 0x0, 0x11);
0969     snd_nm256_writew(chip, 0x214, 0);
0970     /* stop sounds.. */
0971     //snd_nm256_playback_stop(chip);
0972     //snd_nm256_capture_stop(chip);
0973 }
0974 
0975 
0976 static irqreturn_t
0977 snd_nm256_intr_check(struct nm256 *chip)
0978 {
0979     if (chip->badintrcount++ > 1000) {
0980         /*
0981          * I'm not sure if the best thing is to stop the card from
0982          * playing or just release the interrupt (after all, we're in
0983          * a bad situation, so doing fancy stuff may not be such a good
0984          * idea).
0985          *
0986          * I worry about the card engine continuing to play noise
0987          * over and over, however--that could become a very
0988          * obnoxious problem.  And we know that when this usually
0989          * happens things are fairly safe, it just means the user's
0990          * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
0991          */
0992         if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
0993             snd_nm256_playback_stop(chip);
0994         if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
0995             snd_nm256_capture_stop(chip);
0996         chip->badintrcount = 0;
0997         return IRQ_HANDLED;
0998     }
0999     return IRQ_NONE;
1000 }
1001 
1002 /* 
1003  * Handle a potential interrupt for the device referred to by DEV_ID. 
1004  *
1005  * I don't like the cut-n-paste job here either between the two routines,
1006  * but there are sufficient differences between the two interrupt handlers
1007  * that parameterizing it isn't all that great either.  (Could use a macro,
1008  * I suppose...yucky bleah.)
1009  */
1010 
1011 static irqreturn_t
1012 snd_nm256_interrupt(int irq, void *dev_id)
1013 {
1014     struct nm256 *chip = dev_id;
1015     u16 status;
1016     u8 cbyte;
1017 
1018     status = snd_nm256_readw(chip, NM_INT_REG);
1019 
1020     /* Not ours. */
1021     if (status == 0)
1022         return snd_nm256_intr_check(chip);
1023 
1024     chip->badintrcount = 0;
1025 
1026     /* Rather boring; check for individual interrupts and process them. */
1027 
1028     spin_lock(&chip->reg_lock);
1029     if (status & NM_PLAYBACK_INT) {
1030         status &= ~NM_PLAYBACK_INT;
1031         NM_ACK_INT(chip, NM_PLAYBACK_INT);
1032         snd_nm256_playback_update(chip);
1033     }
1034 
1035     if (status & NM_RECORD_INT) {
1036         status &= ~NM_RECORD_INT;
1037         NM_ACK_INT(chip, NM_RECORD_INT);
1038         snd_nm256_capture_update(chip);
1039     }
1040 
1041     if (status & NM_MISC_INT_1) {
1042         status &= ~NM_MISC_INT_1;
1043         NM_ACK_INT(chip, NM_MISC_INT_1);
1044         dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1045         snd_nm256_writew(chip, NM_INT_REG, 0x8000);
1046         cbyte = snd_nm256_readb(chip, 0x400);
1047         snd_nm256_writeb(chip, 0x400, cbyte | 2);
1048     }
1049 
1050     if (status & NM_MISC_INT_2) {
1051         status &= ~NM_MISC_INT_2;
1052         NM_ACK_INT(chip, NM_MISC_INT_2);
1053         dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1054         cbyte = snd_nm256_readb(chip, 0x400);
1055         snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1056     }
1057 
1058     /* Unknown interrupt. */
1059     if (status) {
1060         dev_dbg(chip->card->dev,
1061             "NM256: Fire in the hole! Unknown status 0x%x\n",
1062                status);
1063         /* Pray. */
1064         NM_ACK_INT(chip, status);
1065     }
1066 
1067     spin_unlock(&chip->reg_lock);
1068     return IRQ_HANDLED;
1069 }
1070 
1071 /*
1072  * Handle a potential interrupt for the device referred to by DEV_ID.
1073  * This handler is for the 256ZX, and is very similar to the non-ZX
1074  * routine.
1075  */
1076 
1077 static irqreturn_t
1078 snd_nm256_interrupt_zx(int irq, void *dev_id)
1079 {
1080     struct nm256 *chip = dev_id;
1081     u32 status;
1082     u8 cbyte;
1083 
1084     status = snd_nm256_readl(chip, NM_INT_REG);
1085 
1086     /* Not ours. */
1087     if (status == 0)
1088         return snd_nm256_intr_check(chip);
1089 
1090     chip->badintrcount = 0;
1091 
1092     /* Rather boring; check for individual interrupts and process them. */
1093 
1094     spin_lock(&chip->reg_lock);
1095     if (status & NM2_PLAYBACK_INT) {
1096         status &= ~NM2_PLAYBACK_INT;
1097         NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
1098         snd_nm256_playback_update(chip);
1099     }
1100 
1101     if (status & NM2_RECORD_INT) {
1102         status &= ~NM2_RECORD_INT;
1103         NM2_ACK_INT(chip, NM2_RECORD_INT);
1104         snd_nm256_capture_update(chip);
1105     }
1106 
1107     if (status & NM2_MISC_INT_1) {
1108         status &= ~NM2_MISC_INT_1;
1109         NM2_ACK_INT(chip, NM2_MISC_INT_1);
1110         dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1111         cbyte = snd_nm256_readb(chip, 0x400);
1112         snd_nm256_writeb(chip, 0x400, cbyte | 2);
1113     }
1114 
1115     if (status & NM2_MISC_INT_2) {
1116         status &= ~NM2_MISC_INT_2;
1117         NM2_ACK_INT(chip, NM2_MISC_INT_2);
1118         dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1119         cbyte = snd_nm256_readb(chip, 0x400);
1120         snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1121     }
1122 
1123     /* Unknown interrupt. */
1124     if (status) {
1125         dev_dbg(chip->card->dev,
1126             "NM256: Fire in the hole! Unknown status 0x%x\n",
1127                status);
1128         /* Pray. */
1129         NM2_ACK_INT(chip, status);
1130     }
1131 
1132     spin_unlock(&chip->reg_lock);
1133     return IRQ_HANDLED;
1134 }
1135 
1136 /*
1137  * AC97 interface
1138  */
1139 
1140 /*
1141  * Waits for the mixer to become ready to be written; returns a zero value
1142  * if it timed out.
1143  */
1144 static int
1145 snd_nm256_ac97_ready(struct nm256 *chip)
1146 {
1147     int timeout = 10;
1148     u32 testaddr;
1149     u16 testb;
1150 
1151     testaddr = chip->mixer_status_offset;
1152     testb = chip->mixer_status_mask;
1153 
1154     /* 
1155      * Loop around waiting for the mixer to become ready. 
1156      */
1157     while (timeout-- > 0) {
1158         if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
1159             return 1;
1160         udelay(100);
1161     }
1162     return 0;
1163 }
1164 
1165 /* 
1166  * Initial register values to be written to the AC97 mixer.
1167  * While most of these are identical to the reset values, we do this
1168  * so that we have most of the register contents cached--this avoids
1169  * reading from the mixer directly (which seems to be problematic,
1170  * probably due to ignorance).
1171  */
1172 
1173 struct initialValues {
1174     unsigned short reg;
1175     unsigned short value;
1176 };
1177 
1178 static const struct initialValues nm256_ac97_init_val[] =
1179 {
1180     { AC97_MASTER,      0x8000 },
1181     { AC97_HEADPHONE,   0x8000 },
1182     { AC97_MASTER_MONO, 0x8000 },
1183     { AC97_PC_BEEP,     0x8000 },
1184     { AC97_PHONE,       0x8008 },
1185     { AC97_MIC,     0x8000 },
1186     { AC97_LINE,        0x8808 },
1187     { AC97_CD,      0x8808 },
1188     { AC97_VIDEO,       0x8808 },
1189     { AC97_AUX,     0x8808 },
1190     { AC97_PCM,     0x8808 },
1191     { AC97_REC_SEL,     0x0000 },
1192     { AC97_REC_GAIN,    0x0B0B },
1193     { AC97_GENERAL_PURPOSE, 0x0000 },
1194     { AC97_3D_CONTROL,  0x8000 }, 
1195     { AC97_VENDOR_ID1,  0x8384 },
1196     { AC97_VENDOR_ID2,  0x7609 },
1197 };
1198 
1199 static int nm256_ac97_idx(unsigned short reg)
1200 {
1201     int i;
1202     for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
1203         if (nm256_ac97_init_val[i].reg == reg)
1204             return i;
1205     return -1;
1206 }
1207 
1208 /*
1209  * some nm256 easily crash when reading from mixer registers
1210  * thus we're treating it as a write-only mixer and cache the
1211  * written values
1212  */
1213 static unsigned short
1214 snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1215 {
1216     struct nm256 *chip = ac97->private_data;
1217     int idx = nm256_ac97_idx(reg);
1218 
1219     if (idx < 0)
1220         return 0;
1221     return chip->ac97_regs[idx];
1222 }
1223 
1224 /* 
1225  */
1226 static void
1227 snd_nm256_ac97_write(struct snd_ac97 *ac97,
1228              unsigned short reg, unsigned short val)
1229 {
1230     struct nm256 *chip = ac97->private_data;
1231     int tries = 2;
1232     int idx = nm256_ac97_idx(reg);
1233     u32 base;
1234 
1235     if (idx < 0)
1236         return;
1237 
1238     base = chip->mixer_base;
1239 
1240     snd_nm256_ac97_ready(chip);
1241 
1242     /* Wait for the write to take, too. */
1243     while (tries-- > 0) {
1244         snd_nm256_writew(chip, base + reg, val);
1245         msleep(1);  /* a little delay here seems better.. */
1246         if (snd_nm256_ac97_ready(chip)) {
1247             /* successful write: set cache */
1248             chip->ac97_regs[idx] = val;
1249             return;
1250         }
1251     }
1252     dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n");
1253 }
1254 
1255 /* static resolution table */
1256 static const struct snd_ac97_res_table nm256_res_table[] = {
1257     { AC97_MASTER, 0x1f1f },
1258     { AC97_HEADPHONE, 0x1f1f },
1259     { AC97_MASTER_MONO, 0x001f },
1260     { AC97_PC_BEEP, 0x001f },
1261     { AC97_PHONE, 0x001f },
1262     { AC97_MIC, 0x001f },
1263     { AC97_LINE, 0x1f1f },
1264     { AC97_CD, 0x1f1f },
1265     { AC97_VIDEO, 0x1f1f },
1266     { AC97_AUX, 0x1f1f },
1267     { AC97_PCM, 0x1f1f },
1268     { AC97_REC_GAIN, 0x0f0f },
1269     { } /* terminator */
1270 };
1271 
1272 /* initialize the ac97 into a known state */
1273 static void
1274 snd_nm256_ac97_reset(struct snd_ac97 *ac97)
1275 {
1276     struct nm256 *chip = ac97->private_data;
1277 
1278     /* Reset the mixer.  'Tis magic!  */
1279     snd_nm256_writeb(chip, 0x6c0, 1);
1280     if (! chip->reset_workaround) {
1281         /* Dell latitude LS will lock up by this */
1282         snd_nm256_writeb(chip, 0x6cc, 0x87);
1283     }
1284     if (! chip->reset_workaround_2) {
1285         /* Dell latitude CSx will lock up by this */
1286         snd_nm256_writeb(chip, 0x6cc, 0x80);
1287         snd_nm256_writeb(chip, 0x6cc, 0x0);
1288     }
1289     if (! chip->in_resume) {
1290         int i;
1291         for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
1292             /* preload the cache, so as to avoid even a single
1293              * read of the mixer regs
1294              */
1295             snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
1296                          nm256_ac97_init_val[i].value);
1297         }
1298     }
1299 }
1300 
1301 /* create an ac97 mixer interface */
1302 static int
1303 snd_nm256_mixer(struct nm256 *chip)
1304 {
1305     struct snd_ac97_bus *pbus;
1306     struct snd_ac97_template ac97;
1307     int err;
1308     static const struct snd_ac97_bus_ops ops = {
1309         .reset = snd_nm256_ac97_reset,
1310         .write = snd_nm256_ac97_write,
1311         .read = snd_nm256_ac97_read,
1312     };
1313 
1314     chip->ac97_regs = devm_kcalloc(chip->card->dev,
1315                        ARRAY_SIZE(nm256_ac97_init_val),
1316                        sizeof(short), GFP_KERNEL);
1317     if (! chip->ac97_regs)
1318         return -ENOMEM;
1319 
1320     err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
1321     if (err < 0)
1322         return err;
1323 
1324     memset(&ac97, 0, sizeof(ac97));
1325     ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
1326     ac97.private_data = chip;
1327     ac97.res_table = nm256_res_table;
1328     pbus->no_vra = 1;
1329     err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1330     if (err < 0)
1331         return err;
1332     if (! (chip->ac97->id & (0xf0000000))) {
1333         /* looks like an invalid id */
1334         sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
1335     }
1336     return 0;
1337 }
1338 
1339 /* 
1340  * See if the signature left by the NM256 BIOS is intact; if so, we use
1341  * the associated address as the end of our audio buffer in the video
1342  * RAM.
1343  */
1344 
1345 static int
1346 snd_nm256_peek_for_sig(struct nm256 *chip)
1347 {
1348     /* The signature is located 1K below the end of video RAM.  */
1349     void __iomem *temp;
1350     /* Default buffer end is 5120 bytes below the top of RAM.  */
1351     unsigned long pointer_found = chip->buffer_end - 0x1400;
1352     u32 sig;
1353 
1354     temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16);
1355     if (temp == NULL) {
1356         dev_err(chip->card->dev,
1357             "Unable to scan for card signature in video RAM\n");
1358         return -EBUSY;
1359     }
1360 
1361     sig = readl(temp);
1362     if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
1363         u32 pointer = readl(temp + 4);
1364 
1365         /*
1366          * If it's obviously invalid, don't use it
1367          */
1368         if (pointer == 0xffffffff ||
1369             pointer < chip->buffer_size ||
1370             pointer > chip->buffer_end) {
1371             dev_err(chip->card->dev,
1372                 "invalid signature found: 0x%x\n", pointer);
1373             iounmap(temp);
1374             return -ENODEV;
1375         } else {
1376             pointer_found = pointer;
1377             dev_info(chip->card->dev,
1378                  "found card signature in video RAM: 0x%x\n",
1379                    pointer);
1380         }
1381     }
1382 
1383     iounmap(temp);
1384     chip->buffer_end = pointer_found;
1385 
1386     return 0;
1387 }
1388 
1389 #ifdef CONFIG_PM_SLEEP
1390 /*
1391  * APM event handler, so the card is properly reinitialized after a power
1392  * event.
1393  */
1394 static int nm256_suspend(struct device *dev)
1395 {
1396     struct snd_card *card = dev_get_drvdata(dev);
1397     struct nm256 *chip = card->private_data;
1398 
1399     snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1400     snd_ac97_suspend(chip->ac97);
1401     chip->coeffs_current = 0;
1402     return 0;
1403 }
1404 
1405 static int nm256_resume(struct device *dev)
1406 {
1407     struct snd_card *card = dev_get_drvdata(dev);
1408     struct nm256 *chip = card->private_data;
1409     int i;
1410 
1411     /* Perform a full reset on the hardware */
1412     chip->in_resume = 1;
1413 
1414     snd_nm256_init_chip(chip);
1415 
1416     /* restore ac97 */
1417     snd_ac97_resume(chip->ac97);
1418 
1419     for (i = 0; i < 2; i++) {
1420         struct nm256_stream *s = &chip->streams[i];
1421         if (s->substream && s->suspended) {
1422             spin_lock_irq(&chip->reg_lock);
1423             snd_nm256_set_format(chip, s, s->substream);
1424             spin_unlock_irq(&chip->reg_lock);
1425         }
1426     }
1427 
1428     snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1429     chip->in_resume = 0;
1430     return 0;
1431 }
1432 
1433 static SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume);
1434 #define NM256_PM_OPS    &nm256_pm
1435 #else
1436 #define NM256_PM_OPS    NULL
1437 #endif /* CONFIG_PM_SLEEP */
1438 
1439 static void snd_nm256_free(struct snd_card *card)
1440 {
1441     struct nm256 *chip = card->private_data;
1442 
1443     if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
1444         snd_nm256_playback_stop(chip);
1445     if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
1446         snd_nm256_capture_stop(chip);
1447 }
1448 
1449 static int
1450 snd_nm256_create(struct snd_card *card, struct pci_dev *pci)
1451 {
1452     struct nm256 *chip = card->private_data;
1453     int err, pval;
1454     u32 addr;
1455 
1456     err = pcim_enable_device(pci);
1457     if (err < 0)
1458         return err;
1459 
1460     chip->card = card;
1461     chip->pci = pci;
1462     chip->use_cache = use_cache;
1463     spin_lock_init(&chip->reg_lock);
1464     chip->irq = -1;
1465     mutex_init(&chip->irq_mutex);
1466 
1467     /* store buffer sizes in bytes */
1468     chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
1469     chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
1470 
1471     /* 
1472      * The NM256 has two memory ports.  The first port is nothing
1473      * more than a chunk of video RAM, which is used as the I/O ring
1474      * buffer.  The second port has the actual juicy stuff (like the
1475      * mixer and the playback engine control registers).
1476      */
1477 
1478     chip->buffer_addr = pci_resource_start(pci, 0);
1479     chip->cport_addr = pci_resource_start(pci, 1);
1480 
1481     err = pci_request_regions(pci, card->driver);
1482     if (err < 0)
1483         return err;
1484 
1485     /* Init the memory port info.  */
1486     /* remap control port (#2) */
1487     chip->cport = devm_ioremap(&pci->dev, chip->cport_addr, NM_PORT2_SIZE);
1488     if (!chip->cport) {
1489         dev_err(card->dev, "unable to map control port %lx\n",
1490             chip->cport_addr);
1491         return -ENOMEM;
1492     }
1493 
1494     if (!strcmp(card->driver, "NM256AV")) {
1495         /* Ok, try to see if this is a non-AC97 version of the hardware. */
1496         pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
1497         if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
1498             if (! force_ac97) {
1499                 dev_err(card->dev,
1500                     "no ac97 is found!\n");
1501                 dev_err(card->dev,
1502                     "force the driver to load by passing in the module parameter\n");
1503                 dev_err(card->dev,
1504                     " force_ac97=1\n");
1505                 dev_err(card->dev,
1506                     "or try sb16, opl3sa2, or cs423x drivers instead.\n");
1507                 return -ENXIO;
1508             }
1509         }
1510         chip->buffer_end = 2560 * 1024;
1511         chip->interrupt = snd_nm256_interrupt;
1512         chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
1513         chip->mixer_status_mask = NM_MIXER_READY_MASK;
1514     } else {
1515         /* Not sure if there is any relevant detect for the ZX or not.  */
1516         if (snd_nm256_readb(chip, 0xa0b) != 0)
1517             chip->buffer_end = 6144 * 1024;
1518         else
1519             chip->buffer_end = 4096 * 1024;
1520 
1521         chip->interrupt = snd_nm256_interrupt_zx;
1522         chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
1523         chip->mixer_status_mask = NM2_MIXER_READY_MASK;
1524     }
1525     
1526     chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
1527         chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1528     if (chip->use_cache)
1529         chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
1530     else
1531         chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
1532 
1533     if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
1534         chip->buffer_end = buffer_top;
1535     else {
1536         /* get buffer end pointer from signature */
1537         err = snd_nm256_peek_for_sig(chip);
1538         if (err < 0)
1539             return err;
1540     }
1541 
1542     chip->buffer_start = chip->buffer_end - chip->buffer_size;
1543     chip->buffer_addr += chip->buffer_start;
1544 
1545     dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n",
1546            chip->buffer_start, chip->buffer_end);
1547 
1548     chip->buffer = devm_ioremap(&pci->dev, chip->buffer_addr,
1549                     chip->buffer_size);
1550     if (!chip->buffer) {
1551         dev_err(card->dev, "unable to map ring buffer at %lx\n",
1552             chip->buffer_addr);
1553         return -ENOMEM;
1554     }
1555 
1556     /* set offsets */
1557     addr = chip->buffer_start;
1558     chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
1559     addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
1560     chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
1561     addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1562     if (chip->use_cache) {
1563         chip->all_coeff_buf = addr;
1564     } else {
1565         chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
1566         addr += NM_MAX_PLAYBACK_COEF_SIZE;
1567         chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
1568     }
1569 
1570     /* Fixed setting. */
1571     chip->mixer_base = NM_MIXER_OFFSET;
1572 
1573     chip->coeffs_current = 0;
1574 
1575     snd_nm256_init_chip(chip);
1576 
1577     // pci_set_master(pci); /* needed? */
1578     return 0;
1579 }
1580 
1581 
1582 enum { NM_IGNORED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
1583 
1584 static const struct snd_pci_quirk nm256_quirks[] = {
1585     /* HP omnibook 4150 has cs4232 codec internally */
1586     SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_IGNORED),
1587     /* Reset workarounds to avoid lock-ups */
1588     SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
1589     SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
1590     SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
1591     { } /* terminator */
1592 };
1593 
1594 
1595 static int snd_nm256_probe(struct pci_dev *pci,
1596                const struct pci_device_id *pci_id)
1597 {
1598     struct snd_card *card;
1599     struct nm256 *chip;
1600     int err;
1601     const struct snd_pci_quirk *q;
1602 
1603     q = snd_pci_quirk_lookup(pci, nm256_quirks);
1604     if (q) {
1605         dev_dbg(&pci->dev, "Enabled quirk for %s.\n",
1606                 snd_pci_quirk_name(q));
1607         switch (q->value) {
1608         case NM_IGNORED:
1609             dev_info(&pci->dev,
1610                  "The device is on the denylist. Loading stopped\n");
1611             return -ENODEV;
1612         case NM_RESET_WORKAROUND_2:
1613             reset_workaround_2 = 1;
1614             fallthrough;
1615         case NM_RESET_WORKAROUND:
1616             reset_workaround = 1;
1617             break;
1618         }
1619     }
1620 
1621     err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
1622                 sizeof(*chip), &card);
1623     if (err < 0)
1624         return err;
1625     chip = card->private_data;
1626 
1627     switch (pci->device) {
1628     case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
1629         strcpy(card->driver, "NM256AV");
1630         break;
1631     case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
1632         strcpy(card->driver, "NM256ZX");
1633         break;
1634     case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
1635         strcpy(card->driver, "NM256XL+");
1636         break;
1637     default:
1638         dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device);
1639         return -EINVAL;
1640     }
1641 
1642     if (vaio_hack)
1643         buffer_top = 0x25a800;  /* this avoids conflicts with XFree86 server */
1644 
1645     if (playback_bufsize < 4)
1646         playback_bufsize = 4;
1647     if (playback_bufsize > 128)
1648         playback_bufsize = 128;
1649     if (capture_bufsize < 4)
1650         capture_bufsize = 4;
1651     if (capture_bufsize > 128)
1652         capture_bufsize = 128;
1653     err = snd_nm256_create(card, pci);
1654     if (err < 0)
1655         return err;
1656 
1657     if (reset_workaround) {
1658         dev_dbg(&pci->dev, "reset_workaround activated\n");
1659         chip->reset_workaround = 1;
1660     }
1661 
1662     if (reset_workaround_2) {
1663         dev_dbg(&pci->dev, "reset_workaround_2 activated\n");
1664         chip->reset_workaround_2 = 1;
1665     }
1666 
1667     err = snd_nm256_pcm(chip, 0);
1668     if (err < 0)
1669         return err;
1670     err = snd_nm256_mixer(chip);
1671     if (err < 0)
1672         return err;
1673 
1674     sprintf(card->shortname, "NeoMagic %s", card->driver);
1675     sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
1676         card->shortname,
1677         chip->buffer_addr, chip->cport_addr, chip->irq);
1678 
1679     err = snd_card_register(card);
1680     if (err < 0)
1681         return err;
1682     card->private_free = snd_nm256_free;
1683 
1684     pci_set_drvdata(pci, card);
1685     return 0;
1686 }
1687 
1688 static struct pci_driver nm256_driver = {
1689     .name = KBUILD_MODNAME,
1690     .id_table = snd_nm256_ids,
1691     .probe = snd_nm256_probe,
1692     .driver = {
1693         .pm = NM256_PM_OPS,
1694     },
1695 };
1696 
1697 module_pci_driver(nm256_driver);
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