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OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Support for Digigram Lola PCI-e boards
0004  *
0005  *  Copyright (c) 2011 Takashi Iwai <tiwai@suse.de>
0006  */
0007 
0008 #include <linux/kernel.h>
0009 #include <linux/init.h>
0010 #include <linux/module.h>
0011 #include <linux/dma-mapping.h>
0012 #include <linux/delay.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/slab.h>
0015 #include <linux/pci.h>
0016 #include <sound/core.h>
0017 #include <sound/control.h>
0018 #include <sound/pcm.h>
0019 #include <sound/initval.h>
0020 #include "lola.h"
0021 
0022 /* Standard options */
0023 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
0024 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
0025 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
0026 
0027 module_param_array(index, int, NULL, 0444);
0028 MODULE_PARM_DESC(index, "Index value for Digigram Lola driver.");
0029 module_param_array(id, charp, NULL, 0444);
0030 MODULE_PARM_DESC(id, "ID string for Digigram Lola driver.");
0031 module_param_array(enable, bool, NULL, 0444);
0032 MODULE_PARM_DESC(enable, "Enable Digigram Lola driver.");
0033 
0034 /* Lola-specific options */
0035 
0036 /* for instance use always max granularity which is compatible
0037  * with all sample rates
0038  */
0039 static int granularity[SNDRV_CARDS] = {
0040     [0 ... (SNDRV_CARDS - 1)] = LOLA_GRANULARITY_MAX
0041 };
0042 
0043 /* below a sample_rate of 16kHz the analogue audio quality is NOT excellent */
0044 static int sample_rate_min[SNDRV_CARDS] = {
0045     [0 ... (SNDRV_CARDS - 1) ] = 16000
0046 };
0047 
0048 module_param_array(granularity, int, NULL, 0444);
0049 MODULE_PARM_DESC(granularity, "Granularity value");
0050 module_param_array(sample_rate_min, int, NULL, 0444);
0051 MODULE_PARM_DESC(sample_rate_min, "Minimal sample rate");
0052 
0053 /*
0054  */
0055 
0056 MODULE_LICENSE("GPL");
0057 MODULE_DESCRIPTION("Digigram Lola driver");
0058 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
0059 
0060 #ifdef CONFIG_SND_DEBUG_VERBOSE
0061 static int debug;
0062 module_param(debug, int, 0644);
0063 #define verbose_debug(fmt, args...)         \
0064     do { if (debug > 1) pr_debug(SFX fmt, ##args); } while (0)
0065 #else
0066 #define verbose_debug(fmt, args...)
0067 #endif
0068 
0069 /*
0070  * pseudo-codec read/write via CORB/RIRB
0071  */
0072 
0073 static int corb_send_verb(struct lola *chip, unsigned int nid,
0074               unsigned int verb, unsigned int data,
0075               unsigned int extdata)
0076 {
0077     unsigned long flags;
0078     int ret = -EIO;
0079 
0080     chip->last_cmd_nid = nid;
0081     chip->last_verb = verb;
0082     chip->last_data = data;
0083     chip->last_extdata = extdata;
0084     data |= (nid << 20) | (verb << 8);
0085 
0086     spin_lock_irqsave(&chip->reg_lock, flags);
0087     if (chip->rirb.cmds < LOLA_CORB_ENTRIES - 1) {
0088         unsigned int wp = chip->corb.wp + 1;
0089         wp %= LOLA_CORB_ENTRIES;
0090         chip->corb.wp = wp;
0091         chip->corb.buf[wp * 2] = cpu_to_le32(data);
0092         chip->corb.buf[wp * 2 + 1] = cpu_to_le32(extdata);
0093         lola_writew(chip, BAR0, CORBWP, wp);
0094         chip->rirb.cmds++;
0095         smp_wmb();
0096         ret = 0;
0097     }
0098     spin_unlock_irqrestore(&chip->reg_lock, flags);
0099     return ret;
0100 }
0101 
0102 static void lola_queue_unsol_event(struct lola *chip, unsigned int res,
0103                    unsigned int res_ex)
0104 {
0105     lola_update_ext_clock_freq(chip, res);
0106 }
0107 
0108 /* retrieve RIRB entry - called from interrupt handler */
0109 static void lola_update_rirb(struct lola *chip)
0110 {
0111     unsigned int rp, wp;
0112     u32 res, res_ex;
0113 
0114     wp = lola_readw(chip, BAR0, RIRBWP);
0115     if (wp == chip->rirb.wp)
0116         return;
0117     chip->rirb.wp = wp;
0118 
0119     while (chip->rirb.rp != wp) {
0120         chip->rirb.rp++;
0121         chip->rirb.rp %= LOLA_CORB_ENTRIES;
0122 
0123         rp = chip->rirb.rp << 1; /* an RIRB entry is 8-bytes */
0124         res_ex = le32_to_cpu(chip->rirb.buf[rp + 1]);
0125         res = le32_to_cpu(chip->rirb.buf[rp]);
0126         if (res_ex & LOLA_RIRB_EX_UNSOL_EV)
0127             lola_queue_unsol_event(chip, res, res_ex);
0128         else if (chip->rirb.cmds) {
0129             chip->res = res;
0130             chip->res_ex = res_ex;
0131             smp_wmb();
0132             chip->rirb.cmds--;
0133         }
0134     }
0135 }
0136 
0137 static int rirb_get_response(struct lola *chip, unsigned int *val,
0138                  unsigned int *extval)
0139 {
0140     unsigned long timeout;
0141 
0142  again:
0143     timeout = jiffies + msecs_to_jiffies(1000);
0144     for (;;) {
0145         if (chip->polling_mode) {
0146             spin_lock_irq(&chip->reg_lock);
0147             lola_update_rirb(chip);
0148             spin_unlock_irq(&chip->reg_lock);
0149         }
0150         if (!chip->rirb.cmds) {
0151             *val = chip->res;
0152             if (extval)
0153                 *extval = chip->res_ex;
0154             verbose_debug("get_response: %x, %x\n",
0155                       chip->res, chip->res_ex);
0156             if (chip->res_ex & LOLA_RIRB_EX_ERROR) {
0157                 dev_warn(chip->card->dev, "RIRB ERROR: "
0158                        "NID=%x, verb=%x, data=%x, ext=%x\n",
0159                        chip->last_cmd_nid,
0160                        chip->last_verb, chip->last_data,
0161                        chip->last_extdata);
0162                 return -EIO;
0163             }
0164             return 0;
0165         }
0166         if (time_after(jiffies, timeout))
0167             break;
0168         udelay(20);
0169         cond_resched();
0170     }
0171     dev_warn(chip->card->dev, "RIRB response error\n");
0172     if (!chip->polling_mode) {
0173         dev_warn(chip->card->dev, "switching to polling mode\n");
0174         chip->polling_mode = 1;
0175         goto again;
0176     }
0177     return -EIO;
0178 }
0179 
0180 /* aynchronous write of a codec verb with data */
0181 int lola_codec_write(struct lola *chip, unsigned int nid, unsigned int verb,
0182              unsigned int data, unsigned int extdata)
0183 {
0184     verbose_debug("codec_write NID=%x, verb=%x, data=%x, ext=%x\n",
0185               nid, verb, data, extdata);
0186     return corb_send_verb(chip, nid, verb, data, extdata);
0187 }
0188 
0189 /* write a codec verb with data and read the returned status */
0190 int lola_codec_read(struct lola *chip, unsigned int nid, unsigned int verb,
0191             unsigned int data, unsigned int extdata,
0192             unsigned int *val, unsigned int *extval)
0193 {
0194     int err;
0195 
0196     verbose_debug("codec_read NID=%x, verb=%x, data=%x, ext=%x\n",
0197               nid, verb, data, extdata);
0198     err = corb_send_verb(chip, nid, verb, data, extdata);
0199     if (err < 0)
0200         return err;
0201     err = rirb_get_response(chip, val, extval);
0202     return err;
0203 }
0204 
0205 /* flush all pending codec writes */
0206 int lola_codec_flush(struct lola *chip)
0207 {
0208     unsigned int tmp;
0209     return rirb_get_response(chip, &tmp, NULL);
0210 }
0211 
0212 /*
0213  * interrupt handler
0214  */
0215 static irqreturn_t lola_interrupt(int irq, void *dev_id)
0216 {
0217     struct lola *chip = dev_id;
0218     unsigned int notify_ins, notify_outs, error_ins, error_outs;
0219     int handled = 0;
0220     int i;
0221 
0222     notify_ins = notify_outs = error_ins = error_outs = 0;
0223     spin_lock(&chip->reg_lock);
0224     for (;;) {
0225         unsigned int status, in_sts, out_sts;
0226         unsigned int reg;
0227 
0228         status = lola_readl(chip, BAR1, DINTSTS);
0229         if (!status || status == -1)
0230             break;
0231 
0232         in_sts = lola_readl(chip, BAR1, DIINTSTS);
0233         out_sts = lola_readl(chip, BAR1, DOINTSTS);
0234 
0235         /* clear Input Interrupts */
0236         for (i = 0; in_sts && i < chip->pcm[CAPT].num_streams; i++) {
0237             if (!(in_sts & (1 << i)))
0238                 continue;
0239             in_sts &= ~(1 << i);
0240             reg = lola_dsd_read(chip, i, STS);
0241             if (reg & LOLA_DSD_STS_DESE) /* error */
0242                 error_ins |= (1 << i);
0243             if (reg & LOLA_DSD_STS_BCIS) /* notify */
0244                 notify_ins |= (1 << i);
0245             /* clear */
0246             lola_dsd_write(chip, i, STS, reg);
0247         }
0248 
0249         /* clear Output Interrupts */
0250         for (i = 0; out_sts && i < chip->pcm[PLAY].num_streams; i++) {
0251             if (!(out_sts & (1 << i)))
0252                 continue;
0253             out_sts &= ~(1 << i);
0254             reg = lola_dsd_read(chip, i + MAX_STREAM_IN_COUNT, STS);
0255             if (reg & LOLA_DSD_STS_DESE) /* error */
0256                 error_outs |= (1 << i);
0257             if (reg & LOLA_DSD_STS_BCIS) /* notify */
0258                 notify_outs |= (1 << i);
0259             lola_dsd_write(chip, i + MAX_STREAM_IN_COUNT, STS, reg);
0260         }
0261 
0262         if (status & LOLA_DINT_CTRL) {
0263             unsigned char rbsts; /* ring status is byte access */
0264             rbsts = lola_readb(chip, BAR0, RIRBSTS);
0265             rbsts &= LOLA_RIRB_INT_MASK;
0266             if (rbsts)
0267                 lola_writeb(chip, BAR0, RIRBSTS, rbsts);
0268             rbsts = lola_readb(chip, BAR0, CORBSTS);
0269             rbsts &= LOLA_CORB_INT_MASK;
0270             if (rbsts)
0271                 lola_writeb(chip, BAR0, CORBSTS, rbsts);
0272 
0273             lola_update_rirb(chip);
0274         }
0275 
0276         if (status & (LOLA_DINT_FIFOERR | LOLA_DINT_MUERR)) {
0277             /* clear global fifo error interrupt */
0278             lola_writel(chip, BAR1, DINTSTS,
0279                     (status & (LOLA_DINT_FIFOERR | LOLA_DINT_MUERR)));
0280         }
0281         handled = 1;
0282     }
0283     spin_unlock(&chip->reg_lock);
0284 
0285     lola_pcm_update(chip, &chip->pcm[CAPT], notify_ins);
0286     lola_pcm_update(chip, &chip->pcm[PLAY], notify_outs);
0287 
0288     return IRQ_RETVAL(handled);
0289 }
0290 
0291 
0292 /*
0293  * controller
0294  */
0295 static int reset_controller(struct lola *chip)
0296 {
0297     unsigned int gctl = lola_readl(chip, BAR0, GCTL);
0298     unsigned long end_time;
0299 
0300     if (gctl) {
0301         /* to be sure */
0302         lola_writel(chip, BAR1, BOARD_MODE, 0);
0303         return 0;
0304     }
0305 
0306     chip->cold_reset = 1;
0307     lola_writel(chip, BAR0, GCTL, LOLA_GCTL_RESET);
0308     end_time = jiffies + msecs_to_jiffies(200);
0309     do {
0310         msleep(1);
0311         gctl = lola_readl(chip, BAR0, GCTL);
0312         if (gctl)
0313             break;
0314     } while (time_before(jiffies, end_time));
0315     if (!gctl) {
0316         dev_err(chip->card->dev, "cannot reset controller\n");
0317         return -EIO;
0318     }
0319     return 0;
0320 }
0321 
0322 static void lola_irq_enable(struct lola *chip)
0323 {
0324     unsigned int val;
0325 
0326     /* enalbe all I/O streams */
0327     val = (1 << chip->pcm[PLAY].num_streams) - 1;
0328     lola_writel(chip, BAR1, DOINTCTL, val);
0329     val = (1 << chip->pcm[CAPT].num_streams) - 1;
0330     lola_writel(chip, BAR1, DIINTCTL, val);
0331 
0332     /* enable global irqs */
0333     val = LOLA_DINT_GLOBAL | LOLA_DINT_CTRL | LOLA_DINT_FIFOERR |
0334         LOLA_DINT_MUERR;
0335     lola_writel(chip, BAR1, DINTCTL, val);
0336 }
0337 
0338 static void lola_irq_disable(struct lola *chip)
0339 {
0340     lola_writel(chip, BAR1, DINTCTL, 0);
0341     lola_writel(chip, BAR1, DIINTCTL, 0);
0342     lola_writel(chip, BAR1, DOINTCTL, 0);
0343 }
0344 
0345 static int setup_corb_rirb(struct lola *chip)
0346 {
0347     unsigned char tmp;
0348     unsigned long end_time;
0349 
0350     chip->rb = snd_devm_alloc_pages(&chip->pci->dev, SNDRV_DMA_TYPE_DEV,
0351                     PAGE_SIZE);
0352     if (!chip->rb)
0353         return -ENOMEM;
0354 
0355     chip->corb.addr = chip->rb->addr;
0356     chip->corb.buf = (__le32 *)chip->rb->area;
0357     chip->rirb.addr = chip->rb->addr + 2048;
0358     chip->rirb.buf = (__le32 *)(chip->rb->area + 2048);
0359 
0360     /* disable ringbuffer DMAs */
0361     lola_writeb(chip, BAR0, RIRBCTL, 0);
0362     lola_writeb(chip, BAR0, CORBCTL, 0);
0363 
0364     end_time = jiffies + msecs_to_jiffies(200);
0365     do {
0366         if (!lola_readb(chip, BAR0, RIRBCTL) &&
0367             !lola_readb(chip, BAR0, CORBCTL))
0368             break;
0369         msleep(1);
0370     } while (time_before(jiffies, end_time));
0371 
0372     /* CORB set up */
0373     lola_writel(chip, BAR0, CORBLBASE, (u32)chip->corb.addr);
0374     lola_writel(chip, BAR0, CORBUBASE, upper_32_bits(chip->corb.addr));
0375     /* set the corb size to 256 entries */
0376     lola_writeb(chip, BAR0, CORBSIZE, 0x02);
0377     /* set the corb write pointer to 0 */
0378     lola_writew(chip, BAR0, CORBWP, 0);
0379     /* reset the corb hw read pointer */
0380     lola_writew(chip, BAR0, CORBRP, LOLA_RBRWP_CLR);
0381     /* enable corb dma */
0382     lola_writeb(chip, BAR0, CORBCTL, LOLA_RBCTL_DMA_EN);
0383     /* clear flags if set */
0384     tmp = lola_readb(chip, BAR0, CORBSTS) & LOLA_CORB_INT_MASK;
0385     if (tmp)
0386         lola_writeb(chip, BAR0, CORBSTS, tmp);
0387     chip->corb.wp = 0;
0388 
0389     /* RIRB set up */
0390     lola_writel(chip, BAR0, RIRBLBASE, (u32)chip->rirb.addr);
0391     lola_writel(chip, BAR0, RIRBUBASE, upper_32_bits(chip->rirb.addr));
0392     /* set the rirb size to 256 entries */
0393     lola_writeb(chip, BAR0, RIRBSIZE, 0x02);
0394     /* reset the rirb hw write pointer */
0395     lola_writew(chip, BAR0, RIRBWP, LOLA_RBRWP_CLR);
0396     /* set N=1, get RIRB response interrupt for new entry */
0397     lola_writew(chip, BAR0, RINTCNT, 1);
0398     /* enable rirb dma and response irq */
0399     lola_writeb(chip, BAR0, RIRBCTL, LOLA_RBCTL_DMA_EN | LOLA_RBCTL_IRQ_EN);
0400     /* clear flags if set */
0401     tmp =  lola_readb(chip, BAR0, RIRBSTS) & LOLA_RIRB_INT_MASK;
0402     if (tmp)
0403         lola_writeb(chip, BAR0, RIRBSTS, tmp);
0404     chip->rirb.rp = chip->rirb.cmds = 0;
0405 
0406     return 0;
0407 }
0408 
0409 static void stop_corb_rirb(struct lola *chip)
0410 {
0411     /* disable ringbuffer DMAs */
0412     lola_writeb(chip, BAR0, RIRBCTL, 0);
0413     lola_writeb(chip, BAR0, CORBCTL, 0);
0414 }
0415 
0416 static void lola_reset_setups(struct lola *chip)
0417 {
0418     /* update the granularity */
0419     lola_set_granularity(chip, chip->granularity, true);
0420     /* update the sample clock */
0421     lola_set_clock_index(chip, chip->clock.cur_index);
0422     /* enable unsolicited events of the clock widget */
0423     lola_enable_clock_events(chip);
0424     /* update the analog gains */
0425     lola_setup_all_analog_gains(chip, CAPT, false); /* input, update */
0426     /* update SRC configuration if applicable */
0427     lola_set_src_config(chip, chip->input_src_mask, false);
0428     /* update the analog outputs */
0429     lola_setup_all_analog_gains(chip, PLAY, false); /* output, update */
0430 }
0431 
0432 static int lola_parse_tree(struct lola *chip)
0433 {
0434     unsigned int val;
0435     int nid, err;
0436 
0437     err = lola_read_param(chip, 0, LOLA_PAR_VENDOR_ID, &val);
0438     if (err < 0) {
0439         dev_err(chip->card->dev, "Can't read VENDOR_ID\n");
0440         return err;
0441     }
0442     val >>= 16;
0443     if (val != 0x1369) {
0444         dev_err(chip->card->dev, "Unknown codec vendor 0x%x\n", val);
0445         return -EINVAL;
0446     }
0447 
0448     err = lola_read_param(chip, 1, LOLA_PAR_FUNCTION_TYPE, &val);
0449     if (err < 0) {
0450         dev_err(chip->card->dev, "Can't read FUNCTION_TYPE\n");
0451         return err;
0452     }
0453     if (val != 1) {
0454         dev_err(chip->card->dev, "Unknown function type %d\n", val);
0455         return -EINVAL;
0456     }
0457 
0458     err = lola_read_param(chip, 1, LOLA_PAR_SPECIFIC_CAPS, &val);
0459     if (err < 0) {
0460         dev_err(chip->card->dev, "Can't read SPECCAPS\n");
0461         return err;
0462     }
0463     chip->lola_caps = val;
0464     chip->pin[CAPT].num_pins = LOLA_AFG_INPUT_PIN_COUNT(chip->lola_caps);
0465     chip->pin[PLAY].num_pins = LOLA_AFG_OUTPUT_PIN_COUNT(chip->lola_caps);
0466     dev_dbg(chip->card->dev, "speccaps=0x%x, pins in=%d, out=%d\n",
0467             chip->lola_caps,
0468             chip->pin[CAPT].num_pins, chip->pin[PLAY].num_pins);
0469 
0470     if (chip->pin[CAPT].num_pins > MAX_AUDIO_INOUT_COUNT ||
0471         chip->pin[PLAY].num_pins > MAX_AUDIO_INOUT_COUNT) {
0472         dev_err(chip->card->dev, "Invalid Lola-spec caps 0x%x\n", val);
0473         return -EINVAL;
0474     }
0475 
0476     nid = 0x02;
0477     err = lola_init_pcm(chip, CAPT, &nid);
0478     if (err < 0)
0479         return err;
0480     err = lola_init_pcm(chip, PLAY, &nid);
0481     if (err < 0)
0482         return err;
0483 
0484     err = lola_init_pins(chip, CAPT, &nid);
0485     if (err < 0)
0486         return err;
0487     err = lola_init_pins(chip, PLAY, &nid);
0488     if (err < 0)
0489         return err;
0490 
0491     if (LOLA_AFG_CLOCK_WIDGET_PRESENT(chip->lola_caps)) {
0492         err = lola_init_clock_widget(chip, nid);
0493         if (err < 0)
0494             return err;
0495         nid++;
0496     }
0497     if (LOLA_AFG_MIXER_WIDGET_PRESENT(chip->lola_caps)) {
0498         err = lola_init_mixer_widget(chip, nid);
0499         if (err < 0)
0500             return err;
0501         nid++;
0502     }
0503 
0504     /* enable unsolicited events of the clock widget */
0505     err = lola_enable_clock_events(chip);
0506     if (err < 0)
0507         return err;
0508 
0509     /* if last ResetController was not a ColdReset, we don't know
0510      * the state of the card; initialize here again
0511      */
0512     if (!chip->cold_reset) {
0513         lola_reset_setups(chip);
0514         chip->cold_reset = 1;
0515     } else {
0516         /* set the granularity if it is not the default */
0517         if (chip->granularity != LOLA_GRANULARITY_MIN)
0518             lola_set_granularity(chip, chip->granularity, true);
0519     }
0520 
0521     return 0;
0522 }
0523 
0524 static void lola_stop_hw(struct lola *chip)
0525 {
0526     stop_corb_rirb(chip);
0527     lola_irq_disable(chip);
0528 }
0529 
0530 static void lola_free(struct snd_card *card)
0531 {
0532     struct lola *chip = card->private_data;
0533 
0534     if (chip->initialized)
0535         lola_stop_hw(chip);
0536     lola_free_mixer(chip);
0537 }
0538 
0539 static int lola_create(struct snd_card *card, struct pci_dev *pci, int dev)
0540 {
0541     struct lola *chip = card->private_data;
0542     int err;
0543     unsigned int dever;
0544 
0545     err = pcim_enable_device(pci);
0546     if (err < 0)
0547         return err;
0548 
0549     spin_lock_init(&chip->reg_lock);
0550     mutex_init(&chip->open_mutex);
0551     chip->card = card;
0552     chip->pci = pci;
0553     chip->irq = -1;
0554     card->private_free = lola_free;
0555 
0556     chip->granularity = granularity[dev];
0557     switch (chip->granularity) {
0558     case 8:
0559         chip->sample_rate_max = 48000;
0560         break;
0561     case 16:
0562         chip->sample_rate_max = 96000;
0563         break;
0564     case 32:
0565         chip->sample_rate_max = 192000;
0566         break;
0567     default:
0568         dev_warn(chip->card->dev,
0569                "Invalid granularity %d, reset to %d\n",
0570                chip->granularity, LOLA_GRANULARITY_MAX);
0571         chip->granularity = LOLA_GRANULARITY_MAX;
0572         chip->sample_rate_max = 192000;
0573         break;
0574     }
0575     chip->sample_rate_min = sample_rate_min[dev];
0576     if (chip->sample_rate_min > chip->sample_rate_max) {
0577         dev_warn(chip->card->dev,
0578                "Invalid sample_rate_min %d, reset to 16000\n",
0579                chip->sample_rate_min);
0580         chip->sample_rate_min = 16000;
0581     }
0582 
0583     err = pcim_iomap_regions(pci, (1 << 0) | (1 << 2), DRVNAME);
0584     if (err < 0)
0585         return err;
0586 
0587     chip->bar[0].addr = pci_resource_start(pci, 0);
0588     chip->bar[0].remap_addr = pcim_iomap_table(pci)[0];
0589     chip->bar[1].addr = pci_resource_start(pci, 2);
0590     chip->bar[1].remap_addr = pcim_iomap_table(pci)[2];
0591 
0592     pci_set_master(pci);
0593 
0594     err = reset_controller(chip);
0595     if (err < 0)
0596         return err;
0597 
0598     if (devm_request_irq(&pci->dev, pci->irq, lola_interrupt, IRQF_SHARED,
0599                  KBUILD_MODNAME, chip)) {
0600         dev_err(chip->card->dev, "unable to grab IRQ %d\n", pci->irq);
0601         return -EBUSY;
0602     }
0603     chip->irq = pci->irq;
0604     card->sync_irq = chip->irq;
0605 
0606     dever = lola_readl(chip, BAR1, DEVER);
0607     chip->pcm[CAPT].num_streams = (dever >> 0) & 0x3ff;
0608     chip->pcm[PLAY].num_streams = (dever >> 10) & 0x3ff;
0609     chip->version = (dever >> 24) & 0xff;
0610     dev_dbg(chip->card->dev, "streams in=%d, out=%d, version=0x%x\n",
0611             chip->pcm[CAPT].num_streams, chip->pcm[PLAY].num_streams,
0612             chip->version);
0613 
0614     /* Test LOLA_BAR1_DEVER */
0615     if (chip->pcm[CAPT].num_streams > MAX_STREAM_IN_COUNT ||
0616         chip->pcm[PLAY].num_streams > MAX_STREAM_OUT_COUNT ||
0617         (!chip->pcm[CAPT].num_streams &&
0618          !chip->pcm[PLAY].num_streams)) {
0619         dev_err(chip->card->dev, "invalid DEVER = %x\n", dever);
0620         return -EINVAL;
0621     }
0622 
0623     err = setup_corb_rirb(chip);
0624     if (err < 0)
0625         return err;
0626 
0627     strcpy(card->driver, "Lola");
0628     strscpy(card->shortname, "Digigram Lola", sizeof(card->shortname));
0629     snprintf(card->longname, sizeof(card->longname),
0630          "%s at 0x%lx irq %i",
0631          card->shortname, chip->bar[0].addr, chip->irq);
0632     strcpy(card->mixername, card->shortname);
0633 
0634     lola_irq_enable(chip);
0635 
0636     chip->initialized = 1;
0637     return 0;
0638 }
0639 
0640 static int __lola_probe(struct pci_dev *pci,
0641             const struct pci_device_id *pci_id)
0642 {
0643     static int dev;
0644     struct snd_card *card;
0645     struct lola *chip;
0646     int err;
0647 
0648     if (dev >= SNDRV_CARDS)
0649         return -ENODEV;
0650     if (!enable[dev]) {
0651         dev++;
0652         return -ENOENT;
0653     }
0654 
0655     err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
0656                 sizeof(*chip), &card);
0657     if (err < 0) {
0658         dev_err(&pci->dev, "Error creating card!\n");
0659         return err;
0660     }
0661     chip = card->private_data;
0662 
0663     err = lola_create(card, pci, dev);
0664     if (err < 0)
0665         return err;
0666 
0667     err = lola_parse_tree(chip);
0668     if (err < 0)
0669         return err;
0670 
0671     err = lola_create_pcm(chip);
0672     if (err < 0)
0673         return err;
0674 
0675     err = lola_create_mixer(chip);
0676     if (err < 0)
0677         return err;
0678 
0679     lola_proc_debug_new(chip);
0680 
0681     err = snd_card_register(card);
0682     if (err < 0)
0683         return err;
0684 
0685     pci_set_drvdata(pci, card);
0686     dev++;
0687     return 0;
0688 }
0689 
0690 static int lola_probe(struct pci_dev *pci,
0691               const struct pci_device_id *pci_id)
0692 {
0693     return snd_card_free_on_error(&pci->dev, __lola_probe(pci, pci_id));
0694 }
0695 
0696 /* PCI IDs */
0697 static const struct pci_device_id lola_ids[] = {
0698     { PCI_VDEVICE(DIGIGRAM, 0x0001) },
0699     { 0, }
0700 };
0701 MODULE_DEVICE_TABLE(pci, lola_ids);
0702 
0703 /* pci_driver definition */
0704 static struct pci_driver lola_driver = {
0705     .name = KBUILD_MODNAME,
0706     .id_table = lola_ids,
0707     .probe = lola_probe,
0708 };
0709 
0710 module_pci_driver(lola_driver);
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