pci/ice1712/wm8776.h

0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 #ifndef __SOUND_WM8776_H
0003 #define __SOUND_WM8776_H
0004
0005 /*
0006  *   ALSA driver for ICEnsemble VT17xx
0007  *
0008  *   Lowlevel functions for WM8776 codec
0009  *
0010  *  Copyright (c) 2012 Ondrej Zary <linux@rainbow-software.org>
0011  */
0012
0013 #define WM8776_REG_HPLVOL   0x00
0014 #define WM8776_REG_HPRVOL   0x01
0015 #define WM8776_REG_HPMASTER 0x02
0016 #define WM8776_HPVOL_MASK       0x17f       /* incl. update bit */
0017 #define WM8776_VOL_HPZCEN       (1 << 7)    /* zero cross detect */
0018 #define WM8776_VOL_UPDATE       (1 << 8)    /* update volume */
0019 #define WM8776_REG_DACLVOL  0x03
0020 #define WM8776_REG_DACRVOL  0x04
0021 #define WM8776_REG_DACMASTER    0x05
0022 #define WM8776_DACVOL_MASK      0x1ff       /* incl. update bit */
0023 #define WM8776_REG_PHASESWAP    0x06
0024 #define WM8776_PHASE_INVERTL        (1 << 0)
0025 #define WM8776_PHASE_INVERTR        (1 << 1)
0026 #define WM8776_REG_DACCTRL1 0x07
0027 #define WM8776_DAC_DZCEN        (1 << 0)
0028 #define WM8776_DAC_ATC          (1 << 1)
0029 #define WM8776_DAC_IZD          (1 << 2)
0030 #define WM8776_DAC_TOD          (1 << 3)
0031 #define WM8776_DAC_PL_MASK      0xf0
0032 #define WM8776_DAC_PL_LL        (1 << 4)    /* L chan: L signal */
0033 #define WM8776_DAC_PL_LR        (2 << 4)    /* L chan: R signal */
0034 #define WM8776_DAC_PL_LB        (3 << 4)    /* L chan: both */
0035 #define WM8776_DAC_PL_RL        (1 << 6)    /* R chan: L signal */
0036 #define WM8776_DAC_PL_RR        (2 << 6)    /* R chan: R signal */
0037 #define WM8776_DAC_PL_RB        (3 << 6)    /* R chan: both */
0038 #define WM8776_REG_DACMUTE  0x08
0039 #define WM8776_DACMUTE          (1 << 0)
0040 #define WM8776_REG_DACCTRL2 0x09
0041 #define WM8776_DAC2_DEEMPH      (1 << 0)
0042 #define WM8776_DAC2_ZFLAG_DISABLE   (0 << 1)
0043 #define WM8776_DAC2_ZFLAG_OWN       (1 << 1)
0044 #define WM8776_DAC2_ZFLAG_BOTH      (2 << 1)
0045 #define WM8776_DAC2_ZFLAG_EITHER    (3 << 1)
0046 #define WM8776_REG_DACIFCTRL    0x0a
0047 #define WM8776_FMT_RIGHTJ       (0 << 0)
0048 #define WM8776_FMT_LEFTJ        (1 << 0)
0049 #define WM8776_FMT_I2S          (2 << 0)
0050 #define WM8776_FMT_DSP          (3 << 0)
0051 #define WM8776_FMT_DSP_LATE     (1 << 2)    /* in DSP mode */
0052 #define WM8776_FMT_LRC_INVERTED     (1 << 2)    /* in other modes */
0053 #define WM8776_FMT_BCLK_INVERTED    (1 << 3)
0054 #define WM8776_FMT_16BIT        (0 << 4)
0055 #define WM8776_FMT_20BIT        (1 << 4)
0056 #define WM8776_FMT_24BIT        (2 << 4)
0057 #define WM8776_FMT_32BIT        (3 << 4)
0058 #define WM8776_REG_ADCIFCTRL    0x0b
0059 #define WM8776_FMT_ADCMCLK_INVERTED (1 << 6)
0060 #define WM8776_FMT_ADCHPD       (1 << 8)
0061 #define WM8776_REG_MSTRCTRL 0x0c
0062 #define WM8776_IF_ADC256FS      (2 << 0)
0063 #define WM8776_IF_ADC384FS      (3 << 0)
0064 #define WM8776_IF_ADC512FS      (4 << 0)
0065 #define WM8776_IF_ADC768FS      (5 << 0)
0066 #define WM8776_IF_OVERSAMP64        (1 << 3)
0067 #define WM8776_IF_DAC128FS      (0 << 4)
0068 #define WM8776_IF_DAC192FS      (1 << 4)
0069 #define WM8776_IF_DAC256FS      (2 << 4)
0070 #define WM8776_IF_DAC384FS      (3 << 4)
0071 #define WM8776_IF_DAC512FS      (4 << 4)
0072 #define WM8776_IF_DAC768FS      (5 << 4)
0073 #define WM8776_IF_DAC_MASTER        (1 << 7)
0074 #define WM8776_IF_ADC_MASTER        (1 << 8)
0075 #define WM8776_REG_PWRDOWN  0x0d
0076 #define WM8776_PWR_PDWN         (1 << 0)
0077 #define WM8776_PWR_ADCPD        (1 << 1)
0078 #define WM8776_PWR_DACPD        (1 << 2)
0079 #define WM8776_PWR_HPPD         (1 << 3)
0080 #define WM8776_PWR_AINPD        (1 << 6)
0081 #define WM8776_REG_ADCLVOL  0x0e
0082 #define WM8776_REG_ADCRVOL  0x0f
0083 #define WM8776_ADC_GAIN_MASK        0xff
0084 #define WM8776_ADC_ZCEN         (1 << 8)
0085 #define WM8776_REG_ALCCTRL1 0x10
0086 #define WM8776_ALC1_LCT_MASK        0x0f    /* 0=-16dB, 1=-15dB..15=-1dB */
0087 #define WM8776_ALC1_MAXGAIN_MASK    0x70    /* 0,1=0dB, 2=+4dB...7=+24dB */
0088 #define WM8776_ALC1_LCSEL_MASK      0x180
0089 #define WM8776_ALC1_LCSEL_LIMITER   (0 << 7)
0090 #define WM8776_ALC1_LCSEL_ALCR      (1 << 7)
0091 #define WM8776_ALC1_LCSEL_ALCL      (2 << 7)
0092 #define WM8776_ALC1_LCSEL_ALCSTEREO (3 << 7)
0093 #define WM8776_REG_ALCCTRL2 0x11
0094 #define WM8776_ALC2_HOLD_MASK       0x0f    /*0=0ms, 1=2.67ms, 2=5.33ms.. */
0095 #define WM8776_ALC2_ZCEN        (1 << 7)
0096 #define WM8776_ALC2_LCEN        (1 << 8)
0097 #define WM8776_REG_ALCCTRL3 0x12
0098 #define WM8776_ALC3_ATK_MASK        0x0f
0099 #define WM8776_ALC3_DCY_MASK        0xf0
0100 #define WM8776_ALC3_FDECAY      (1 << 8)
0101 #define WM8776_REG_NOISEGATE    0x13
0102 #define WM8776_NGAT_ENABLE      (1 << 0)
0103 #define WM8776_NGAT_THR_MASK        0x1c    /*0=-78dB, 1=-72dB...7=-36dB */
0104 #define WM8776_REG_LIMITER  0x14
0105 #define WM8776_LIM_MAXATTEN_MASK    0x0f
0106 #define WM8776_LIM_TRANWIN_MASK     0x70    /*0=0us, 1=62.5us, 2=125us.. */
0107 #define WM8776_REG_ADCMUX   0x15
0108 #define WM8776_ADC_MUX_AIN1     (1 << 0)
0109 #define WM8776_ADC_MUX_AIN2     (1 << 1)
0110 #define WM8776_ADC_MUX_AIN3     (1 << 2)
0111 #define WM8776_ADC_MUX_AIN4     (1 << 3)
0112 #define WM8776_ADC_MUX_AIN5     (1 << 4)
0113 #define WM8776_ADC_MUTER        (1 << 6)
0114 #define WM8776_ADC_MUTEL        (1 << 7)
0115 #define WM8776_ADC_LRBOTH       (1 << 8)
0116 #define WM8776_REG_OUTMUX   0x16
0117 #define WM8776_OUTMUX_DAC       (1 << 0)
0118 #define WM8776_OUTMUX_AUX       (1 << 1)
0119 #define WM8776_OUTMUX_BYPASS        (1 << 2)
0120 #define WM8776_REG_RESET    0x17
0121
0122 #define WM8776_REG_COUNT    0x17    /* don't cache the RESET register */
0123
0124 struct snd_wm8776;
0125
0126 struct snd_wm8776_ops {
0127     void (*write)(struct snd_wm8776 *wm, u8 addr, u8 data);
0128 };
0129
0130 enum snd_wm8776_ctl_id {
0131     WM8776_CTL_DAC_VOL,
0132     WM8776_CTL_DAC_SW,
0133     WM8776_CTL_DAC_ZC_SW,
0134     WM8776_CTL_HP_VOL,
0135     WM8776_CTL_HP_SW,
0136     WM8776_CTL_HP_ZC_SW,
0137     WM8776_CTL_AUX_SW,
0138     WM8776_CTL_BYPASS_SW,
0139     WM8776_CTL_DAC_IZD_SW,
0140     WM8776_CTL_PHASE_SW,
0141     WM8776_CTL_DEEMPH_SW,
0142     WM8776_CTL_ADC_VOL,
0143     WM8776_CTL_ADC_SW,
0144     WM8776_CTL_INPUT1_SW,
0145     WM8776_CTL_INPUT2_SW,
0146     WM8776_CTL_INPUT3_SW,
0147     WM8776_CTL_INPUT4_SW,
0148     WM8776_CTL_INPUT5_SW,
0149     WM8776_CTL_AGC_SEL,
0150     WM8776_CTL_LIM_THR,
0151     WM8776_CTL_LIM_ATK,
0152     WM8776_CTL_LIM_DCY,
0153     WM8776_CTL_LIM_TRANWIN,
0154     WM8776_CTL_LIM_MAXATTN,
0155     WM8776_CTL_ALC_TGT,
0156     WM8776_CTL_ALC_ATK,
0157     WM8776_CTL_ALC_DCY,
0158     WM8776_CTL_ALC_MAXGAIN,
0159     WM8776_CTL_ALC_MAXATTN,
0160     WM8776_CTL_ALC_HLD,
0161     WM8776_CTL_NGT_SW,
0162     WM8776_CTL_NGT_THR,
0163
0164     WM8776_CTL_COUNT,
0165 };
0166
0167 #define WM8776_ENUM_MAX     16
0168
0169 #define WM8776_FLAG_STEREO  (1 << 0)
0170 #define WM8776_FLAG_VOL_UPDATE  (1 << 1)
0171 #define WM8776_FLAG_INVERT  (1 << 2)
0172 #define WM8776_FLAG_LIM     (1 << 3)
0173 #define WM8776_FLAG_ALC     (1 << 4)
0174
0175 struct snd_wm8776_ctl {
0176     const char *name;
0177     snd_ctl_elem_type_t type;
0178     const char *const enum_names[WM8776_ENUM_MAX];
0179     const unsigned int *tlv;
0180     u16 reg1, reg2, mask1, mask2, min, max, flags;
0181     void (*set)(struct snd_wm8776 *wm, u16 ch1, u16 ch2);
0182     void (*get)(struct snd_wm8776 *wm, u16 *ch1, u16 *ch2);
0183 };
0184
0185 enum snd_wm8776_agc_mode {
0186     WM8776_AGC_OFF,
0187     WM8776_AGC_LIM,
0188     WM8776_AGC_ALC_R,
0189     WM8776_AGC_ALC_L,
0190     WM8776_AGC_ALC_STEREO
0191 };
0192
0193 struct snd_wm8776 {
0194     struct snd_card *card;
0195     struct snd_wm8776_ctl ctl[WM8776_CTL_COUNT];
0196     enum snd_wm8776_agc_mode agc_mode;
0197     struct snd_wm8776_ops ops;
0198     u16 regs[WM8776_REG_COUNT]; /* 9-bit registers */
0199 };
0200
0201
0202
0203 void snd_wm8776_init(struct snd_wm8776 *wm);
0204 void snd_wm8776_resume(struct snd_wm8776 *wm);
0205 void snd_wm8776_set_power(struct snd_wm8776 *wm, u16 power);
0206 void snd_wm8776_volume_restore(struct snd_wm8776 *wm);
0207 int snd_wm8776_build_controls(struct snd_wm8776 *wm);
0208
0209 #endif /* __SOUND_WM8776_H */