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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *   ALSA driver for ICEnsemble VT1724 (Envy24HT)
0004  *
0005  *   Lowlevel functions for Audiotrak Prodigy 7.1 Hifi
0006  *   based on pontis.c
0007  *
0008  *      Copyright (c) 2007 Julian Scheel <julian@jusst.de>
0009  *      Copyright (c) 2007 allank
0010  *      Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
0011  */
0012 
0013 
0014 #include <linux/delay.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/init.h>
0017 #include <linux/slab.h>
0018 #include <linux/mutex.h>
0019 
0020 #include <sound/core.h>
0021 #include <sound/info.h>
0022 #include <sound/tlv.h>
0023 
0024 #include "ice1712.h"
0025 #include "envy24ht.h"
0026 #include "prodigy_hifi.h"
0027 
0028 struct prodigy_hifi_spec {
0029     unsigned short master[2];
0030     unsigned short vol[8];
0031 };
0032 
0033 /* I2C addresses */
0034 #define WM_DEV      0x34
0035 
0036 /* WM8776 registers */
0037 #define WM_HP_ATTEN_L       0x00    /* headphone left attenuation */
0038 #define WM_HP_ATTEN_R       0x01    /* headphone left attenuation */
0039 #define WM_HP_MASTER        0x02    /* headphone master (both channels),
0040                         override LLR */
0041 #define WM_DAC_ATTEN_L      0x03    /* digital left attenuation */
0042 #define WM_DAC_ATTEN_R      0x04
0043 #define WM_DAC_MASTER       0x05
0044 #define WM_PHASE_SWAP       0x06    /* DAC phase swap */
0045 #define WM_DAC_CTRL1        0x07
0046 #define WM_DAC_MUTE     0x08
0047 #define WM_DAC_CTRL2        0x09
0048 #define WM_DAC_INT      0x0a
0049 #define WM_ADC_INT      0x0b
0050 #define WM_MASTER_CTRL      0x0c
0051 #define WM_POWERDOWN        0x0d
0052 #define WM_ADC_ATTEN_L      0x0e
0053 #define WM_ADC_ATTEN_R      0x0f
0054 #define WM_ALC_CTRL1        0x10
0055 #define WM_ALC_CTRL2        0x11
0056 #define WM_ALC_CTRL3        0x12
0057 #define WM_NOISE_GATE       0x13
0058 #define WM_LIMITER      0x14
0059 #define WM_ADC_MUX      0x15
0060 #define WM_OUT_MUX      0x16
0061 #define WM_RESET        0x17
0062 
0063 /* Analog Recording Source :- Mic, LineIn, CD/Video, */
0064 
0065 /* implement capture source select control for WM8776 */
0066 
0067 #define WM_AIN1 "AIN1"
0068 #define WM_AIN2 "AIN2"
0069 #define WM_AIN3 "AIN3"
0070 #define WM_AIN4 "AIN4"
0071 #define WM_AIN5 "AIN5"
0072 
0073 /* GPIO pins of envy24ht connected to wm8766 */
0074 #define WM8766_SPI_CLK   (1<<17) /* CLK, Pin97 on ICE1724 */
0075 #define WM8766_SPI_MD     (1<<16) /* DATA VT1724 -> WM8766, Pin96 */
0076 #define WM8766_SPI_ML     (1<<18) /* Latch, Pin98 */
0077 
0078 /* WM8766 registers */
0079 #define WM8766_DAC_CTRL  0x02   /* DAC Control */
0080 #define WM8766_INT_CTRL  0x03   /* Interface Control */
0081 #define WM8766_DAC_CTRL2    0x09
0082 #define WM8766_DAC_CTRL3    0x0a
0083 #define WM8766_RESET        0x1f
0084 #define WM8766_LDA1      0x00
0085 #define WM8766_LDA2      0x04
0086 #define WM8766_LDA3      0x06
0087 #define WM8766_RDA1      0x01
0088 #define WM8766_RDA2      0x05
0089 #define WM8766_RDA3      0x07
0090 #define WM8766_MUTE1        0x0C
0091 #define WM8766_MUTE2        0x0F
0092 
0093 
0094 /*
0095  * Prodigy HD2
0096  */
0097 #define AK4396_ADDR    0x00
0098 #define AK4396_CSN    (1 << 8)    /* CSN->GPIO8, pin 75 */
0099 #define AK4396_CCLK   (1 << 9)    /* CCLK->GPIO9, pin 76 */
0100 #define AK4396_CDTI   (1 << 10)   /* CDTI->GPIO10, pin 77 */
0101 
0102 /* ak4396 registers */
0103 #define AK4396_CTRL1        0x00
0104 #define AK4396_CTRL2        0x01
0105 #define AK4396_CTRL3        0x02
0106 #define AK4396_LCH_ATT    0x03
0107 #define AK4396_RCH_ATT    0x04
0108 
0109 
0110 /*
0111  * get the current register value of WM codec
0112  */
0113 static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
0114 {
0115     reg <<= 1;
0116     return ((unsigned short)ice->akm[0].images[reg] << 8) |
0117         ice->akm[0].images[reg + 1];
0118 }
0119 
0120 /*
0121  * set the register value of WM codec and remember it
0122  */
0123 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
0124 {
0125     unsigned short cval;
0126     cval = (reg << 9) | val;
0127     snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
0128 }
0129 
0130 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
0131 {
0132     wm_put_nocache(ice, reg, val);
0133     reg <<= 1;
0134     ice->akm[0].images[reg] = val >> 8;
0135     ice->akm[0].images[reg + 1] = val;
0136 }
0137 
0138 /*
0139  * write data in the SPI mode
0140  */
0141 
0142 static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
0143 {
0144     unsigned int tmp = snd_ice1712_gpio_read(ice);
0145     if (val)
0146         tmp |= bit;
0147     else
0148         tmp &= ~bit;
0149     snd_ice1712_gpio_write(ice, tmp);
0150 }
0151 
0152 /*
0153  * SPI implementation for WM8766 codec - only writing supported, no readback
0154  */
0155 
0156 static void wm8766_spi_send_word(struct snd_ice1712 *ice, unsigned int data)
0157 {
0158     int i;
0159     for (i = 0; i < 16; i++) {
0160         set_gpio_bit(ice, WM8766_SPI_CLK, 0);
0161         udelay(1);
0162         set_gpio_bit(ice, WM8766_SPI_MD, data & 0x8000);
0163         udelay(1);
0164         set_gpio_bit(ice, WM8766_SPI_CLK, 1);
0165         udelay(1);
0166         data <<= 1;
0167     }
0168 }
0169 
0170 static void wm8766_spi_write(struct snd_ice1712 *ice, unsigned int reg,
0171                  unsigned int data)
0172 {
0173     unsigned int block;
0174 
0175     snd_ice1712_gpio_set_dir(ice, WM8766_SPI_MD|
0176                     WM8766_SPI_CLK|WM8766_SPI_ML);
0177     snd_ice1712_gpio_set_mask(ice, ~(WM8766_SPI_MD|
0178                     WM8766_SPI_CLK|WM8766_SPI_ML));
0179     /* latch must be low when writing */
0180     set_gpio_bit(ice, WM8766_SPI_ML, 0);
0181     block = (reg << 9) | (data & 0x1ff);
0182     wm8766_spi_send_word(ice, block); /* REGISTER ADDRESS */
0183     /* release latch */
0184     set_gpio_bit(ice, WM8766_SPI_ML, 1);
0185     udelay(1);
0186     /* restore */
0187     snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
0188     snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
0189 }
0190 
0191 
0192 /*
0193  * serial interface for ak4396 - only writing supported, no readback
0194  */
0195 
0196 static void ak4396_send_word(struct snd_ice1712 *ice, unsigned int data)
0197 {
0198     int i;
0199     for (i = 0; i < 16; i++) {
0200         set_gpio_bit(ice, AK4396_CCLK, 0);
0201         udelay(1);
0202         set_gpio_bit(ice, AK4396_CDTI, data & 0x8000);
0203         udelay(1);
0204         set_gpio_bit(ice, AK4396_CCLK, 1);
0205         udelay(1);
0206         data <<= 1;
0207     }
0208 }
0209 
0210 static void ak4396_write(struct snd_ice1712 *ice, unsigned int reg,
0211              unsigned int data)
0212 {
0213     unsigned int block;
0214 
0215     snd_ice1712_gpio_set_dir(ice, AK4396_CSN|AK4396_CCLK|AK4396_CDTI);
0216     snd_ice1712_gpio_set_mask(ice, ~(AK4396_CSN|AK4396_CCLK|AK4396_CDTI));
0217     /* latch must be low when writing */
0218     set_gpio_bit(ice, AK4396_CSN, 0); 
0219     block =  ((AK4396_ADDR & 0x03) << 14) | (1 << 13) |
0220             ((reg & 0x1f) << 8) | (data & 0xff);
0221     ak4396_send_word(ice, block); /* REGISTER ADDRESS */
0222     /* release latch */
0223     set_gpio_bit(ice, AK4396_CSN, 1);
0224     udelay(1);
0225     /* restore */
0226     snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
0227     snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
0228 }
0229 
0230 
0231 /*
0232  * ak4396 mixers
0233  */
0234 
0235 
0236 
0237 /*
0238  * DAC volume attenuation mixer control (-64dB to 0dB)
0239  */
0240 
0241 static int ak4396_dac_vol_info(struct snd_kcontrol *kcontrol,
0242                    struct snd_ctl_elem_info *uinfo)
0243 {
0244     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0245     uinfo->count = 2;
0246     uinfo->value.integer.min = 0;   /* mute */
0247     uinfo->value.integer.max = 0xFF; /* linear */
0248     return 0;
0249 }
0250 
0251 static int ak4396_dac_vol_get(struct snd_kcontrol *kcontrol,
0252                   struct snd_ctl_elem_value *ucontrol)
0253 {
0254     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0255     struct prodigy_hifi_spec *spec = ice->spec;
0256     int i;
0257     
0258     for (i = 0; i < 2; i++)
0259         ucontrol->value.integer.value[i] = spec->vol[i];
0260 
0261     return 0;
0262 }
0263 
0264 static int ak4396_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0265 {
0266     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0267     struct prodigy_hifi_spec *spec = ice->spec;
0268     int i;
0269     int change = 0;
0270     
0271     mutex_lock(&ice->gpio_mutex);
0272     for (i = 0; i < 2; i++) {
0273         if (ucontrol->value.integer.value[i] != spec->vol[i]) {
0274             spec->vol[i] = ucontrol->value.integer.value[i];
0275             ak4396_write(ice, AK4396_LCH_ATT + i,
0276                      spec->vol[i] & 0xff);
0277             change = 1;
0278         }
0279     }
0280     mutex_unlock(&ice->gpio_mutex);
0281     return change;
0282 }
0283 
0284 static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
0285 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
0286 
0287 static const struct snd_kcontrol_new prodigy_hd2_controls[] = {
0288     {
0289     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0290     .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0291         SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0292     .name = "Front Playback Volume",
0293     .info = ak4396_dac_vol_info,
0294     .get = ak4396_dac_vol_get,
0295     .put = ak4396_dac_vol_put,
0296     .tlv = { .p = ak4396_db_scale },
0297     },
0298 };
0299 
0300 
0301 /* --------------- */
0302 
0303 #define WM_VOL_MAX  255
0304 #define WM_VOL_MUTE 0x8000
0305 
0306 
0307 #define DAC_0dB 0xff
0308 #define DAC_RES 128
0309 #define DAC_MIN (DAC_0dB - DAC_RES)
0310 
0311 
0312 static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index,
0313                unsigned short vol, unsigned short master)
0314 {
0315     unsigned char nvol;
0316     
0317     if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
0318         nvol = 0;
0319     else {
0320         nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
0321                 & WM_VOL_MAX;
0322         nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
0323     }
0324     
0325     wm_put(ice, index, nvol);
0326     wm_put_nocache(ice, index, 0x100 | nvol);
0327 }
0328 
0329 static void wm8766_set_vol(struct snd_ice1712 *ice, unsigned int index,
0330                unsigned short vol, unsigned short master)
0331 {
0332     unsigned char nvol;
0333     
0334     if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
0335         nvol = 0;
0336     else {
0337         nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
0338                 & WM_VOL_MAX;
0339         nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
0340     }
0341 
0342     wm8766_spi_write(ice, index, (0x0100 | nvol));
0343 }
0344 
0345 
0346 /*
0347  * DAC volume attenuation mixer control (-64dB to 0dB)
0348  */
0349 
0350 static int wm_dac_vol_info(struct snd_kcontrol *kcontrol,
0351                struct snd_ctl_elem_info *uinfo)
0352 {
0353     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0354     uinfo->count = 2;
0355     uinfo->value.integer.min = 0;   /* mute */
0356     uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
0357     return 0;
0358 }
0359 
0360 static int wm_dac_vol_get(struct snd_kcontrol *kcontrol,
0361               struct snd_ctl_elem_value *ucontrol)
0362 {
0363     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0364     struct prodigy_hifi_spec *spec = ice->spec;
0365     int i;
0366 
0367     for (i = 0; i < 2; i++)
0368         ucontrol->value.integer.value[i] =
0369             spec->vol[2 + i] & ~WM_VOL_MUTE;
0370     return 0;
0371 }
0372 
0373 static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0374 {
0375     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0376     struct prodigy_hifi_spec *spec = ice->spec;
0377     int i, idx, change = 0;
0378 
0379     mutex_lock(&ice->gpio_mutex);
0380     for (i = 0; i < 2; i++) {
0381         if (ucontrol->value.integer.value[i] != spec->vol[2 + i]) {
0382             idx = WM_DAC_ATTEN_L + i;
0383             spec->vol[2 + i] &= WM_VOL_MUTE;
0384             spec->vol[2 + i] |= ucontrol->value.integer.value[i];
0385             wm_set_vol(ice, idx, spec->vol[2 + i], spec->master[i]);
0386             change = 1;
0387         }
0388     }
0389     mutex_unlock(&ice->gpio_mutex);
0390     return change;
0391 }
0392 
0393 
0394 /*
0395  * WM8766 DAC volume attenuation mixer control
0396  */
0397 static int wm8766_vol_info(struct snd_kcontrol *kcontrol,
0398                struct snd_ctl_elem_info *uinfo)
0399 {
0400     int voices = kcontrol->private_value >> 8;
0401     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0402     uinfo->count = voices;
0403     uinfo->value.integer.min = 0;       /* mute */
0404     uinfo->value.integer.max = DAC_RES; /* 0dB */
0405     return 0;
0406 }
0407 
0408 static int wm8766_vol_get(struct snd_kcontrol *kcontrol,
0409               struct snd_ctl_elem_value *ucontrol)
0410 {
0411     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0412     struct prodigy_hifi_spec *spec = ice->spec;
0413     int i, ofs, voices;
0414 
0415     voices = kcontrol->private_value >> 8;
0416     ofs = kcontrol->private_value & 0xff;
0417     for (i = 0; i < voices; i++)
0418         ucontrol->value.integer.value[i] = spec->vol[ofs + i];
0419     return 0;
0420 }
0421 
0422 static int wm8766_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0423 {
0424     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0425     struct prodigy_hifi_spec *spec = ice->spec;
0426     int i, idx, ofs, voices;
0427     int change = 0;
0428 
0429     voices = kcontrol->private_value >> 8;
0430     ofs = kcontrol->private_value & 0xff;
0431     mutex_lock(&ice->gpio_mutex);
0432     for (i = 0; i < voices; i++) {
0433         if (ucontrol->value.integer.value[i] != spec->vol[ofs + i]) {
0434             idx = WM8766_LDA1 + ofs + i;
0435             spec->vol[ofs + i] &= WM_VOL_MUTE;
0436             spec->vol[ofs + i] |= ucontrol->value.integer.value[i];
0437             wm8766_set_vol(ice, idx,
0438                        spec->vol[ofs + i], spec->master[i]);
0439             change = 1;
0440         }
0441     }
0442     mutex_unlock(&ice->gpio_mutex);
0443     return change;
0444 }
0445 
0446 /*
0447  * Master volume attenuation mixer control / applied to WM8776+WM8766
0448  */
0449 static int wm_master_vol_info(struct snd_kcontrol *kcontrol,
0450                   struct snd_ctl_elem_info *uinfo)
0451 {
0452     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0453     uinfo->count = 2;
0454     uinfo->value.integer.min = 0;
0455     uinfo->value.integer.max = DAC_RES;
0456     return 0;
0457 }
0458 
0459 static int wm_master_vol_get(struct snd_kcontrol *kcontrol,
0460                  struct snd_ctl_elem_value *ucontrol)
0461 {
0462     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0463     struct prodigy_hifi_spec *spec = ice->spec;
0464     int i;
0465     for (i = 0; i < 2; i++)
0466         ucontrol->value.integer.value[i] = spec->master[i];
0467     return 0;
0468 }
0469 
0470 static int wm_master_vol_put(struct snd_kcontrol *kcontrol,
0471                  struct snd_ctl_elem_value *ucontrol)
0472 {
0473     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0474     struct prodigy_hifi_spec *spec = ice->spec;
0475     int ch, change = 0;
0476 
0477     mutex_lock(&ice->gpio_mutex);
0478     for (ch = 0; ch < 2; ch++) {
0479         if (ucontrol->value.integer.value[ch] != spec->master[ch]) {
0480             spec->master[ch] = ucontrol->value.integer.value[ch];
0481 
0482             /* Apply to front DAC */
0483             wm_set_vol(ice, WM_DAC_ATTEN_L + ch,
0484                    spec->vol[2 + ch], spec->master[ch]);
0485 
0486             wm8766_set_vol(ice, WM8766_LDA1 + ch,
0487                        spec->vol[0 + ch], spec->master[ch]);
0488 
0489             wm8766_set_vol(ice, WM8766_LDA2 + ch,
0490                        spec->vol[4 + ch], spec->master[ch]);
0491 
0492             wm8766_set_vol(ice, WM8766_LDA3 + ch,
0493                        spec->vol[6 + ch], spec->master[ch]);
0494             change = 1;
0495         }
0496     }
0497     mutex_unlock(&ice->gpio_mutex); 
0498     return change;
0499 }
0500 
0501 
0502 /* KONSTI */
0503 
0504 static int wm_adc_mux_enum_info(struct snd_kcontrol *kcontrol,
0505                 struct snd_ctl_elem_info *uinfo)
0506 {
0507     static const char * const texts[32] = {
0508         "NULL", WM_AIN1, WM_AIN2, WM_AIN1 "+" WM_AIN2,
0509         WM_AIN3, WM_AIN1 "+" WM_AIN3, WM_AIN2 "+" WM_AIN3,
0510         WM_AIN1 "+" WM_AIN2 "+" WM_AIN3,
0511         WM_AIN4, WM_AIN1 "+" WM_AIN4, WM_AIN2 "+" WM_AIN4,
0512         WM_AIN1 "+" WM_AIN2 "+" WM_AIN4,
0513         WM_AIN3 "+" WM_AIN4, WM_AIN1 "+" WM_AIN3 "+" WM_AIN4,
0514         WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
0515         WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
0516         WM_AIN5, WM_AIN1 "+" WM_AIN5, WM_AIN2 "+" WM_AIN5,
0517         WM_AIN1 "+" WM_AIN2 "+" WM_AIN5,
0518         WM_AIN3 "+" WM_AIN5, WM_AIN1 "+" WM_AIN3 "+" WM_AIN5,
0519         WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
0520         WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
0521         WM_AIN4 "+" WM_AIN5, WM_AIN1 "+" WM_AIN4 "+" WM_AIN5,
0522         WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
0523         WM_AIN1 "+" WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
0524         WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
0525         WM_AIN1 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
0526         WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
0527         WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5
0528     };
0529 
0530     return snd_ctl_enum_info(uinfo, 1, 32, texts);
0531 }
0532 
0533 static int wm_adc_mux_enum_get(struct snd_kcontrol *kcontrol,
0534                    struct snd_ctl_elem_value *ucontrol)
0535 {
0536     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0537 
0538     mutex_lock(&ice->gpio_mutex);
0539     ucontrol->value.enumerated.item[0] = wm_get(ice, WM_ADC_MUX) & 0x1f;
0540     mutex_unlock(&ice->gpio_mutex);
0541     return 0;
0542 }
0543 
0544 static int wm_adc_mux_enum_put(struct snd_kcontrol *kcontrol,
0545                    struct snd_ctl_elem_value *ucontrol)
0546 {
0547     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0548     unsigned short oval, nval;
0549     int change = 0;
0550 
0551     mutex_lock(&ice->gpio_mutex);
0552     oval = wm_get(ice, WM_ADC_MUX);
0553     nval = (oval & 0xe0) | ucontrol->value.enumerated.item[0];
0554     if (nval != oval) {
0555         wm_put(ice, WM_ADC_MUX, nval);
0556         change = 1;
0557     }
0558     mutex_unlock(&ice->gpio_mutex);
0559     return change;
0560 }
0561 
0562 /* KONSTI */
0563 
0564 /*
0565  * ADC gain mixer control (-64dB to 0dB)
0566  */
0567 
0568 #define ADC_0dB 0xcf
0569 #define ADC_RES 128
0570 #define ADC_MIN (ADC_0dB - ADC_RES)
0571 
0572 static int wm_adc_vol_info(struct snd_kcontrol *kcontrol,
0573                struct snd_ctl_elem_info *uinfo)
0574 {
0575     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0576     uinfo->count = 2;
0577     uinfo->value.integer.min = 0;   /* mute (-64dB) */
0578     uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
0579     return 0;
0580 }
0581 
0582 static int wm_adc_vol_get(struct snd_kcontrol *kcontrol,
0583               struct snd_ctl_elem_value *ucontrol)
0584 {
0585     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0586     unsigned short val;
0587     int i;
0588 
0589     mutex_lock(&ice->gpio_mutex);
0590     for (i = 0; i < 2; i++) {
0591         val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
0592         val = val > ADC_MIN ? (val - ADC_MIN) : 0;
0593         ucontrol->value.integer.value[i] = val;
0594     }
0595     mutex_unlock(&ice->gpio_mutex);
0596     return 0;
0597 }
0598 
0599 static int wm_adc_vol_put(struct snd_kcontrol *kcontrol,
0600               struct snd_ctl_elem_value *ucontrol)
0601 {
0602     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0603     unsigned short ovol, nvol;
0604     int i, idx, change = 0;
0605 
0606     mutex_lock(&ice->gpio_mutex);
0607     for (i = 0; i < 2; i++) {
0608         nvol = ucontrol->value.integer.value[i];
0609         nvol = nvol ? (nvol + ADC_MIN) : 0;
0610         idx  = WM_ADC_ATTEN_L + i;
0611         ovol = wm_get(ice, idx) & 0xff;
0612         if (ovol != nvol) {
0613             wm_put(ice, idx, nvol);
0614             change = 1;
0615         }
0616     }
0617     mutex_unlock(&ice->gpio_mutex);
0618     return change;
0619 }
0620 
0621 /*
0622  * ADC input mux mixer control
0623  */
0624 #define wm_adc_mux_info     snd_ctl_boolean_mono_info
0625 
0626 static int wm_adc_mux_get(struct snd_kcontrol *kcontrol,
0627               struct snd_ctl_elem_value *ucontrol)
0628 {
0629     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0630     int bit = kcontrol->private_value;
0631 
0632     mutex_lock(&ice->gpio_mutex);
0633     ucontrol->value.integer.value[0] =
0634         (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
0635     mutex_unlock(&ice->gpio_mutex);
0636     return 0;
0637 }
0638 
0639 static int wm_adc_mux_put(struct snd_kcontrol *kcontrol,
0640               struct snd_ctl_elem_value *ucontrol)
0641 {
0642     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0643     int bit = kcontrol->private_value;
0644     unsigned short oval, nval;
0645     int change;
0646 
0647     mutex_lock(&ice->gpio_mutex);
0648     nval = oval = wm_get(ice, WM_ADC_MUX);
0649     if (ucontrol->value.integer.value[0])
0650         nval |= (1 << bit);
0651     else
0652         nval &= ~(1 << bit);
0653     change = nval != oval;
0654     if (change) {
0655         wm_put(ice, WM_ADC_MUX, nval);
0656     }
0657     mutex_unlock(&ice->gpio_mutex);
0658     return 0;
0659 }
0660 
0661 /*
0662  * Analog bypass (In -> Out)
0663  */
0664 #define wm_bypass_info      snd_ctl_boolean_mono_info
0665 
0666 static int wm_bypass_get(struct snd_kcontrol *kcontrol,
0667              struct snd_ctl_elem_value *ucontrol)
0668 {
0669     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0670 
0671     mutex_lock(&ice->gpio_mutex);
0672     ucontrol->value.integer.value[0] =
0673         (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
0674     mutex_unlock(&ice->gpio_mutex);
0675     return 0;
0676 }
0677 
0678 static int wm_bypass_put(struct snd_kcontrol *kcontrol,
0679              struct snd_ctl_elem_value *ucontrol)
0680 {
0681     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0682     unsigned short val, oval;
0683     int change = 0;
0684 
0685     mutex_lock(&ice->gpio_mutex);
0686     val = oval = wm_get(ice, WM_OUT_MUX);
0687     if (ucontrol->value.integer.value[0])
0688         val |= 0x04;
0689     else
0690         val &= ~0x04;
0691     if (val != oval) {
0692         wm_put(ice, WM_OUT_MUX, val);
0693         change = 1;
0694     }
0695     mutex_unlock(&ice->gpio_mutex);
0696     return change;
0697 }
0698 
0699 /*
0700  * Left/Right swap
0701  */
0702 #define wm_chswap_info      snd_ctl_boolean_mono_info
0703 
0704 static int wm_chswap_get(struct snd_kcontrol *kcontrol,
0705              struct snd_ctl_elem_value *ucontrol)
0706 {
0707     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0708 
0709     mutex_lock(&ice->gpio_mutex);
0710     ucontrol->value.integer.value[0] =
0711             (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
0712     mutex_unlock(&ice->gpio_mutex);
0713     return 0;
0714 }
0715 
0716 static int wm_chswap_put(struct snd_kcontrol *kcontrol,
0717              struct snd_ctl_elem_value *ucontrol)
0718 {
0719     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0720     unsigned short val, oval;
0721     int change = 0;
0722 
0723     mutex_lock(&ice->gpio_mutex);
0724     oval = wm_get(ice, WM_DAC_CTRL1);
0725     val = oval & 0x0f;
0726     if (ucontrol->value.integer.value[0])
0727         val |= 0x60;
0728     else
0729         val |= 0x90;
0730     if (val != oval) {
0731         wm_put(ice, WM_DAC_CTRL1, val);
0732         wm_put_nocache(ice, WM_DAC_CTRL1, val);
0733         change = 1;
0734     }
0735     mutex_unlock(&ice->gpio_mutex);
0736     return change;
0737 }
0738 
0739 
0740 /*
0741  * mixers
0742  */
0743 
0744 static const struct snd_kcontrol_new prodigy_hifi_controls[] = {
0745     {
0746         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0747         .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0748                SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0749         .name = "Master Playback Volume",
0750         .info = wm_master_vol_info,
0751         .get = wm_master_vol_get,
0752         .put = wm_master_vol_put,
0753         .tlv = { .p = db_scale_wm_dac }
0754     },
0755     {
0756         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0757         .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0758                SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0759         .name = "Front Playback Volume",
0760         .info = wm_dac_vol_info,
0761         .get = wm_dac_vol_get,
0762         .put = wm_dac_vol_put,
0763         .tlv = { .p = db_scale_wm_dac },
0764     },
0765     {
0766         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0767         .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0768                SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0769         .name = "Rear Playback Volume",
0770         .info = wm8766_vol_info,
0771         .get = wm8766_vol_get,
0772         .put = wm8766_vol_put,
0773         .private_value = (2 << 8) | 0,
0774         .tlv = { .p = db_scale_wm_dac },
0775     },
0776     {
0777         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0778         .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0779                SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0780         .name = "Center Playback Volume",
0781         .info = wm8766_vol_info,
0782         .get = wm8766_vol_get,
0783         .put = wm8766_vol_put,
0784         .private_value = (1 << 8) | 4,
0785         .tlv = { .p = db_scale_wm_dac }
0786     },
0787     {
0788         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0789         .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0790                SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0791         .name = "LFE Playback Volume",
0792         .info = wm8766_vol_info,
0793         .get = wm8766_vol_get,
0794         .put = wm8766_vol_put,
0795         .private_value = (1 << 8) | 5,
0796         .tlv = { .p = db_scale_wm_dac }
0797     },
0798     {
0799         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0800         .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0801                SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0802         .name = "Side Playback Volume",
0803         .info = wm8766_vol_info,
0804         .get = wm8766_vol_get,
0805         .put = wm8766_vol_put,
0806         .private_value = (2 << 8) | 6,
0807         .tlv = { .p = db_scale_wm_dac },
0808     },
0809     {
0810         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0811         .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
0812                SNDRV_CTL_ELEM_ACCESS_TLV_READ),
0813         .name = "Capture Volume",
0814         .info = wm_adc_vol_info,
0815         .get = wm_adc_vol_get,
0816         .put = wm_adc_vol_put,
0817         .tlv = { .p = db_scale_wm_dac },
0818     },
0819     {
0820         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0821         .name = "CD Capture Switch",
0822         .info = wm_adc_mux_info,
0823         .get = wm_adc_mux_get,
0824         .put = wm_adc_mux_put,
0825         .private_value = 0,
0826     },
0827     {
0828         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0829         .name = "Line Capture Switch",
0830         .info = wm_adc_mux_info,
0831         .get = wm_adc_mux_get,
0832         .put = wm_adc_mux_put,
0833         .private_value = 1,
0834     },
0835     {
0836         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0837         .name = "Analog Bypass Switch",
0838         .info = wm_bypass_info,
0839         .get = wm_bypass_get,
0840         .put = wm_bypass_put,
0841     },
0842     {
0843         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0844         .name = "Swap Output Channels",
0845         .info = wm_chswap_info,
0846         .get = wm_chswap_get,
0847         .put = wm_chswap_put,
0848     },
0849     {
0850         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0851         .name = "Analog Capture Source",
0852         .info = wm_adc_mux_enum_info,
0853         .get = wm_adc_mux_enum_get,
0854         .put = wm_adc_mux_enum_put,
0855     },
0856 };
0857 
0858 /*
0859  * WM codec registers
0860  */
0861 static void wm_proc_regs_write(struct snd_info_entry *entry,
0862                    struct snd_info_buffer *buffer)
0863 {
0864     struct snd_ice1712 *ice = entry->private_data;
0865     char line[64];
0866     unsigned int reg, val;
0867     mutex_lock(&ice->gpio_mutex);
0868     while (!snd_info_get_line(buffer, line, sizeof(line))) {
0869         if (sscanf(line, "%x %x", &reg, &val) != 2)
0870             continue;
0871         if (reg <= 0x17 && val <= 0xffff)
0872             wm_put(ice, reg, val);
0873     }
0874     mutex_unlock(&ice->gpio_mutex);
0875 }
0876 
0877 static void wm_proc_regs_read(struct snd_info_entry *entry,
0878                   struct snd_info_buffer *buffer)
0879 {
0880     struct snd_ice1712 *ice = entry->private_data;
0881     int reg, val;
0882 
0883     mutex_lock(&ice->gpio_mutex);
0884     for (reg = 0; reg <= 0x17; reg++) {
0885         val = wm_get(ice, reg);
0886         snd_iprintf(buffer, "%02x = %04x\n", reg, val);
0887     }
0888     mutex_unlock(&ice->gpio_mutex);
0889 }
0890 
0891 static void wm_proc_init(struct snd_ice1712 *ice)
0892 {
0893     snd_card_rw_proc_new(ice->card, "wm_codec", ice, wm_proc_regs_read,
0894                  wm_proc_regs_write);
0895 }
0896 
0897 static int prodigy_hifi_add_controls(struct snd_ice1712 *ice)
0898 {
0899     unsigned int i;
0900     int err;
0901 
0902     for (i = 0; i < ARRAY_SIZE(prodigy_hifi_controls); i++) {
0903         err = snd_ctl_add(ice->card,
0904                   snd_ctl_new1(&prodigy_hifi_controls[i], ice));
0905         if (err < 0)
0906             return err;
0907     }
0908 
0909     wm_proc_init(ice);
0910 
0911     return 0;
0912 }
0913 
0914 static int prodigy_hd2_add_controls(struct snd_ice1712 *ice)
0915 {
0916     unsigned int i;
0917     int err;
0918 
0919     for (i = 0; i < ARRAY_SIZE(prodigy_hd2_controls); i++) {
0920         err = snd_ctl_add(ice->card,
0921                   snd_ctl_new1(&prodigy_hd2_controls[i], ice));
0922         if (err < 0)
0923             return err;
0924     }
0925 
0926     wm_proc_init(ice);
0927 
0928     return 0;
0929 }
0930 
0931 static void wm8766_init(struct snd_ice1712 *ice)
0932 {
0933     static const unsigned short wm8766_inits[] = {
0934         WM8766_RESET,      0x0000,
0935         WM8766_DAC_CTRL,    0x0120,
0936         WM8766_INT_CTRL,    0x0022, /* I2S Normal Mode, 24 bit */
0937         WM8766_DAC_CTRL2,       0x0001,
0938         WM8766_DAC_CTRL3,       0x0080,
0939         WM8766_LDA1,        0x0100,
0940         WM8766_LDA2,        0x0100,
0941         WM8766_LDA3,        0x0100,
0942         WM8766_RDA1,        0x0100,
0943         WM8766_RDA2,        0x0100,
0944         WM8766_RDA3,        0x0100,
0945         WM8766_MUTE1,      0x0000,
0946         WM8766_MUTE2,      0x0000,
0947     };
0948     unsigned int i;
0949 
0950     for (i = 0; i < ARRAY_SIZE(wm8766_inits); i += 2)
0951         wm8766_spi_write(ice, wm8766_inits[i], wm8766_inits[i + 1]);
0952 }
0953 
0954 static void wm8776_init(struct snd_ice1712 *ice)
0955 {
0956     static const unsigned short wm8776_inits[] = {
0957         /* These come first to reduce init pop noise */
0958         WM_ADC_MUX, 0x0003, /* ADC mute */
0959         /* 0x00c0 replaced by 0x0003 */
0960         
0961         WM_DAC_MUTE,    0x0001, /* DAC softmute */
0962         WM_DAC_CTRL1,   0x0000, /* DAC mute */
0963 
0964         WM_POWERDOWN,   0x0008, /* All power-up except HP */
0965         WM_RESET,   0x0000, /* reset */
0966     };
0967     unsigned int i;
0968 
0969     for (i = 0; i < ARRAY_SIZE(wm8776_inits); i += 2)
0970         wm_put(ice, wm8776_inits[i], wm8776_inits[i + 1]);
0971 }
0972 
0973 #ifdef CONFIG_PM_SLEEP
0974 static int prodigy_hifi_resume(struct snd_ice1712 *ice)
0975 {
0976     static const unsigned short wm8776_reinit_registers[] = {
0977         WM_MASTER_CTRL,
0978         WM_DAC_INT,
0979         WM_ADC_INT,
0980         WM_OUT_MUX,
0981         WM_HP_ATTEN_L,
0982         WM_HP_ATTEN_R,
0983         WM_PHASE_SWAP,
0984         WM_DAC_CTRL2,
0985         WM_ADC_ATTEN_L,
0986         WM_ADC_ATTEN_R,
0987         WM_ALC_CTRL1,
0988         WM_ALC_CTRL2,
0989         WM_ALC_CTRL3,
0990         WM_NOISE_GATE,
0991         WM_ADC_MUX,
0992         /* no DAC attenuation here */
0993     };
0994     struct prodigy_hifi_spec *spec = ice->spec;
0995     int i, ch;
0996 
0997     mutex_lock(&ice->gpio_mutex);
0998 
0999     /* reinitialize WM8776 and re-apply old register values */
1000     wm8776_init(ice);
1001     schedule_timeout_uninterruptible(1);
1002     for (i = 0; i < ARRAY_SIZE(wm8776_reinit_registers); i++)
1003         wm_put(ice, wm8776_reinit_registers[i],
1004                wm_get(ice, wm8776_reinit_registers[i]));
1005 
1006     /* reinitialize WM8766 and re-apply volumes for all DACs */
1007     wm8766_init(ice);
1008     for (ch = 0; ch < 2; ch++) {
1009         wm_set_vol(ice, WM_DAC_ATTEN_L + ch,
1010                spec->vol[2 + ch], spec->master[ch]);
1011 
1012         wm8766_set_vol(ice, WM8766_LDA1 + ch,
1013                    spec->vol[0 + ch], spec->master[ch]);
1014 
1015         wm8766_set_vol(ice, WM8766_LDA2 + ch,
1016                    spec->vol[4 + ch], spec->master[ch]);
1017 
1018         wm8766_set_vol(ice, WM8766_LDA3 + ch,
1019                    spec->vol[6 + ch], spec->master[ch]);
1020     }
1021 
1022     /* unmute WM8776 DAC */
1023     wm_put(ice, WM_DAC_MUTE, 0x00);
1024     wm_put(ice, WM_DAC_CTRL1, 0x90);
1025 
1026     mutex_unlock(&ice->gpio_mutex);
1027     return 0;
1028 }
1029 #endif
1030 
1031 /*
1032  * initialize the chip
1033  */
1034 static int prodigy_hifi_init(struct snd_ice1712 *ice)
1035 {
1036     static const unsigned short wm8776_defaults[] = {
1037         WM_MASTER_CTRL,  0x0022, /* 256fs, slave mode */
1038         WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
1039         WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
1040         WM_DAC_CTRL1,   0x0090, /* DAC L/R */
1041         WM_OUT_MUX, 0x0001, /* OUT DAC */
1042         WM_HP_ATTEN_L,  0x0179, /* HP 0dB */
1043         WM_HP_ATTEN_R,  0x0179, /* HP 0dB */
1044         WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
1045         WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
1046         WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
1047         WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
1048         WM_PHASE_SWAP,  0x0000, /* phase normal */
1049 #if 0
1050         WM_DAC_MASTER,  0x0100, /* DAC master muted */
1051 #endif
1052         WM_DAC_CTRL2,   0x0000, /* no deemphasis, no ZFLG */
1053         WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
1054         WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
1055 #if 1
1056         WM_ALC_CTRL1,   0x007b, /* */
1057         WM_ALC_CTRL2,   0x0000, /* */
1058         WM_ALC_CTRL3,   0x0000, /* */
1059         WM_NOISE_GATE,  0x0000, /* */
1060 #endif
1061         WM_DAC_MUTE,    0x0000, /* DAC unmute */
1062         WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
1063     };
1064     struct prodigy_hifi_spec *spec;
1065     unsigned int i;
1066 
1067     ice->vt1720 = 0;
1068     ice->vt1724 = 1;
1069 
1070     ice->num_total_dacs = 8;
1071     ice->num_total_adcs = 1;
1072 
1073     /* HACK - use this as the SPDIF source.
1074     * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
1075     */
1076     ice->gpio.saved[0] = 0;
1077     /* to remember the register values */
1078 
1079     ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
1080     if (! ice->akm)
1081         return -ENOMEM;
1082     ice->akm_codecs = 1;
1083 
1084     spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1085     if (!spec)
1086         return -ENOMEM;
1087     ice->spec = spec;
1088 
1089     /* initialize WM8776 codec */
1090     wm8776_init(ice);
1091     schedule_timeout_uninterruptible(1);
1092     for (i = 0; i < ARRAY_SIZE(wm8776_defaults); i += 2)
1093         wm_put(ice, wm8776_defaults[i], wm8776_defaults[i + 1]);
1094 
1095     wm8766_init(ice);
1096 
1097 #ifdef CONFIG_PM_SLEEP
1098     ice->pm_resume = &prodigy_hifi_resume;
1099     ice->pm_suspend_enabled = 1;
1100 #endif
1101 
1102     return 0;
1103 }
1104 
1105 
1106 /*
1107  * initialize the chip
1108  */
1109 static void ak4396_init(struct snd_ice1712 *ice)
1110 {
1111     static const unsigned short ak4396_inits[] = {
1112         AK4396_CTRL1,      0x87,   /* I2S Normal Mode, 24 bit */
1113         AK4396_CTRL2,      0x02,
1114         AK4396_CTRL3,      0x00, 
1115         AK4396_LCH_ATT,  0x00,
1116         AK4396_RCH_ATT,  0x00,
1117     };
1118 
1119     unsigned int i;
1120 
1121     /* initialize ak4396 codec */
1122     /* reset codec */
1123     ak4396_write(ice, AK4396_CTRL1, 0x86);
1124     msleep(100);
1125     ak4396_write(ice, AK4396_CTRL1, 0x87);
1126 
1127     for (i = 0; i < ARRAY_SIZE(ak4396_inits); i += 2)
1128         ak4396_write(ice, ak4396_inits[i], ak4396_inits[i+1]);
1129 }
1130 
1131 #ifdef CONFIG_PM_SLEEP
1132 static int prodigy_hd2_resume(struct snd_ice1712 *ice)
1133 {
1134     /* initialize ak4396 codec and restore previous mixer volumes */
1135     struct prodigy_hifi_spec *spec = ice->spec;
1136     int i;
1137     mutex_lock(&ice->gpio_mutex);
1138     ak4396_init(ice);
1139     for (i = 0; i < 2; i++)
1140         ak4396_write(ice, AK4396_LCH_ATT + i, spec->vol[i] & 0xff);
1141     mutex_unlock(&ice->gpio_mutex);
1142     return 0;
1143 }
1144 #endif
1145 
1146 static int prodigy_hd2_init(struct snd_ice1712 *ice)
1147 {
1148     struct prodigy_hifi_spec *spec;
1149 
1150     ice->vt1720 = 0;
1151     ice->vt1724 = 1;
1152 
1153     ice->num_total_dacs = 1;
1154     ice->num_total_adcs = 1;
1155 
1156     /* HACK - use this as the SPDIF source.
1157     * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
1158     */
1159     ice->gpio.saved[0] = 0;
1160     /* to remember the register values */
1161 
1162     ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
1163     if (! ice->akm)
1164         return -ENOMEM;
1165     ice->akm_codecs = 1;
1166 
1167     spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1168     if (!spec)
1169         return -ENOMEM;
1170     ice->spec = spec;
1171 
1172 #ifdef CONFIG_PM_SLEEP
1173     ice->pm_resume = &prodigy_hd2_resume;
1174     ice->pm_suspend_enabled = 1;
1175 #endif
1176 
1177     ak4396_init(ice);
1178 
1179     return 0;
1180 }
1181 
1182 
1183 static const unsigned char prodigy71hifi_eeprom[] = {
1184     0x4b,   /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
1185     0x80,   /* ACLINK: I2S */
1186     0xfc,   /* I2S: vol, 96k, 24bit, 192k */
1187     0xc3,   /* SPDIF: out-en, out-int, spdif-in */
1188     0xff,   /* GPIO_DIR */
1189     0xff,   /* GPIO_DIR1 */
1190     0x5f,   /* GPIO_DIR2 */
1191     0x00,   /* GPIO_MASK */
1192     0x00,   /* GPIO_MASK1 */
1193     0x00,   /* GPIO_MASK2 */
1194     0x00,   /* GPIO_STATE */
1195     0x00,   /* GPIO_STATE1 */
1196     0x00,   /* GPIO_STATE2 */
1197 };
1198 
1199 static const unsigned char prodigyhd2_eeprom[] = {
1200     0x4b,   /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
1201     0x80,   /* ACLINK: I2S */
1202     0xfc,   /* I2S: vol, 96k, 24bit, 192k */
1203     0xc3,   /* SPDIF: out-en, out-int, spdif-in */
1204     0xff,   /* GPIO_DIR */
1205     0xff,   /* GPIO_DIR1 */
1206     0x5f,   /* GPIO_DIR2 */
1207     0x00,   /* GPIO_MASK */
1208     0x00,   /* GPIO_MASK1 */
1209     0x00,   /* GPIO_MASK2 */
1210     0x00,   /* GPIO_STATE */
1211     0x00,   /* GPIO_STATE1 */
1212     0x00,   /* GPIO_STATE2 */
1213 };
1214 
1215 static const unsigned char fortissimo4_eeprom[] = {
1216     0x43,   /* SYSCONF: clock 512, ADC, 4DACs */    
1217     0x80,   /* ACLINK: I2S */
1218     0xfc,   /* I2S: vol, 96k, 24bit, 192k */
1219     0xc1,   /* SPDIF: out-en, out-int */
1220     0xff,   /* GPIO_DIR */
1221     0xff,   /* GPIO_DIR1 */
1222     0x5f,   /* GPIO_DIR2 */
1223     0x00,   /* GPIO_MASK */
1224     0x00,   /* GPIO_MASK1 */
1225     0x00,   /* GPIO_MASK2 */
1226     0x00,   /* GPIO_STATE */
1227     0x00,   /* GPIO_STATE1 */
1228     0x00,   /* GPIO_STATE2 */
1229 };
1230 
1231 /* entry point */
1232 struct snd_ice1712_card_info snd_vt1724_prodigy_hifi_cards[] = {
1233     {
1234         .subvendor = VT1724_SUBDEVICE_PRODIGY_HIFI,
1235         .name = "Audiotrak Prodigy 7.1 HiFi",
1236         .model = "prodigy71hifi",
1237         .chip_init = prodigy_hifi_init,
1238         .build_controls = prodigy_hifi_add_controls,
1239         .eeprom_size = sizeof(prodigy71hifi_eeprom),
1240         .eeprom_data = prodigy71hifi_eeprom,
1241         .driver = "Prodigy71HIFI",
1242     },
1243     {
1244     .subvendor = VT1724_SUBDEVICE_PRODIGY_HD2,
1245     .name = "Audiotrak Prodigy HD2",
1246     .model = "prodigyhd2",
1247     .chip_init = prodigy_hd2_init,
1248     .build_controls = prodigy_hd2_add_controls,
1249     .eeprom_size = sizeof(prodigyhd2_eeprom),
1250     .eeprom_data = prodigyhd2_eeprom,
1251     .driver = "Prodigy71HD2",
1252     },
1253     {
1254         .subvendor = VT1724_SUBDEVICE_FORTISSIMO4,
1255         .name = "Hercules Fortissimo IV",
1256         .model = "fortissimo4",
1257         .chip_init = prodigy_hifi_init,
1258         .build_controls = prodigy_hifi_add_controls,
1259         .eeprom_size = sizeof(fortissimo4_eeprom),
1260         .eeprom_data = fortissimo4_eeprom,
1261         .driver = "Fortissimo4",
1262     },
1263     { } /* terminator */
1264 };
1265
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