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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *   ALSA driver for ICEnsemble ICE1712 (Envy24)
0004  *
0005  *   Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496,
0006  *              Audiophile, Digigram VX442
0007  *
0008  *  Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
0009  */      
0010 
0011 #include <linux/delay.h>
0012 #include <linux/interrupt.h>
0013 #include <linux/init.h>
0014 #include <linux/slab.h>
0015 #include <linux/mutex.h>
0016 
0017 #include <sound/core.h>
0018 #include <sound/cs8427.h>
0019 #include <sound/asoundef.h>
0020 
0021 #include "ice1712.h"
0022 #include "delta.h"
0023 
0024 #define SND_CS8403
0025 #include <sound/cs8403.h>
0026 
0027 
0028 /*
0029  * CS8427 via SPI mode (for Audiophile), emulated I2C
0030  */
0031 
0032 /* send 8 bits */
0033 static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
0034 {
0035     int idx;
0036 
0037     for (idx = 7; idx >= 0; idx--) {
0038         tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
0039         if (data & (1 << idx))
0040             tmp |= ICE1712_DELTA_AP_DOUT;
0041         snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0042         udelay(5);
0043         tmp |= ICE1712_DELTA_AP_CCLK;
0044         snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0045         udelay(5);
0046     }
0047 }
0048 
0049 /* read 8 bits */
0050 static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
0051 {
0052     unsigned char data = 0;
0053     int idx;
0054     
0055     for (idx = 7; idx >= 0; idx--) {
0056         tmp &= ~ICE1712_DELTA_AP_CCLK;
0057         snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0058         udelay(5);
0059         if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
0060             data |= 1 << idx;
0061         tmp |= ICE1712_DELTA_AP_CCLK;
0062         snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0063         udelay(5);
0064     }
0065     return data;
0066 }
0067 
0068 /* assert chip select */
0069 static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
0070 {
0071     unsigned char tmp;
0072     tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
0073     switch (ice->eeprom.subvendor) {
0074     case ICE1712_SUBDEVICE_DELTA1010E:
0075     case ICE1712_SUBDEVICE_DELTA1010LT:
0076         tmp &= ~ICE1712_DELTA_1010LT_CS;
0077         tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
0078         break;
0079     case ICE1712_SUBDEVICE_AUDIOPHILE:
0080     case ICE1712_SUBDEVICE_DELTA410:
0081         tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
0082         tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
0083         break;
0084     case ICE1712_SUBDEVICE_DELTA66E:
0085         tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A |
0086                ICE1712_DELTA_66E_CS_CHIP_B;
0087         tmp &= ~ICE1712_DELTA_66E_CS_CS8427;
0088         break;
0089     case ICE1712_SUBDEVICE_VX442:
0090         tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
0091         tmp &= ~ICE1712_VX442_CS_DIGITAL;
0092         break;
0093     }
0094     snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0095     udelay(5);
0096     return tmp;
0097 }
0098 
0099 /* deassert chip select */
0100 static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
0101 {
0102     switch (ice->eeprom.subvendor) {
0103     case ICE1712_SUBDEVICE_DELTA1010E:
0104     case ICE1712_SUBDEVICE_DELTA1010LT:
0105         tmp &= ~ICE1712_DELTA_1010LT_CS;
0106         tmp |= ICE1712_DELTA_1010LT_CS_NONE;
0107         break;
0108     case ICE1712_SUBDEVICE_AUDIOPHILE:
0109     case ICE1712_SUBDEVICE_DELTA410:
0110         tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
0111         break;
0112     case ICE1712_SUBDEVICE_DELTA66E:
0113         tmp |= ICE1712_DELTA_66E_CS_CS8427;
0114         break;
0115     case ICE1712_SUBDEVICE_VX442:
0116         tmp |= ICE1712_VX442_CS_DIGITAL;
0117         break;
0118     }
0119     snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0120 }
0121 
0122 /* sequential write */
0123 static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
0124 {
0125     struct snd_ice1712 *ice = device->bus->private_data;
0126     int res = count;
0127     unsigned char tmp;
0128 
0129     mutex_lock(&ice->gpio_mutex);
0130     tmp = ap_cs8427_codec_select(ice);
0131     ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
0132     while (count-- > 0)
0133         ap_cs8427_write_byte(ice, *bytes++, tmp);
0134     ap_cs8427_codec_deassert(ice, tmp);
0135     mutex_unlock(&ice->gpio_mutex);
0136     return res;
0137 }
0138 
0139 /* sequential read */
0140 static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
0141 {
0142     struct snd_ice1712 *ice = device->bus->private_data;
0143     int res = count;
0144     unsigned char tmp;
0145     
0146     mutex_lock(&ice->gpio_mutex);
0147     tmp = ap_cs8427_codec_select(ice);
0148     ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
0149     while (count-- > 0)
0150         *bytes++ = ap_cs8427_read_byte(ice, tmp);
0151     ap_cs8427_codec_deassert(ice, tmp);
0152     mutex_unlock(&ice->gpio_mutex);
0153     return res;
0154 }
0155 
0156 static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
0157 {
0158     if (addr == 0x10)
0159         return 1;
0160     return -ENOENT;
0161 }
0162 
0163 static const struct snd_i2c_ops ap_cs8427_i2c_ops = {
0164     .sendbytes = ap_cs8427_sendbytes,
0165     .readbytes = ap_cs8427_readbytes,
0166     .probeaddr = ap_cs8427_probeaddr,
0167 };
0168 
0169 /*
0170  */
0171 
0172 static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
0173 {
0174     unsigned char tmp, mask1, mask2;
0175     int idx;
0176     /* send byte to transmitter */
0177     mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
0178     mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
0179     mutex_lock(&ice->gpio_mutex);
0180     tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
0181     for (idx = 7; idx >= 0; idx--) {
0182         tmp &= ~(mask1 | mask2);
0183         if (bits & (1 << idx))
0184             tmp |= mask2;
0185         snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0186         udelay(100);
0187         tmp |= mask1;
0188         snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0189         udelay(100);
0190     }
0191     tmp &= ~mask1;
0192     snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0193     mutex_unlock(&ice->gpio_mutex);
0194 }
0195 
0196 
0197 static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
0198 {
0199     snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
0200 }
0201 
0202 static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
0203 {
0204     unsigned int val;
0205     int change;
0206 
0207     val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
0208     spin_lock_irq(&ice->reg_lock);
0209     change = ice->spdif.cs8403_bits != val;
0210     ice->spdif.cs8403_bits = val;
0211     if (change && ice->playback_pro_substream == NULL) {
0212         spin_unlock_irq(&ice->reg_lock);
0213         snd_ice1712_delta_cs8403_spdif_write(ice, val);
0214     } else {
0215         spin_unlock_irq(&ice->reg_lock);
0216     }
0217     return change;
0218 }
0219 
0220 static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
0221 {
0222     snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
0223 }
0224 
0225 static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
0226 {
0227     unsigned int val;
0228     int change;
0229 
0230     val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
0231     spin_lock_irq(&ice->reg_lock);
0232     change = ice->spdif.cs8403_stream_bits != val;
0233     ice->spdif.cs8403_stream_bits = val;
0234     if (change && ice->playback_pro_substream != NULL) {
0235         spin_unlock_irq(&ice->reg_lock);
0236         snd_ice1712_delta_cs8403_spdif_write(ice, val);
0237     } else {
0238         spin_unlock_irq(&ice->reg_lock);
0239     }
0240     return change;
0241 }
0242 
0243 
0244 /*
0245  * AK4524 on Delta 44 and 66 to choose the chip mask
0246  */
0247 static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
0248 {
0249         struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
0250         struct snd_ice1712 *ice = ak->private_data[0];
0251 
0252     snd_ice1712_save_gpio_status(ice);
0253     priv->cs_mask =
0254     priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
0255                     ICE1712_DELTA_CODEC_CHIP_B;
0256 }
0257 
0258 /*
0259  * AK4524 on Delta1010LT to choose the chip address
0260  */
0261 static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
0262 {
0263         struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
0264         struct snd_ice1712 *ice = ak->private_data[0];
0265 
0266     snd_ice1712_save_gpio_status(ice);
0267     priv->cs_mask = ICE1712_DELTA_1010LT_CS;
0268     priv->cs_addr = chip << 4;
0269 }
0270 
0271 /*
0272  * AK4524 on Delta66 rev E to choose the chip address
0273  */
0274 static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip)
0275 {
0276     struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
0277     struct snd_ice1712 *ice = ak->private_data[0];
0278 
0279     snd_ice1712_save_gpio_status(ice);
0280     priv->cs_mask =
0281     priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A :
0282                     ICE1712_DELTA_66E_CS_CHIP_B;
0283 }
0284 
0285 /*
0286  * AK4528 on VX442 to choose the chip mask
0287  */
0288 static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
0289 {
0290         struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
0291         struct snd_ice1712 *ice = ak->private_data[0];
0292 
0293     snd_ice1712_save_gpio_status(ice);
0294     priv->cs_mask =
0295     priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
0296                     ICE1712_VX442_CODEC_CHIP_B;
0297 }
0298 
0299 /*
0300  * change the DFS bit according rate for Delta1010
0301  */
0302 static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
0303 {
0304     unsigned char tmp, tmp2;
0305 
0306     if (rate == 0)  /* no hint - S/PDIF input is master, simply return */
0307         return;
0308 
0309     mutex_lock(&ice->gpio_mutex);
0310     tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
0311     tmp2 = tmp & ~ICE1712_DELTA_DFS;
0312     if (rate > 48000)
0313         tmp2 |= ICE1712_DELTA_DFS;
0314     if (tmp != tmp2)
0315         snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
0316     mutex_unlock(&ice->gpio_mutex);
0317 }
0318 
0319 /*
0320  * change the rate of AK4524 on Delta 44/66, AP, 1010LT
0321  */
0322 static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
0323 {
0324     unsigned char tmp, tmp2;
0325     struct snd_ice1712 *ice = ak->private_data[0];
0326 
0327     if (rate == 0)  /* no hint - S/PDIF input is master, simply return */
0328         return;
0329 
0330     /* check before reset ak4524 to avoid unnecessary clicks */
0331     mutex_lock(&ice->gpio_mutex);
0332     tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
0333     mutex_unlock(&ice->gpio_mutex);
0334     tmp2 = tmp & ~ICE1712_DELTA_DFS; 
0335     if (rate > 48000)
0336         tmp2 |= ICE1712_DELTA_DFS;
0337     if (tmp == tmp2)
0338         return;
0339 
0340     /* do it again */
0341     snd_akm4xxx_reset(ak, 1);
0342     mutex_lock(&ice->gpio_mutex);
0343     tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
0344     if (rate > 48000)
0345         tmp |= ICE1712_DELTA_DFS;
0346     snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0347     mutex_unlock(&ice->gpio_mutex);
0348     snd_akm4xxx_reset(ak, 0);
0349 }
0350 
0351 /*
0352  * change the rate of AK4524 on VX442
0353  */
0354 static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
0355 {
0356     unsigned char val;
0357 
0358     val = (rate > 48000) ? 0x65 : 0x60;
0359     if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
0360         snd_akm4xxx_get(ak, 1, 0x02) != val) {
0361         snd_akm4xxx_reset(ak, 1);
0362         snd_akm4xxx_write(ak, 0, 0x02, val);
0363         snd_akm4xxx_write(ak, 1, 0x02, val);
0364         snd_akm4xxx_reset(ak, 0);
0365     }
0366 }
0367 
0368 
0369 /*
0370  * SPDIF ops for Delta 1010, Dio, 66
0371  */
0372 
0373 /* open callback */
0374 static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
0375 {
0376     ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
0377 }
0378 
0379 /* set up */
0380 static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
0381 {
0382     unsigned long flags;
0383     unsigned int tmp;
0384     int change;
0385 
0386     spin_lock_irqsave(&ice->reg_lock, flags);
0387     tmp = ice->spdif.cs8403_stream_bits;
0388     if (tmp & 0x01)     /* consumer */
0389         tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
0390     switch (rate) {
0391     case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
0392     case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
0393     case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
0394     default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
0395     }
0396     change = ice->spdif.cs8403_stream_bits != tmp;
0397     ice->spdif.cs8403_stream_bits = tmp;
0398     spin_unlock_irqrestore(&ice->reg_lock, flags);
0399     if (change)
0400         snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
0401     snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
0402 }
0403 
0404 #define snd_ice1712_delta1010lt_wordclock_status_info \
0405     snd_ctl_boolean_mono_info
0406 
0407 static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
0408              struct snd_ctl_elem_value *ucontrol)
0409 {
0410     char reg = 0x10; /* CS8427 receiver error register */
0411     struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
0412 
0413     if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
0414         dev_err(ice->card->dev,
0415             "unable to send register 0x%x byte to CS8427\n", reg);
0416     snd_i2c_readbytes(ice->cs8427, &reg, 1);
0417     ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
0418     return 0;
0419 }
0420 
0421 static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status =
0422 {
0423     .access =   (SNDRV_CTL_ELEM_ACCESS_READ),
0424     .iface =    SNDRV_CTL_ELEM_IFACE_MIXER,
0425     .name =         "Word Clock Status",
0426     .info =     snd_ice1712_delta1010lt_wordclock_status_info,
0427     .get =      snd_ice1712_delta1010lt_wordclock_status_get,
0428 };
0429 
0430 /*
0431  * initialize the chips on M-Audio cards
0432  */
0433 
0434 static const struct snd_akm4xxx akm_audiophile = {
0435     .type = SND_AK4528,
0436     .num_adcs = 2,
0437     .num_dacs = 2,
0438     .ops = {
0439         .set_rate_val = delta_ak4524_set_rate_val
0440     }
0441 };
0442 
0443 static const struct snd_ak4xxx_private akm_audiophile_priv = {
0444     .caddr = 2,
0445     .cif = 0,
0446     .data_mask = ICE1712_DELTA_AP_DOUT,
0447     .clk_mask = ICE1712_DELTA_AP_CCLK,
0448     .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
0449     .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
0450     .cs_none = 0,
0451     .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
0452     .mask_flags = 0,
0453 };
0454 
0455 static const struct snd_akm4xxx akm_delta410 = {
0456     .type = SND_AK4529,
0457     .num_adcs = 2,
0458     .num_dacs = 8,
0459     .ops = {
0460         .set_rate_val = delta_ak4524_set_rate_val
0461     }
0462 };
0463 
0464 static const struct snd_ak4xxx_private akm_delta410_priv = {
0465     .caddr = 0,
0466     .cif = 0,
0467     .data_mask = ICE1712_DELTA_AP_DOUT,
0468     .clk_mask = ICE1712_DELTA_AP_CCLK,
0469     .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
0470     .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
0471     .cs_none = 0,
0472     .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
0473     .mask_flags = 0,
0474 };
0475 
0476 static const struct snd_akm4xxx akm_delta1010lt = {
0477     .type = SND_AK4524,
0478     .num_adcs = 8,
0479     .num_dacs = 8,
0480     .ops = {
0481         .lock = delta1010lt_ak4524_lock,
0482         .set_rate_val = delta_ak4524_set_rate_val
0483     }
0484 };
0485 
0486 static const struct snd_ak4xxx_private akm_delta1010lt_priv = {
0487     .caddr = 2,
0488     .cif = 0, /* the default level of the CIF pin from AK4524 */
0489     .data_mask = ICE1712_DELTA_1010LT_DOUT,
0490     .clk_mask = ICE1712_DELTA_1010LT_CCLK,
0491     .cs_mask = 0,
0492     .cs_addr = 0, /* set later */
0493     .cs_none = ICE1712_DELTA_1010LT_CS_NONE,
0494     .add_flags = 0,
0495     .mask_flags = 0,
0496 };
0497 
0498 static const struct snd_akm4xxx akm_delta66e = {
0499     .type = SND_AK4524,
0500     .num_adcs = 4,
0501     .num_dacs = 4,
0502     .ops = {
0503         .lock = delta66e_ak4524_lock,
0504         .set_rate_val = delta_ak4524_set_rate_val
0505     }
0506 };
0507 
0508 static const struct snd_ak4xxx_private akm_delta66e_priv = {
0509     .caddr = 2,
0510     .cif = 0, /* the default level of the CIF pin from AK4524 */
0511     .data_mask = ICE1712_DELTA_66E_DOUT,
0512     .clk_mask = ICE1712_DELTA_66E_CCLK,
0513     .cs_mask = 0,
0514     .cs_addr = 0, /* set later */
0515     .cs_none = 0,
0516     .add_flags = 0,
0517     .mask_flags = 0,
0518 };
0519 
0520 
0521 static const struct snd_akm4xxx akm_delta44 = {
0522     .type = SND_AK4524,
0523     .num_adcs = 4,
0524     .num_dacs = 4,
0525     .ops = {
0526         .lock = delta_ak4524_lock,
0527         .set_rate_val = delta_ak4524_set_rate_val
0528     }
0529 };
0530 
0531 static const struct snd_ak4xxx_private akm_delta44_priv = {
0532     .caddr = 2,
0533     .cif = 0, /* the default level of the CIF pin from AK4524 */
0534     .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
0535     .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
0536     .cs_mask = 0,
0537     .cs_addr = 0, /* set later */
0538     .cs_none = 0,
0539     .add_flags = 0,
0540     .mask_flags = 0,
0541 };
0542 
0543 static const struct snd_akm4xxx akm_vx442 = {
0544     .type = SND_AK4524,
0545     .num_adcs = 4,
0546     .num_dacs = 4,
0547     .ops = {
0548         .lock = vx442_ak4524_lock,
0549         .set_rate_val = vx442_ak4524_set_rate_val
0550     }
0551 };
0552 
0553 static const struct snd_ak4xxx_private akm_vx442_priv = {
0554     .caddr = 2,
0555     .cif = 0,
0556     .data_mask = ICE1712_VX442_DOUT,
0557     .clk_mask = ICE1712_VX442_CCLK,
0558     .cs_mask = 0,
0559     .cs_addr = 0, /* set later */
0560     .cs_none = 0,
0561     .add_flags = 0,
0562     .mask_flags = 0,
0563 };
0564 
0565 #ifdef CONFIG_PM_SLEEP
0566 static int snd_ice1712_delta_resume(struct snd_ice1712 *ice)
0567 {
0568     unsigned char akm_img_bak[AK4XXX_IMAGE_SIZE];
0569     unsigned char akm_vol_bak[AK4XXX_IMAGE_SIZE];
0570 
0571     /* init spdif */
0572     switch (ice->eeprom.subvendor) {
0573     case ICE1712_SUBDEVICE_AUDIOPHILE:
0574     case ICE1712_SUBDEVICE_DELTA410:
0575     case ICE1712_SUBDEVICE_DELTA1010E:
0576     case ICE1712_SUBDEVICE_DELTA1010LT:
0577     case ICE1712_SUBDEVICE_VX442:
0578     case ICE1712_SUBDEVICE_DELTA66E:
0579         snd_cs8427_init(ice->i2c, ice->cs8427);
0580         break;
0581     case ICE1712_SUBDEVICE_DELTA1010:
0582     case ICE1712_SUBDEVICE_MEDIASTATION:
0583         /* nothing */
0584         break;
0585     case ICE1712_SUBDEVICE_DELTADIO2496:
0586     case ICE1712_SUBDEVICE_DELTA66:
0587         /* Set spdif defaults */
0588         snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
0589         break;
0590     }
0591 
0592     /* init codec and restore registers */
0593     if (ice->akm_codecs) {
0594         memcpy(akm_img_bak, ice->akm->images, sizeof(akm_img_bak));
0595         memcpy(akm_vol_bak, ice->akm->volumes, sizeof(akm_vol_bak));
0596         snd_akm4xxx_init(ice->akm);
0597         memcpy(ice->akm->images, akm_img_bak, sizeof(akm_img_bak));
0598         memcpy(ice->akm->volumes, akm_vol_bak, sizeof(akm_vol_bak));
0599         snd_akm4xxx_reset(ice->akm, 0);
0600     }
0601 
0602     return 0;
0603 }
0604 
0605 static int snd_ice1712_delta_suspend(struct snd_ice1712 *ice)
0606 {
0607     if (ice->akm_codecs) /* reset & mute codec */
0608         snd_akm4xxx_reset(ice->akm, 1);
0609 
0610     return 0;
0611 }
0612 #endif
0613 
0614 static int snd_ice1712_delta_init(struct snd_ice1712 *ice)
0615 {
0616     int err;
0617     struct snd_akm4xxx *ak;
0618     unsigned char tmp;
0619 
0620     if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 &&
0621         ice->eeprom.gpiodir == 0x7b)
0622         ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E;
0623 
0624     if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 &&
0625         ice->eeprom.gpiodir == 0xfb)
0626             ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E;
0627 
0628     /* determine I2C, DACs and ADCs */
0629     switch (ice->eeprom.subvendor) {
0630     case ICE1712_SUBDEVICE_AUDIOPHILE:
0631         ice->num_total_dacs = 2;
0632         ice->num_total_adcs = 2;
0633         break;
0634     case ICE1712_SUBDEVICE_DELTA410:
0635         ice->num_total_dacs = 8;
0636         ice->num_total_adcs = 2;
0637         break;
0638     case ICE1712_SUBDEVICE_DELTA44:
0639     case ICE1712_SUBDEVICE_DELTA66:
0640         ice->num_total_dacs = ice->omni ? 8 : 4;
0641         ice->num_total_adcs = ice->omni ? 8 : 4;
0642         break;
0643     case ICE1712_SUBDEVICE_DELTA1010:
0644     case ICE1712_SUBDEVICE_DELTA1010E:
0645     case ICE1712_SUBDEVICE_DELTA1010LT:
0646     case ICE1712_SUBDEVICE_MEDIASTATION:
0647     case ICE1712_SUBDEVICE_EDIROLDA2496:
0648         ice->num_total_dacs = 8;
0649         ice->num_total_adcs = 8;
0650         break;
0651     case ICE1712_SUBDEVICE_DELTADIO2496:
0652         ice->num_total_dacs = 4;    /* two AK4324 codecs */
0653         break;
0654     case ICE1712_SUBDEVICE_VX442:
0655     case ICE1712_SUBDEVICE_DELTA66E:    /* omni not supported yet */
0656         ice->num_total_dacs = 4;
0657         ice->num_total_adcs = 4;
0658         break;
0659     }
0660 #ifdef CONFIG_PM_SLEEP
0661     ice->pm_resume = snd_ice1712_delta_resume;
0662     ice->pm_suspend = snd_ice1712_delta_suspend;
0663     ice->pm_suspend_enabled = 1;
0664 #endif
0665     /* initialize the SPI clock to high */
0666     tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
0667     tmp |= ICE1712_DELTA_AP_CCLK;
0668     snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
0669     udelay(5);
0670 
0671     /* initialize spdif */
0672     switch (ice->eeprom.subvendor) {
0673     case ICE1712_SUBDEVICE_AUDIOPHILE:
0674     case ICE1712_SUBDEVICE_DELTA410:
0675     case ICE1712_SUBDEVICE_DELTA1010E:
0676     case ICE1712_SUBDEVICE_DELTA1010LT:
0677     case ICE1712_SUBDEVICE_VX442:
0678     case ICE1712_SUBDEVICE_DELTA66E:
0679         err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c);
0680         if (err < 0) {
0681             dev_err(ice->card->dev, "unable to create I2C bus\n");
0682             return err;
0683         }
0684         ice->i2c->private_data = ice;
0685         ice->i2c->ops = &ap_cs8427_i2c_ops;
0686         err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR);
0687         if (err < 0)
0688             return err;
0689         break;
0690     case ICE1712_SUBDEVICE_DELTA1010:
0691     case ICE1712_SUBDEVICE_MEDIASTATION:
0692         ice->gpio.set_pro_rate = delta_1010_set_rate_val;
0693         break;
0694     case ICE1712_SUBDEVICE_DELTADIO2496:
0695         ice->gpio.set_pro_rate = delta_1010_set_rate_val;
0696         fallthrough;
0697     case ICE1712_SUBDEVICE_DELTA66:
0698         ice->spdif.ops.open = delta_open_spdif;
0699         ice->spdif.ops.setup_rate = delta_setup_spdif;
0700         ice->spdif.ops.default_get = delta_spdif_default_get;
0701         ice->spdif.ops.default_put = delta_spdif_default_put;
0702         ice->spdif.ops.stream_get = delta_spdif_stream_get;
0703         ice->spdif.ops.stream_put = delta_spdif_stream_put;
0704         /* Set spdif defaults */
0705         snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
0706         break;
0707     }
0708 
0709     /* no analog? */
0710     switch (ice->eeprom.subvendor) {
0711     case ICE1712_SUBDEVICE_DELTA1010:
0712     case ICE1712_SUBDEVICE_DELTA1010E:
0713     case ICE1712_SUBDEVICE_DELTADIO2496:
0714     case ICE1712_SUBDEVICE_MEDIASTATION:
0715         return 0;
0716     }
0717 
0718     /* second stage of initialization, analog parts and others */
0719     ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
0720     if (! ak)
0721         return -ENOMEM;
0722     ice->akm_codecs = 1;
0723 
0724     switch (ice->eeprom.subvendor) {
0725     case ICE1712_SUBDEVICE_AUDIOPHILE:
0726         err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
0727         break;
0728     case ICE1712_SUBDEVICE_DELTA410:
0729         err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
0730         break;
0731     case ICE1712_SUBDEVICE_DELTA1010LT:
0732     case ICE1712_SUBDEVICE_EDIROLDA2496:
0733         err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
0734         break;
0735     case ICE1712_SUBDEVICE_DELTA66:
0736     case ICE1712_SUBDEVICE_DELTA44:
0737         err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
0738         break;
0739     case ICE1712_SUBDEVICE_VX442:
0740         err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
0741         break;
0742     case ICE1712_SUBDEVICE_DELTA66E:
0743         err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice);
0744         break;
0745     default:
0746         snd_BUG();
0747         return -EINVAL;
0748     }
0749 
0750     return err;
0751 }
0752 
0753 
0754 /*
0755  * additional controls for M-Audio cards
0756  */
0757 
0758 static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select =
0759 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
0760 static const struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select =
0761 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
0762 static const struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status =
0763 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
0764 static const struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select =
0765 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
0766 static const struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status =
0767 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
0768 
0769 
0770 static int snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
0771 {
0772     int err;
0773 
0774     /* 1010 and dio specific controls */
0775     switch (ice->eeprom.subvendor) {
0776     case ICE1712_SUBDEVICE_DELTA1010:
0777     case ICE1712_SUBDEVICE_MEDIASTATION:
0778         err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
0779         if (err < 0)
0780             return err;
0781         err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
0782         if (err < 0)
0783             return err;
0784         break;
0785     case ICE1712_SUBDEVICE_DELTADIO2496:
0786         err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
0787         if (err < 0)
0788             return err;
0789         break;
0790     case ICE1712_SUBDEVICE_DELTA1010E:
0791     case ICE1712_SUBDEVICE_DELTA1010LT:
0792         err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
0793         if (err < 0)
0794             return err;
0795         err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
0796         if (err < 0)
0797             return err;
0798         break;
0799     }
0800 
0801     /* normal spdif controls */
0802     switch (ice->eeprom.subvendor) {
0803     case ICE1712_SUBDEVICE_DELTA1010:
0804     case ICE1712_SUBDEVICE_DELTADIO2496:
0805     case ICE1712_SUBDEVICE_DELTA66:
0806     case ICE1712_SUBDEVICE_MEDIASTATION:
0807         err = snd_ice1712_spdif_build_controls(ice);
0808         if (err < 0)
0809             return err;
0810         break;
0811     }
0812 
0813     /* spdif status in */
0814     switch (ice->eeprom.subvendor) {
0815     case ICE1712_SUBDEVICE_DELTA1010:
0816     case ICE1712_SUBDEVICE_DELTADIO2496:
0817     case ICE1712_SUBDEVICE_DELTA66:
0818     case ICE1712_SUBDEVICE_MEDIASTATION:
0819         err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
0820         if (err < 0)
0821             return err;
0822         break;
0823     }
0824 
0825     /* ak4524 controls */
0826     switch (ice->eeprom.subvendor) {
0827     case ICE1712_SUBDEVICE_DELTA1010LT:
0828     case ICE1712_SUBDEVICE_AUDIOPHILE:
0829     case ICE1712_SUBDEVICE_DELTA410:
0830     case ICE1712_SUBDEVICE_DELTA44:
0831     case ICE1712_SUBDEVICE_DELTA66:
0832     case ICE1712_SUBDEVICE_VX442:
0833     case ICE1712_SUBDEVICE_DELTA66E:
0834     case ICE1712_SUBDEVICE_EDIROLDA2496:
0835         err = snd_ice1712_akm4xxx_build_controls(ice);
0836         if (err < 0)
0837             return err;
0838         break;
0839     }
0840 
0841     return 0;
0842 }
0843 
0844 
0845 /* entry point */
0846 struct snd_ice1712_card_info snd_ice1712_delta_cards[] = {
0847     {
0848         .subvendor = ICE1712_SUBDEVICE_DELTA1010,
0849         .name = "M Audio Delta 1010",
0850         .model = "delta1010",
0851         .chip_init = snd_ice1712_delta_init,
0852         .build_controls = snd_ice1712_delta_add_controls,
0853     },
0854     {
0855         .subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
0856         .name = "M Audio Delta DiO 2496",
0857         .model = "dio2496",
0858         .chip_init = snd_ice1712_delta_init,
0859         .build_controls = snd_ice1712_delta_add_controls,
0860         .no_mpu401 = 1,
0861     },
0862     {
0863         .subvendor = ICE1712_SUBDEVICE_DELTA66,
0864         .name = "M Audio Delta 66",
0865         .model = "delta66",
0866         .chip_init = snd_ice1712_delta_init,
0867         .build_controls = snd_ice1712_delta_add_controls,
0868         .no_mpu401 = 1,
0869     },
0870     {
0871         .subvendor = ICE1712_SUBDEVICE_DELTA44,
0872         .name = "M Audio Delta 44",
0873         .model = "delta44",
0874         .chip_init = snd_ice1712_delta_init,
0875         .build_controls = snd_ice1712_delta_add_controls,
0876         .no_mpu401 = 1,
0877     },
0878     {
0879         .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
0880         .name = "M Audio Audiophile 24/96",
0881         .model = "audiophile",
0882         .chip_init = snd_ice1712_delta_init,
0883         .build_controls = snd_ice1712_delta_add_controls,
0884     },
0885     {
0886         .subvendor = ICE1712_SUBDEVICE_DELTA410,
0887         .name = "M Audio Delta 410",
0888         .model = "delta410",
0889         .chip_init = snd_ice1712_delta_init,
0890         .build_controls = snd_ice1712_delta_add_controls,
0891     },
0892     {
0893         .subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
0894         .name = "M Audio Delta 1010LT",
0895         .model = "delta1010lt",
0896         .chip_init = snd_ice1712_delta_init,
0897         .build_controls = snd_ice1712_delta_add_controls,
0898     },
0899     {
0900         .subvendor = ICE1712_SUBDEVICE_VX442,
0901         .name = "Digigram VX442",
0902         .model = "vx442",
0903         .chip_init = snd_ice1712_delta_init,
0904         .build_controls = snd_ice1712_delta_add_controls,
0905         .no_mpu401 = 1,
0906     },
0907     {
0908         .subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
0909         .name = "Lionstracs Mediastation",
0910         .model = "mediastation",
0911         .chip_init = snd_ice1712_delta_init,
0912         .build_controls = snd_ice1712_delta_add_controls,
0913     },
0914     {
0915         .subvendor = ICE1712_SUBDEVICE_EDIROLDA2496,
0916         .name = "Edirol DA2496",
0917         .model = "da2496",
0918         .chip_init = snd_ice1712_delta_init,
0919         .build_controls = snd_ice1712_delta_add_controls,
0920     },
0921     { } /* terminator */
0922 };
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