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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  The driver for the ForteMedia FM801 based soundcards
0004  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
0005  */
0006 
0007 #include <linux/delay.h>
0008 #include <linux/init.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/io.h>
0011 #include <linux/pci.h>
0012 #include <linux/slab.h>
0013 #include <linux/module.h>
0014 #include <sound/core.h>
0015 #include <sound/pcm.h>
0016 #include <sound/tlv.h>
0017 #include <sound/ac97_codec.h>
0018 #include <sound/mpu401.h>
0019 #include <sound/opl3.h>
0020 #include <sound/initval.h>
0021 
0022 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
0023 #include <media/drv-intf/tea575x.h>
0024 #endif
0025 
0026 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
0027 MODULE_DESCRIPTION("ForteMedia FM801");
0028 MODULE_LICENSE("GPL");
0029 
0030 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;  /* Index 0-MAX */
0031 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;   /* ID for this card */
0032 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
0033 /*
0034  *  Enable TEA575x tuner
0035  *    1 = MediaForte 256-PCS
0036  *    2 = MediaForte 256-PCP
0037  *    3 = MediaForte 64-PCR
0038  *   16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
0039  *  High 16-bits are video (radio) device number + 1
0040  */
0041 static int tea575x_tuner[SNDRV_CARDS];
0042 static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
0043 
0044 module_param_array(index, int, NULL, 0444);
0045 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
0046 module_param_array(id, charp, NULL, 0444);
0047 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
0048 module_param_array(enable, bool, NULL, 0444);
0049 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
0050 module_param_array(tea575x_tuner, int, NULL, 0444);
0051 MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
0052 module_param_array(radio_nr, int, NULL, 0444);
0053 MODULE_PARM_DESC(radio_nr, "Radio device numbers");
0054 
0055 
0056 #define TUNER_DISABLED      (1<<3)
0057 #define TUNER_ONLY      (1<<4)
0058 #define TUNER_TYPE_MASK     (~TUNER_ONLY & 0xFFFF)
0059 
0060 /*
0061  *  Direct registers
0062  */
0063 
0064 #define fm801_writew(chip,reg,value)    outw((value), chip->port + FM801_##reg)
0065 #define fm801_readw(chip,reg)       inw(chip->port + FM801_##reg)
0066 
0067 #define fm801_writel(chip,reg,value)    outl((value), chip->port + FM801_##reg)
0068 
0069 #define FM801_PCM_VOL       0x00    /* PCM Output Volume */
0070 #define FM801_FM_VOL        0x02    /* FM Output Volume */
0071 #define FM801_I2S_VOL       0x04    /* I2S Volume */
0072 #define FM801_REC_SRC       0x06    /* Record Source */
0073 #define FM801_PLY_CTRL      0x08    /* Playback Control */
0074 #define FM801_PLY_COUNT     0x0a    /* Playback Count */
0075 #define FM801_PLY_BUF1      0x0c    /* Playback Bufer I */
0076 #define FM801_PLY_BUF2      0x10    /* Playback Buffer II */
0077 #define FM801_CAP_CTRL      0x14    /* Capture Control */
0078 #define FM801_CAP_COUNT     0x16    /* Capture Count */
0079 #define FM801_CAP_BUF1      0x18    /* Capture Buffer I */
0080 #define FM801_CAP_BUF2      0x1c    /* Capture Buffer II */
0081 #define FM801_CODEC_CTRL    0x22    /* Codec Control */
0082 #define FM801_I2S_MODE      0x24    /* I2S Mode Control */
0083 #define FM801_VOLUME        0x26    /* Volume Up/Down/Mute Status */
0084 #define FM801_I2C_CTRL      0x29    /* I2C Control */
0085 #define FM801_AC97_CMD      0x2a    /* AC'97 Command */
0086 #define FM801_AC97_DATA     0x2c    /* AC'97 Data */
0087 #define FM801_MPU401_DATA   0x30    /* MPU401 Data */
0088 #define FM801_MPU401_CMD    0x31    /* MPU401 Command */
0089 #define FM801_GPIO_CTRL     0x52    /* General Purpose I/O Control */
0090 #define FM801_GEN_CTRL      0x54    /* General Control */
0091 #define FM801_IRQ_MASK      0x56    /* Interrupt Mask */
0092 #define FM801_IRQ_STATUS    0x5a    /* Interrupt Status */
0093 #define FM801_OPL3_BANK0    0x68    /* OPL3 Status Read / Bank 0 Write */
0094 #define FM801_OPL3_DATA0    0x69    /* OPL3 Data 0 Write */
0095 #define FM801_OPL3_BANK1    0x6a    /* OPL3 Bank 1 Write */
0096 #define FM801_OPL3_DATA1    0x6b    /* OPL3 Bank 1 Write */
0097 #define FM801_POWERDOWN     0x70    /* Blocks Power Down Control */
0098 
0099 /* codec access */
0100 #define FM801_AC97_READ     (1<<7)  /* read=1, write=0 */
0101 #define FM801_AC97_VALID    (1<<8)  /* port valid=1 */
0102 #define FM801_AC97_BUSY     (1<<9)  /* busy=1 */
0103 #define FM801_AC97_ADDR_SHIFT   10  /* codec id (2bit) */
0104 
0105 /* playback and record control register bits */
0106 #define FM801_BUF1_LAST     (1<<1)
0107 #define FM801_BUF2_LAST     (1<<2)
0108 #define FM801_START     (1<<5)
0109 #define FM801_PAUSE     (1<<6)
0110 #define FM801_IMMED_STOP    (1<<7)
0111 #define FM801_RATE_SHIFT    8
0112 #define FM801_RATE_MASK     (15 << FM801_RATE_SHIFT)
0113 #define FM801_CHANNELS_4    (1<<12) /* playback only */
0114 #define FM801_CHANNELS_6    (2<<12) /* playback only */
0115 #define FM801_CHANNELS_6MS  (3<<12) /* playback only */
0116 #define FM801_CHANNELS_MASK (3<<12)
0117 #define FM801_16BIT     (1<<14)
0118 #define FM801_STEREO        (1<<15)
0119 
0120 /* IRQ status bits */
0121 #define FM801_IRQ_PLAYBACK  (1<<8)
0122 #define FM801_IRQ_CAPTURE   (1<<9)
0123 #define FM801_IRQ_VOLUME    (1<<14)
0124 #define FM801_IRQ_MPU       (1<<15)
0125 
0126 /* GPIO control register */
0127 #define FM801_GPIO_GP0      (1<<0)  /* read/write */
0128 #define FM801_GPIO_GP1      (1<<1)
0129 #define FM801_GPIO_GP2      (1<<2)
0130 #define FM801_GPIO_GP3      (1<<3)
0131 #define FM801_GPIO_GP(x)    (1<<(0+(x)))
0132 #define FM801_GPIO_GD0      (1<<8)  /* directions: 1 = input, 0 = output*/
0133 #define FM801_GPIO_GD1      (1<<9)
0134 #define FM801_GPIO_GD2      (1<<10)
0135 #define FM801_GPIO_GD3      (1<<11)
0136 #define FM801_GPIO_GD(x)    (1<<(8+(x)))
0137 #define FM801_GPIO_GS0      (1<<12) /* function select: */
0138 #define FM801_GPIO_GS1      (1<<13) /*    1 = GPIO */
0139 #define FM801_GPIO_GS2      (1<<14) /*    0 = other (S/PDIF, VOL) */
0140 #define FM801_GPIO_GS3      (1<<15)
0141 #define FM801_GPIO_GS(x)    (1<<(12+(x)))
0142     
0143 /**
0144  * struct fm801 - describes FM801 chip
0145  * @dev:        device for this chio
0146  * @irq:        irq number
0147  * @port:       I/O port number
0148  * @multichannel:   multichannel support
0149  * @secondary:      secondary codec
0150  * @secondary_addr: address of the secondary codec
0151  * @tea575x_tuner:  tuner access method & flags
0152  * @ply_ctrl:       playback control
0153  * @cap_ctrl:       capture control
0154  * @ply_buffer:     playback buffer
0155  * @ply_buf:        playback buffer index
0156  * @ply_count:      playback buffer count
0157  * @ply_size:       playback buffer size
0158  * @ply_pos:        playback position
0159  * @cap_buffer:     capture buffer
0160  * @cap_buf:        capture buffer index
0161  * @cap_count:      capture buffer count
0162  * @cap_size:       capture buffer size
0163  * @cap_pos:        capture position
0164  * @ac97_bus:       ac97 bus handle
0165  * @ac97:       ac97 handle
0166  * @ac97_sec:       ac97 secondary handle
0167  * @card:       ALSA card
0168  * @pcm:        PCM devices
0169  * @rmidi:      rmidi device
0170  * @playback_substream: substream for playback
0171  * @capture_substream:  substream for capture
0172  * @p_dma_size:     playback DMA size
0173  * @c_dma_size:     capture DMA size
0174  * @reg_lock:       lock
0175  * @proc_entry:     /proc entry
0176  * @v4l2_dev:       v4l2 device
0177  * @tea:        tea575a structure
0178  * @saved_regs:     context saved during suspend
0179  */
0180 struct fm801 {
0181     struct device *dev;
0182     int irq;
0183 
0184     unsigned long port;
0185     unsigned int multichannel: 1,
0186              secondary: 1;
0187     unsigned char secondary_addr;
0188     unsigned int tea575x_tuner;
0189 
0190     unsigned short ply_ctrl;
0191     unsigned short cap_ctrl;
0192 
0193     unsigned long ply_buffer;
0194     unsigned int ply_buf;
0195     unsigned int ply_count;
0196     unsigned int ply_size;
0197     unsigned int ply_pos;
0198 
0199     unsigned long cap_buffer;
0200     unsigned int cap_buf;
0201     unsigned int cap_count;
0202     unsigned int cap_size;
0203     unsigned int cap_pos;
0204 
0205     struct snd_ac97_bus *ac97_bus;
0206     struct snd_ac97 *ac97;
0207     struct snd_ac97 *ac97_sec;
0208 
0209     struct snd_card *card;
0210     struct snd_pcm *pcm;
0211     struct snd_rawmidi *rmidi;
0212     struct snd_pcm_substream *playback_substream;
0213     struct snd_pcm_substream *capture_substream;
0214     unsigned int p_dma_size;
0215     unsigned int c_dma_size;
0216 
0217     spinlock_t reg_lock;
0218     struct snd_info_entry *proc_entry;
0219 
0220 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
0221     struct v4l2_device v4l2_dev;
0222     struct snd_tea575x tea;
0223 #endif
0224 
0225 #ifdef CONFIG_PM_SLEEP
0226     u16 saved_regs[0x20];
0227 #endif
0228 };
0229 
0230 /*
0231  * IO accessors
0232  */
0233 
0234 static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)
0235 {
0236     outw(value, chip->port + offset);
0237 }
0238 
0239 static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)
0240 {
0241     return inw(chip->port + offset);
0242 }
0243 
0244 static const struct pci_device_id snd_fm801_ids[] = {
0245     { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* FM801 */
0246     { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* Gallant Odyssey Sound 4 */
0247     { 0, }
0248 };
0249 
0250 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
0251 
0252 /*
0253  *  common I/O routines
0254  */
0255 
0256 static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
0257 {
0258     unsigned int idx;
0259 
0260     for (idx = 0; idx < iterations; idx++) {
0261         if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
0262             return true;
0263         udelay(10);
0264     }
0265     return false;
0266 }
0267 
0268 static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
0269 {
0270     unsigned int idx;
0271 
0272     for (idx = 0; idx < iterations; idx++) {
0273         if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
0274             return true;
0275         udelay(10);
0276     }
0277     return false;
0278 }
0279 
0280 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
0281                  unsigned short mask, unsigned short value)
0282 {
0283     int change;
0284     unsigned long flags;
0285     unsigned short old, new;
0286 
0287     spin_lock_irqsave(&chip->reg_lock, flags);
0288     old = fm801_ioread16(chip, reg);
0289     new = (old & ~mask) | value;
0290     change = old != new;
0291     if (change)
0292         fm801_iowrite16(chip, reg, new);
0293     spin_unlock_irqrestore(&chip->reg_lock, flags);
0294     return change;
0295 }
0296 
0297 static void snd_fm801_codec_write(struct snd_ac97 *ac97,
0298                   unsigned short reg,
0299                   unsigned short val)
0300 {
0301     struct fm801 *chip = ac97->private_data;
0302 
0303     /*
0304      *  Wait until the codec interface is not ready..
0305      */
0306     if (!fm801_ac97_is_ready(chip, 100)) {
0307         dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
0308         return;
0309     }
0310 
0311     /* write data and address */
0312     fm801_writew(chip, AC97_DATA, val);
0313     fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
0314     /*
0315      *  Wait until the write command is not completed..
0316      */
0317     if (!fm801_ac97_is_ready(chip, 1000))
0318         dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
0319         ac97->num);
0320 }
0321 
0322 static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
0323 {
0324     struct fm801 *chip = ac97->private_data;
0325 
0326     /*
0327      *  Wait until the codec interface is not ready..
0328      */
0329     if (!fm801_ac97_is_ready(chip, 100)) {
0330         dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
0331         return 0;
0332     }
0333 
0334     /* read command */
0335     fm801_writew(chip, AC97_CMD,
0336              reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
0337     if (!fm801_ac97_is_ready(chip, 100)) {
0338         dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
0339             ac97->num);
0340         return 0;
0341     }
0342 
0343     if (!fm801_ac97_is_valid(chip, 1000)) {
0344         dev_err(chip->card->dev,
0345             "AC'97 interface #%d is not valid (2)\n", ac97->num);
0346         return 0;
0347     }
0348 
0349     return fm801_readw(chip, AC97_DATA);
0350 }
0351 
0352 static const unsigned int rates[] = {
0353   5500,  8000,  9600, 11025,
0354   16000, 19200, 22050, 32000,
0355   38400, 44100, 48000
0356 };
0357 
0358 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
0359     .count = ARRAY_SIZE(rates),
0360     .list = rates,
0361     .mask = 0,
0362 };
0363 
0364 static const unsigned int channels[] = {
0365   2, 4, 6
0366 };
0367 
0368 static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
0369     .count = ARRAY_SIZE(channels),
0370     .list = channels,
0371     .mask = 0,
0372 };
0373 
0374 /*
0375  *  Sample rate routines
0376  */
0377 
0378 static unsigned short snd_fm801_rate_bits(unsigned int rate)
0379 {
0380     unsigned int idx;
0381 
0382     for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
0383         if (rates[idx] == rate)
0384             return idx;
0385     snd_BUG();
0386     return ARRAY_SIZE(rates) - 1;
0387 }
0388 
0389 /*
0390  *  PCM part
0391  */
0392 
0393 static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
0394                       int cmd)
0395 {
0396     struct fm801 *chip = snd_pcm_substream_chip(substream);
0397 
0398     spin_lock(&chip->reg_lock);
0399     switch (cmd) {
0400     case SNDRV_PCM_TRIGGER_START:
0401         chip->ply_ctrl &= ~(FM801_BUF1_LAST |
0402                      FM801_BUF2_LAST |
0403                      FM801_PAUSE);
0404         chip->ply_ctrl |= FM801_START |
0405                    FM801_IMMED_STOP;
0406         break;
0407     case SNDRV_PCM_TRIGGER_STOP:
0408         chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
0409         break;
0410     case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
0411     case SNDRV_PCM_TRIGGER_SUSPEND:
0412         chip->ply_ctrl |= FM801_PAUSE;
0413         break;
0414     case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
0415     case SNDRV_PCM_TRIGGER_RESUME:
0416         chip->ply_ctrl &= ~FM801_PAUSE;
0417         break;
0418     default:
0419         spin_unlock(&chip->reg_lock);
0420         snd_BUG();
0421         return -EINVAL;
0422     }
0423     fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
0424     spin_unlock(&chip->reg_lock);
0425     return 0;
0426 }
0427 
0428 static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
0429                      int cmd)
0430 {
0431     struct fm801 *chip = snd_pcm_substream_chip(substream);
0432 
0433     spin_lock(&chip->reg_lock);
0434     switch (cmd) {
0435     case SNDRV_PCM_TRIGGER_START:
0436         chip->cap_ctrl &= ~(FM801_BUF1_LAST |
0437                      FM801_BUF2_LAST |
0438                      FM801_PAUSE);
0439         chip->cap_ctrl |= FM801_START |
0440                    FM801_IMMED_STOP;
0441         break;
0442     case SNDRV_PCM_TRIGGER_STOP:
0443         chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
0444         break;
0445     case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
0446     case SNDRV_PCM_TRIGGER_SUSPEND:
0447         chip->cap_ctrl |= FM801_PAUSE;
0448         break;
0449     case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
0450     case SNDRV_PCM_TRIGGER_RESUME:
0451         chip->cap_ctrl &= ~FM801_PAUSE;
0452         break;
0453     default:
0454         spin_unlock(&chip->reg_lock);
0455         snd_BUG();
0456         return -EINVAL;
0457     }
0458     fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
0459     spin_unlock(&chip->reg_lock);
0460     return 0;
0461 }
0462 
0463 static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
0464 {
0465     struct fm801 *chip = snd_pcm_substream_chip(substream);
0466     struct snd_pcm_runtime *runtime = substream->runtime;
0467 
0468     chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
0469     chip->ply_count = snd_pcm_lib_period_bytes(substream);
0470     spin_lock_irq(&chip->reg_lock);
0471     chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
0472                  FM801_STEREO | FM801_RATE_MASK |
0473                  FM801_CHANNELS_MASK);
0474     if (snd_pcm_format_width(runtime->format) == 16)
0475         chip->ply_ctrl |= FM801_16BIT;
0476     if (runtime->channels > 1) {
0477         chip->ply_ctrl |= FM801_STEREO;
0478         if (runtime->channels == 4)
0479             chip->ply_ctrl |= FM801_CHANNELS_4;
0480         else if (runtime->channels == 6)
0481             chip->ply_ctrl |= FM801_CHANNELS_6;
0482     }
0483     chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
0484     chip->ply_buf = 0;
0485     fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
0486     fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
0487     chip->ply_buffer = runtime->dma_addr;
0488     chip->ply_pos = 0;
0489     fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
0490     fm801_writel(chip, PLY_BUF2,
0491              chip->ply_buffer + (chip->ply_count % chip->ply_size));
0492     spin_unlock_irq(&chip->reg_lock);
0493     return 0;
0494 }
0495 
0496 static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
0497 {
0498     struct fm801 *chip = snd_pcm_substream_chip(substream);
0499     struct snd_pcm_runtime *runtime = substream->runtime;
0500 
0501     chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
0502     chip->cap_count = snd_pcm_lib_period_bytes(substream);
0503     spin_lock_irq(&chip->reg_lock);
0504     chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
0505                  FM801_STEREO | FM801_RATE_MASK);
0506     if (snd_pcm_format_width(runtime->format) == 16)
0507         chip->cap_ctrl |= FM801_16BIT;
0508     if (runtime->channels > 1)
0509         chip->cap_ctrl |= FM801_STEREO;
0510     chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
0511     chip->cap_buf = 0;
0512     fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
0513     fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
0514     chip->cap_buffer = runtime->dma_addr;
0515     chip->cap_pos = 0;
0516     fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
0517     fm801_writel(chip, CAP_BUF2,
0518              chip->cap_buffer + (chip->cap_count % chip->cap_size));
0519     spin_unlock_irq(&chip->reg_lock);
0520     return 0;
0521 }
0522 
0523 static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
0524 {
0525     struct fm801 *chip = snd_pcm_substream_chip(substream);
0526     size_t ptr;
0527 
0528     if (!(chip->ply_ctrl & FM801_START))
0529         return 0;
0530     spin_lock(&chip->reg_lock);
0531     ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
0532     if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
0533         ptr += chip->ply_count;
0534         ptr %= chip->ply_size;
0535     }
0536     spin_unlock(&chip->reg_lock);
0537     return bytes_to_frames(substream->runtime, ptr);
0538 }
0539 
0540 static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
0541 {
0542     struct fm801 *chip = snd_pcm_substream_chip(substream);
0543     size_t ptr;
0544 
0545     if (!(chip->cap_ctrl & FM801_START))
0546         return 0;
0547     spin_lock(&chip->reg_lock);
0548     ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
0549     if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
0550         ptr += chip->cap_count;
0551         ptr %= chip->cap_size;
0552     }
0553     spin_unlock(&chip->reg_lock);
0554     return bytes_to_frames(substream->runtime, ptr);
0555 }
0556 
0557 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
0558 {
0559     struct fm801 *chip = dev_id;
0560     unsigned short status;
0561     unsigned int tmp;
0562 
0563     status = fm801_readw(chip, IRQ_STATUS);
0564     status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
0565     if (! status)
0566         return IRQ_NONE;
0567     /* ack first */
0568     fm801_writew(chip, IRQ_STATUS, status);
0569     if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
0570         spin_lock(&chip->reg_lock);
0571         chip->ply_buf++;
0572         chip->ply_pos += chip->ply_count;
0573         chip->ply_pos %= chip->ply_size;
0574         tmp = chip->ply_pos + chip->ply_count;
0575         tmp %= chip->ply_size;
0576         if (chip->ply_buf & 1)
0577             fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
0578         else
0579             fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
0580         spin_unlock(&chip->reg_lock);
0581         snd_pcm_period_elapsed(chip->playback_substream);
0582     }
0583     if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
0584         spin_lock(&chip->reg_lock);
0585         chip->cap_buf++;
0586         chip->cap_pos += chip->cap_count;
0587         chip->cap_pos %= chip->cap_size;
0588         tmp = chip->cap_pos + chip->cap_count;
0589         tmp %= chip->cap_size;
0590         if (chip->cap_buf & 1)
0591             fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
0592         else
0593             fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
0594         spin_unlock(&chip->reg_lock);
0595         snd_pcm_period_elapsed(chip->capture_substream);
0596     }
0597     if (chip->rmidi && (status & FM801_IRQ_MPU))
0598         snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
0599     if (status & FM801_IRQ_VOLUME) {
0600         /* TODO */
0601     }
0602 
0603     return IRQ_HANDLED;
0604 }
0605 
0606 static const struct snd_pcm_hardware snd_fm801_playback =
0607 {
0608     .info =         (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
0609                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
0610                  SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
0611                  SNDRV_PCM_INFO_MMAP_VALID),
0612     .formats =      SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
0613     .rates =        SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
0614     .rate_min =     5500,
0615     .rate_max =     48000,
0616     .channels_min =     1,
0617     .channels_max =     2,
0618     .buffer_bytes_max = (128*1024),
0619     .period_bytes_min = 64,
0620     .period_bytes_max = (128*1024),
0621     .periods_min =      1,
0622     .periods_max =      1024,
0623     .fifo_size =        0,
0624 };
0625 
0626 static const struct snd_pcm_hardware snd_fm801_capture =
0627 {
0628     .info =         (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
0629                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
0630                  SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
0631                  SNDRV_PCM_INFO_MMAP_VALID),
0632     .formats =      SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
0633     .rates =        SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
0634     .rate_min =     5500,
0635     .rate_max =     48000,
0636     .channels_min =     1,
0637     .channels_max =     2,
0638     .buffer_bytes_max = (128*1024),
0639     .period_bytes_min = 64,
0640     .period_bytes_max = (128*1024),
0641     .periods_min =      1,
0642     .periods_max =      1024,
0643     .fifo_size =        0,
0644 };
0645 
0646 static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
0647 {
0648     struct fm801 *chip = snd_pcm_substream_chip(substream);
0649     struct snd_pcm_runtime *runtime = substream->runtime;
0650     int err;
0651 
0652     chip->playback_substream = substream;
0653     runtime->hw = snd_fm801_playback;
0654     snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
0655                    &hw_constraints_rates);
0656     if (chip->multichannel) {
0657         runtime->hw.channels_max = 6;
0658         snd_pcm_hw_constraint_list(runtime, 0,
0659                        SNDRV_PCM_HW_PARAM_CHANNELS,
0660                        &hw_constraints_channels);
0661     }
0662     err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
0663     if (err < 0)
0664         return err;
0665     return 0;
0666 }
0667 
0668 static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
0669 {
0670     struct fm801 *chip = snd_pcm_substream_chip(substream);
0671     struct snd_pcm_runtime *runtime = substream->runtime;
0672     int err;
0673 
0674     chip->capture_substream = substream;
0675     runtime->hw = snd_fm801_capture;
0676     snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
0677                    &hw_constraints_rates);
0678     err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
0679     if (err < 0)
0680         return err;
0681     return 0;
0682 }
0683 
0684 static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
0685 {
0686     struct fm801 *chip = snd_pcm_substream_chip(substream);
0687 
0688     chip->playback_substream = NULL;
0689     return 0;
0690 }
0691 
0692 static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
0693 {
0694     struct fm801 *chip = snd_pcm_substream_chip(substream);
0695 
0696     chip->capture_substream = NULL;
0697     return 0;
0698 }
0699 
0700 static const struct snd_pcm_ops snd_fm801_playback_ops = {
0701     .open =     snd_fm801_playback_open,
0702     .close =    snd_fm801_playback_close,
0703     .prepare =  snd_fm801_playback_prepare,
0704     .trigger =  snd_fm801_playback_trigger,
0705     .pointer =  snd_fm801_playback_pointer,
0706 };
0707 
0708 static const struct snd_pcm_ops snd_fm801_capture_ops = {
0709     .open =     snd_fm801_capture_open,
0710     .close =    snd_fm801_capture_close,
0711     .prepare =  snd_fm801_capture_prepare,
0712     .trigger =  snd_fm801_capture_trigger,
0713     .pointer =  snd_fm801_capture_pointer,
0714 };
0715 
0716 static int snd_fm801_pcm(struct fm801 *chip, int device)
0717 {
0718     struct pci_dev *pdev = to_pci_dev(chip->dev);
0719     struct snd_pcm *pcm;
0720     int err;
0721 
0722     err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm);
0723     if (err < 0)
0724         return err;
0725 
0726     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
0727     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
0728 
0729     pcm->private_data = chip;
0730     pcm->info_flags = 0;
0731     strcpy(pcm->name, "FM801");
0732     chip->pcm = pcm;
0733 
0734     snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &pdev->dev,
0735                        chip->multichannel ? 128*1024 : 64*1024, 128*1024);
0736 
0737     return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
0738                      snd_pcm_alt_chmaps,
0739                      chip->multichannel ? 6 : 2, 0,
0740                      NULL);
0741 }
0742 
0743 /*
0744  *  TEA5757 radio
0745  */
0746 
0747 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
0748 
0749 /* GPIO to TEA575x maps */
0750 struct snd_fm801_tea575x_gpio {
0751     u8 data, clk, wren, most;
0752     char *name;
0753 };
0754 
0755 static const struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
0756     { .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
0757     { .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
0758     { .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
0759 };
0760 
0761 #define get_tea575x_gpio(chip) \
0762     (&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
0763 
0764 static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
0765 {
0766     struct fm801 *chip = tea->private_data;
0767     unsigned short reg = fm801_readw(chip, GPIO_CTRL);
0768     struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
0769 
0770     reg &= ~(FM801_GPIO_GP(gpio.data) |
0771          FM801_GPIO_GP(gpio.clk) |
0772          FM801_GPIO_GP(gpio.wren));
0773 
0774     reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
0775     reg |= (pins & TEA575X_CLK)  ? FM801_GPIO_GP(gpio.clk) : 0;
0776     /* WRITE_ENABLE is inverted */
0777     reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
0778 
0779     fm801_writew(chip, GPIO_CTRL, reg);
0780 }
0781 
0782 static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
0783 {
0784     struct fm801 *chip = tea->private_data;
0785     unsigned short reg = fm801_readw(chip, GPIO_CTRL);
0786     struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
0787     u8 ret;
0788 
0789     ret = 0;
0790     if (reg & FM801_GPIO_GP(gpio.data))
0791         ret |= TEA575X_DATA;
0792     if (reg & FM801_GPIO_GP(gpio.most))
0793         ret |= TEA575X_MOST;
0794     return ret;
0795 }
0796 
0797 static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
0798 {
0799     struct fm801 *chip = tea->private_data;
0800     unsigned short reg = fm801_readw(chip, GPIO_CTRL);
0801     struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
0802 
0803     /* use GPIO lines and set write enable bit */
0804     reg |= FM801_GPIO_GS(gpio.data) |
0805            FM801_GPIO_GS(gpio.wren) |
0806            FM801_GPIO_GS(gpio.clk) |
0807            FM801_GPIO_GS(gpio.most);
0808     if (output) {
0809         /* all of lines are in the write direction */
0810         /* clear data and clock lines */
0811         reg &= ~(FM801_GPIO_GD(gpio.data) |
0812              FM801_GPIO_GD(gpio.wren) |
0813              FM801_GPIO_GD(gpio.clk) |
0814              FM801_GPIO_GP(gpio.data) |
0815              FM801_GPIO_GP(gpio.clk) |
0816              FM801_GPIO_GP(gpio.wren));
0817     } else {
0818         /* use GPIO lines, set data direction to input */
0819         reg |= FM801_GPIO_GD(gpio.data) |
0820                FM801_GPIO_GD(gpio.most) |
0821                FM801_GPIO_GP(gpio.data) |
0822                FM801_GPIO_GP(gpio.most) |
0823                FM801_GPIO_GP(gpio.wren);
0824         /* all of lines are in the write direction, except data */
0825         /* clear data, write enable and clock lines */
0826         reg &= ~(FM801_GPIO_GD(gpio.wren) |
0827              FM801_GPIO_GD(gpio.clk) |
0828              FM801_GPIO_GP(gpio.clk));
0829     }
0830 
0831     fm801_writew(chip, GPIO_CTRL, reg);
0832 }
0833 
0834 static const struct snd_tea575x_ops snd_fm801_tea_ops = {
0835     .set_pins = snd_fm801_tea575x_set_pins,
0836     .get_pins = snd_fm801_tea575x_get_pins,
0837     .set_direction = snd_fm801_tea575x_set_direction,
0838 };
0839 #endif
0840 
0841 /*
0842  *  Mixer routines
0843  */
0844 
0845 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
0846 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
0847   .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
0848   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
0849 
0850 static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
0851                  struct snd_ctl_elem_info *uinfo)
0852 {
0853     int mask = (kcontrol->private_value >> 16) & 0xff;
0854 
0855     uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
0856     uinfo->count = 1;
0857     uinfo->value.integer.min = 0;
0858     uinfo->value.integer.max = mask;
0859     return 0;
0860 }
0861 
0862 static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
0863                 struct snd_ctl_elem_value *ucontrol)
0864 {
0865     struct fm801 *chip = snd_kcontrol_chip(kcontrol);
0866     int reg = kcontrol->private_value & 0xff;
0867     int shift = (kcontrol->private_value >> 8) & 0xff;
0868     int mask = (kcontrol->private_value >> 16) & 0xff;
0869     int invert = (kcontrol->private_value >> 24) & 0xff;
0870     long *value = ucontrol->value.integer.value;
0871 
0872     value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;
0873     if (invert)
0874         value[0] = mask - value[0];
0875     return 0;
0876 }
0877 
0878 static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
0879                 struct snd_ctl_elem_value *ucontrol)
0880 {
0881     struct fm801 *chip = snd_kcontrol_chip(kcontrol);
0882     int reg = kcontrol->private_value & 0xff;
0883     int shift = (kcontrol->private_value >> 8) & 0xff;
0884     int mask = (kcontrol->private_value >> 16) & 0xff;
0885     int invert = (kcontrol->private_value >> 24) & 0xff;
0886     unsigned short val;
0887 
0888     val = (ucontrol->value.integer.value[0] & mask);
0889     if (invert)
0890         val = mask - val;
0891     return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
0892 }
0893 
0894 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
0895 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
0896   .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
0897   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
0898 #define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
0899 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
0900   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
0901   .name = xname, .info = snd_fm801_info_double, \
0902   .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
0903   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
0904   .tlv = { .p = (xtlv) } }
0905 
0906 static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
0907                  struct snd_ctl_elem_info *uinfo)
0908 {
0909     int mask = (kcontrol->private_value >> 16) & 0xff;
0910 
0911     uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
0912     uinfo->count = 2;
0913     uinfo->value.integer.min = 0;
0914     uinfo->value.integer.max = mask;
0915     return 0;
0916 }
0917 
0918 static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
0919                 struct snd_ctl_elem_value *ucontrol)
0920 {
0921     struct fm801 *chip = snd_kcontrol_chip(kcontrol);
0922         int reg = kcontrol->private_value & 0xff;
0923     int shift_left = (kcontrol->private_value >> 8) & 0x0f;
0924     int shift_right = (kcontrol->private_value >> 12) & 0x0f;
0925     int mask = (kcontrol->private_value >> 16) & 0xff;
0926     int invert = (kcontrol->private_value >> 24) & 0xff;
0927     long *value = ucontrol->value.integer.value;
0928 
0929     spin_lock_irq(&chip->reg_lock);
0930     value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;
0931     value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;
0932     spin_unlock_irq(&chip->reg_lock);
0933     if (invert) {
0934         value[0] = mask - value[0];
0935         value[1] = mask - value[1];
0936     }
0937     return 0;
0938 }
0939 
0940 static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
0941                 struct snd_ctl_elem_value *ucontrol)
0942 {
0943     struct fm801 *chip = snd_kcontrol_chip(kcontrol);
0944     int reg = kcontrol->private_value & 0xff;
0945     int shift_left = (kcontrol->private_value >> 8) & 0x0f;
0946     int shift_right = (kcontrol->private_value >> 12) & 0x0f;
0947     int mask = (kcontrol->private_value >> 16) & 0xff;
0948     int invert = (kcontrol->private_value >> 24) & 0xff;
0949     unsigned short val1, val2;
0950  
0951     val1 = ucontrol->value.integer.value[0] & mask;
0952     val2 = ucontrol->value.integer.value[1] & mask;
0953     if (invert) {
0954         val1 = mask - val1;
0955         val2 = mask - val2;
0956     }
0957     return snd_fm801_update_bits(chip, reg,
0958                      (mask << shift_left) | (mask << shift_right),
0959                      (val1 << shift_left ) | (val2 << shift_right));
0960 }
0961 
0962 static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
0963                   struct snd_ctl_elem_info *uinfo)
0964 {
0965     static const char * const texts[5] = {
0966         "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
0967     };
0968  
0969     return snd_ctl_enum_info(uinfo, 1, 5, texts);
0970 }
0971 
0972 static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
0973                  struct snd_ctl_elem_value *ucontrol)
0974 {
0975     struct fm801 *chip = snd_kcontrol_chip(kcontrol);
0976         unsigned short val;
0977  
0978     val = fm801_readw(chip, REC_SRC) & 7;
0979     if (val > 4)
0980         val = 4;
0981         ucontrol->value.enumerated.item[0] = val;
0982         return 0;
0983 }
0984 
0985 static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
0986                  struct snd_ctl_elem_value *ucontrol)
0987 {
0988     struct fm801 *chip = snd_kcontrol_chip(kcontrol);
0989         unsigned short val;
0990  
0991     val = ucontrol->value.enumerated.item[0];
0992     if (val > 4)
0993                 return -EINVAL;
0994     return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
0995 }
0996 
0997 static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
0998 
0999 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1000 
1001 static const struct snd_kcontrol_new snd_fm801_controls[] = {
1002 FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
1003          db_scale_dsp),
1004 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1005 FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
1006          db_scale_dsp),
1007 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1008 FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
1009          db_scale_dsp),
1010 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1011 {
1012     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1013     .name = "Digital Capture Source",
1014     .info = snd_fm801_info_mux,
1015     .get = snd_fm801_get_mux,
1016     .put = snd_fm801_put_mux,
1017 }
1018 };
1019 
1020 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1021 
1022 static const struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1023 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1024 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1025 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1026 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1027 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1028 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1029 };
1030 
1031 static int snd_fm801_mixer(struct fm801 *chip)
1032 {
1033     struct snd_ac97_template ac97;
1034     unsigned int i;
1035     int err;
1036     static const struct snd_ac97_bus_ops ops = {
1037         .write = snd_fm801_codec_write,
1038         .read = snd_fm801_codec_read,
1039     };
1040 
1041     err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
1042     if (err < 0)
1043         return err;
1044 
1045     memset(&ac97, 0, sizeof(ac97));
1046     ac97.private_data = chip;
1047     err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
1048     if (err < 0)
1049         return err;
1050     if (chip->secondary) {
1051         ac97.num = 1;
1052         ac97.addr = chip->secondary_addr;
1053         err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec);
1054         if (err < 0)
1055             return err;
1056     }
1057     for (i = 0; i < FM801_CONTROLS; i++) {
1058         err = snd_ctl_add(chip->card,
1059             snd_ctl_new1(&snd_fm801_controls[i], chip));
1060         if (err < 0)
1061             return err;
1062     }
1063     if (chip->multichannel) {
1064         for (i = 0; i < FM801_CONTROLS_MULTI; i++) {
1065             err = snd_ctl_add(chip->card,
1066                 snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1067             if (err < 0)
1068                 return err;
1069         }
1070     }
1071     return 0;
1072 }
1073 
1074 /*
1075  *  initialization routines
1076  */
1077 
1078 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1079               unsigned short reg, unsigned long waits)
1080 {
1081     unsigned long timeout = jiffies + waits;
1082 
1083     fm801_writew(chip, AC97_CMD,
1084              reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
1085     udelay(5);
1086     do {
1087         if ((fm801_readw(chip, AC97_CMD) &
1088              (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
1089             return 0;
1090         schedule_timeout_uninterruptible(1);
1091     } while (time_after(timeout, jiffies));
1092     return -EIO;
1093 }
1094 
1095 static int reset_codec(struct fm801 *chip)
1096 {
1097     /* codec cold reset + AC'97 warm reset */
1098     fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1099     fm801_readw(chip, CODEC_CTRL); /* flush posting data */
1100     udelay(100);
1101     fm801_writew(chip, CODEC_CTRL, 0);
1102 
1103     return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));
1104 }
1105 
1106 static void snd_fm801_chip_multichannel_init(struct fm801 *chip)
1107 {
1108     unsigned short cmdw;
1109 
1110     if (chip->multichannel) {
1111         if (chip->secondary_addr) {
1112             wait_for_codec(chip, chip->secondary_addr,
1113                        AC97_VENDOR_ID1, msecs_to_jiffies(50));
1114         } else {
1115             /* my card has the secondary codec */
1116             /* at address #3, so the loop is inverted */
1117             int i;
1118             for (i = 3; i > 0; i--) {
1119                 if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
1120                              msecs_to_jiffies(50))) {
1121                     cmdw = fm801_readw(chip, AC97_DATA);
1122                     if (cmdw != 0xffff && cmdw != 0) {
1123                         chip->secondary = 1;
1124                         chip->secondary_addr = i;
1125                         break;
1126                     }
1127                 }
1128             }
1129         }
1130 
1131         /* the recovery phase, it seems that probing for non-existing codec might */
1132         /* cause timeout problems */
1133         wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1134     }
1135 }
1136 
1137 static void snd_fm801_chip_init(struct fm801 *chip)
1138 {
1139     unsigned short cmdw;
1140 
1141     /* init volume */
1142     fm801_writew(chip, PCM_VOL, 0x0808);
1143     fm801_writew(chip, FM_VOL, 0x9f1f);
1144     fm801_writew(chip, I2S_VOL, 0x8808);
1145 
1146     /* I2S control - I2S mode */
1147     fm801_writew(chip, I2S_MODE, 0x0003);
1148 
1149     /* interrupt setup */
1150     cmdw = fm801_readw(chip, IRQ_MASK);
1151     if (chip->irq < 0)
1152         cmdw |= 0x00c3;     /* mask everything, no PCM nor MPU */
1153     else
1154         cmdw &= ~0x0083;    /* unmask MPU, PLAYBACK & CAPTURE */
1155     fm801_writew(chip, IRQ_MASK, cmdw);
1156 
1157     /* interrupt clear */
1158     fm801_writew(chip, IRQ_STATUS,
1159              FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
1160 }
1161 
1162 static void snd_fm801_free(struct snd_card *card)
1163 {
1164     struct fm801 *chip = card->private_data;
1165     unsigned short cmdw;
1166 
1167     /* interrupt setup - mask everything */
1168     cmdw = fm801_readw(chip, IRQ_MASK);
1169     cmdw |= 0x00c3;
1170     fm801_writew(chip, IRQ_MASK, cmdw);
1171 
1172 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
1173     if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
1174         snd_tea575x_exit(&chip->tea);
1175         v4l2_device_unregister(&chip->v4l2_dev);
1176     }
1177 #endif
1178 }
1179 
1180 static int snd_fm801_create(struct snd_card *card,
1181                 struct pci_dev *pci,
1182                 int tea575x_tuner,
1183                 int radio_nr)
1184 {
1185     struct fm801 *chip = card->private_data;
1186     int err;
1187 
1188     err = pcim_enable_device(pci);
1189     if (err < 0)
1190         return err;
1191     spin_lock_init(&chip->reg_lock);
1192     chip->card = card;
1193     chip->dev = &pci->dev;
1194     chip->irq = -1;
1195     chip->tea575x_tuner = tea575x_tuner;
1196     err = pci_request_regions(pci, "FM801");
1197     if (err < 0)
1198         return err;
1199     chip->port = pci_resource_start(pci, 0);
1200 
1201     if (pci->revision >= 0xb1)  /* FM801-AU */
1202         chip->multichannel = 1;
1203 
1204     if (!(chip->tea575x_tuner & TUNER_ONLY)) {
1205         if (reset_codec(chip) < 0) {
1206             dev_info(chip->card->dev,
1207                  "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
1208             chip->tea575x_tuner = 3 | TUNER_ONLY;
1209         } else {
1210             snd_fm801_chip_multichannel_init(chip);
1211         }
1212     }
1213 
1214     if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {
1215         if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
1216                 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1217             dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1218             return -EBUSY;
1219         }
1220         chip->irq = pci->irq;
1221         card->sync_irq = chip->irq;
1222         pci_set_master(pci);
1223     }
1224 
1225     card->private_free = snd_fm801_free;
1226     snd_fm801_chip_init(chip);
1227 
1228 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
1229     err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1230     if (err < 0)
1231         return err;
1232     chip->tea.v4l2_dev = &chip->v4l2_dev;
1233     chip->tea.radio_nr = radio_nr;
1234     chip->tea.private_data = chip;
1235     chip->tea.ops = &snd_fm801_tea_ops;
1236     sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
1237     if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1238         (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {
1239         if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
1240             dev_err(card->dev, "TEA575x radio not found\n");
1241             return -ENODEV;
1242         }
1243     } else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {
1244         unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;
1245 
1246         /* autodetect tuner connection */
1247         for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1248             chip->tea575x_tuner = tea575x_tuner;
1249             if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
1250                 dev_info(card->dev,
1251                      "detected TEA575x radio type %s\n",
1252                        get_tea575x_gpio(chip)->name);
1253                 break;
1254             }
1255         }
1256         if (tea575x_tuner == 4) {
1257             dev_err(card->dev, "TEA575x radio not found\n");
1258             chip->tea575x_tuner = TUNER_DISABLED;
1259         }
1260 
1261         chip->tea575x_tuner |= tuner_only;
1262     }
1263     if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
1264         strscpy(chip->tea.card, get_tea575x_gpio(chip)->name,
1265             sizeof(chip->tea.card));
1266     }
1267 #endif
1268     return 0;
1269 }
1270 
1271 static int __snd_card_fm801_probe(struct pci_dev *pci,
1272                   const struct pci_device_id *pci_id)
1273 {
1274     static int dev;
1275     struct snd_card *card;
1276     struct fm801 *chip;
1277     struct snd_opl3 *opl3;
1278     int err;
1279 
1280         if (dev >= SNDRV_CARDS)
1281                 return -ENODEV;
1282     if (!enable[dev]) {
1283         dev++;
1284         return -ENOENT;
1285     }
1286 
1287     err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1288                 sizeof(*chip), &card);
1289     if (err < 0)
1290         return err;
1291     chip = card->private_data;
1292     err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev]);
1293     if (err < 0)
1294         return err;
1295 
1296     strcpy(card->driver, "FM801");
1297     strcpy(card->shortname, "ForteMedia FM801-");
1298     strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1299     sprintf(card->longname, "%s at 0x%lx, irq %i",
1300         card->shortname, chip->port, chip->irq);
1301 
1302     if (chip->tea575x_tuner & TUNER_ONLY)
1303         goto __fm801_tuner_only;
1304 
1305     err = snd_fm801_pcm(chip, 0);
1306     if (err < 0)
1307         return err;
1308     err = snd_fm801_mixer(chip);
1309     if (err < 0)
1310         return err;
1311     err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1312                   chip->port + FM801_MPU401_DATA,
1313                   MPU401_INFO_INTEGRATED |
1314                   MPU401_INFO_IRQ_HOOK,
1315                   -1, &chip->rmidi);
1316     if (err < 0)
1317         return err;
1318     err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1319                   chip->port + FM801_OPL3_BANK1,
1320                   OPL3_HW_OPL3_FM801, 1, &opl3);
1321     if (err < 0)
1322         return err;
1323     err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1324     if (err < 0)
1325         return err;
1326 
1327       __fm801_tuner_only:
1328     err = snd_card_register(card);
1329     if (err < 0)
1330         return err;
1331     pci_set_drvdata(pci, card);
1332     dev++;
1333     return 0;
1334 }
1335 
1336 static int snd_card_fm801_probe(struct pci_dev *pci,
1337                 const struct pci_device_id *pci_id)
1338 {
1339     return snd_card_free_on_error(&pci->dev, __snd_card_fm801_probe(pci, pci_id));
1340 }
1341 
1342 #ifdef CONFIG_PM_SLEEP
1343 static const unsigned char saved_regs[] = {
1344     FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1345     FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1346     FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1347     FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1348 };
1349 
1350 static int snd_fm801_suspend(struct device *dev)
1351 {
1352     struct snd_card *card = dev_get_drvdata(dev);
1353     struct fm801 *chip = card->private_data;
1354     int i;
1355 
1356     snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1357 
1358     for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1359         chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);
1360 
1361     if (chip->tea575x_tuner & TUNER_ONLY) {
1362         /* FIXME: tea575x suspend */
1363     } else {
1364         snd_ac97_suspend(chip->ac97);
1365         snd_ac97_suspend(chip->ac97_sec);
1366     }
1367 
1368     return 0;
1369 }
1370 
1371 static int snd_fm801_resume(struct device *dev)
1372 {
1373     struct snd_card *card = dev_get_drvdata(dev);
1374     struct fm801 *chip = card->private_data;
1375     int i;
1376 
1377     if (chip->tea575x_tuner & TUNER_ONLY) {
1378         snd_fm801_chip_init(chip);
1379     } else {
1380         reset_codec(chip);
1381         snd_fm801_chip_multichannel_init(chip);
1382         snd_fm801_chip_init(chip);
1383         snd_ac97_resume(chip->ac97);
1384         snd_ac97_resume(chip->ac97_sec);
1385     }
1386 
1387     for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1388         fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);
1389 
1390 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
1391     if (!(chip->tea575x_tuner & TUNER_DISABLED))
1392         snd_tea575x_set_freq(&chip->tea);
1393 #endif
1394 
1395     snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1396     return 0;
1397 }
1398 
1399 static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1400 #define SND_FM801_PM_OPS    &snd_fm801_pm
1401 #else
1402 #define SND_FM801_PM_OPS    NULL
1403 #endif /* CONFIG_PM_SLEEP */
1404 
1405 static struct pci_driver fm801_driver = {
1406     .name = KBUILD_MODNAME,
1407     .id_table = snd_fm801_ids,
1408     .probe = snd_card_fm801_probe,
1409     .driver = {
1410         .pm = SND_FM801_PM_OPS,
1411     },
1412 };
1413 
1414 module_pci_driver(fm801_driver);
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