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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
0004  *  Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
0005  *                   Jaroslav Kysela <perex@perex.cz>,
0006  *                   Thomas Sailer <sailer@ife.ee.ethz.ch>,
0007  *                   Abramo Bagnara <abramo@alsa-project.org>,
0008  *                   Markus Gruber <gruber@eikon.tum.de>
0009  * 
0010  * Rewritten from sonicvibes.c source.
0011  *
0012  *  TODO:
0013  *    Rewrite better spinlocks
0014  */
0015 
0016 /*
0017   NOTES:
0018   - Capture data is written unaligned starting from dma_base + 1 so I need to
0019     disable mmap and to add a copy callback.
0020   - After several cycle of the following:
0021     while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
0022     a "playback write error (DMA or IRQ trouble?)" may happen.
0023     This is due to playback interrupts not generated.
0024     I suspect a timing issue.
0025   - Sometimes the interrupt handler is invoked wrongly during playback.
0026     This generates some harmless "Unexpected hw_pointer: wrong interrupt
0027     acknowledge".
0028     I've seen that using small period sizes.
0029     Reproducible with:
0030     mpg123 test.mp3 &
0031     hdparm -t -T /dev/hda
0032 */
0033 
0034 
0035 #include <linux/init.h>
0036 #include <linux/interrupt.h>
0037 #include <linux/pci.h>
0038 #include <linux/slab.h>
0039 #include <linux/gameport.h>
0040 #include <linux/module.h>
0041 #include <linux/delay.h>
0042 #include <linux/dma-mapping.h>
0043 #include <linux/io.h>
0044 #include <sound/core.h>
0045 #include <sound/control.h>
0046 #include <sound/pcm.h>
0047 #include <sound/opl3.h>
0048 #include <sound/mpu401.h>
0049 #include <sound/initval.h>
0050 #include <sound/tlv.h>
0051 
0052 MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
0053 MODULE_DESCRIPTION("ESS Solo-1");
0054 MODULE_LICENSE("GPL");
0055 
0056 #if IS_REACHABLE(CONFIG_GAMEPORT)
0057 #define SUPPORT_JOYSTICK 1
0058 #endif
0059 
0060 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;  /* Index 0-MAX */
0061 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;   /* ID for this card */
0062 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
0063 
0064 module_param_array(index, int, NULL, 0444);
0065 MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
0066 module_param_array(id, charp, NULL, 0444);
0067 MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
0068 module_param_array(enable, bool, NULL, 0444);
0069 MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
0070 
0071 #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
0072 
0073 #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
0074 
0075 #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
0076 
0077 #define SL_PCI_LEGACYCONTROL        0x40
0078 #define SL_PCI_CONFIG           0x50
0079 #define SL_PCI_DDMACONTROL      0x60
0080 
0081 #define ESSIO_REG_AUDIO2DMAADDR     0
0082 #define ESSIO_REG_AUDIO2DMACOUNT    4
0083 #define ESSIO_REG_AUDIO2MODE        6
0084 #define ESSIO_REG_IRQCONTROL        7
0085 
0086 #define ESSDM_REG_DMAADDR       0x00
0087 #define ESSDM_REG_DMACOUNT      0x04
0088 #define ESSDM_REG_DMACOMMAND        0x08
0089 #define ESSDM_REG_DMASTATUS     0x08
0090 #define ESSDM_REG_DMAMODE       0x0b
0091 #define ESSDM_REG_DMACLEAR      0x0d
0092 #define ESSDM_REG_DMAMASK       0x0f
0093 
0094 #define ESSSB_REG_FMLOWADDR     0x00
0095 #define ESSSB_REG_FMHIGHADDR        0x02
0096 #define ESSSB_REG_MIXERADDR     0x04
0097 #define ESSSB_REG_MIXERDATA     0x05
0098 
0099 #define ESSSB_IREG_AUDIO1       0x14
0100 #define ESSSB_IREG_MICMIX       0x1a
0101 #define ESSSB_IREG_RECSRC       0x1c
0102 #define ESSSB_IREG_MASTER       0x32
0103 #define ESSSB_IREG_FM           0x36
0104 #define ESSSB_IREG_AUXACD       0x38
0105 #define ESSSB_IREG_AUXB         0x3a
0106 #define ESSSB_IREG_PCSPEAKER        0x3c
0107 #define ESSSB_IREG_LINE         0x3e
0108 #define ESSSB_IREG_SPATCONTROL      0x50
0109 #define ESSSB_IREG_SPATLEVEL        0x52
0110 #define ESSSB_IREG_MASTER_LEFT      0x60
0111 #define ESSSB_IREG_MASTER_RIGHT     0x62
0112 #define ESSSB_IREG_MPU401CONTROL    0x64
0113 #define ESSSB_IREG_MICMIXRECORD     0x68
0114 #define ESSSB_IREG_AUDIO2RECORD     0x69
0115 #define ESSSB_IREG_AUXACDRECORD     0x6a
0116 #define ESSSB_IREG_FMRECORD     0x6b
0117 #define ESSSB_IREG_AUXBRECORD       0x6c
0118 #define ESSSB_IREG_MONO         0x6d
0119 #define ESSSB_IREG_LINERECORD       0x6e
0120 #define ESSSB_IREG_MONORECORD       0x6f
0121 #define ESSSB_IREG_AUDIO2SAMPLE     0x70
0122 #define ESSSB_IREG_AUDIO2MODE       0x71
0123 #define ESSSB_IREG_AUDIO2FILTER     0x72
0124 #define ESSSB_IREG_AUDIO2TCOUNTL    0x74
0125 #define ESSSB_IREG_AUDIO2TCOUNTH    0x76
0126 #define ESSSB_IREG_AUDIO2CONTROL1   0x78
0127 #define ESSSB_IREG_AUDIO2CONTROL2   0x7a
0128 #define ESSSB_IREG_AUDIO2       0x7c
0129 
0130 #define ESSSB_REG_RESET         0x06
0131 
0132 #define ESSSB_REG_READDATA      0x0a
0133 #define ESSSB_REG_WRITEDATA     0x0c
0134 #define ESSSB_REG_READSTATUS        0x0c
0135 
0136 #define ESSSB_REG_STATUS        0x0e
0137 
0138 #define ESS_CMD_EXTSAMPLERATE       0xa1
0139 #define ESS_CMD_FILTERDIV       0xa2
0140 #define ESS_CMD_DMACNTRELOADL       0xa4
0141 #define ESS_CMD_DMACNTRELOADH       0xa5
0142 #define ESS_CMD_ANALOGCONTROL       0xa8
0143 #define ESS_CMD_IRQCONTROL      0xb1
0144 #define ESS_CMD_DRQCONTROL      0xb2
0145 #define ESS_CMD_RECLEVEL        0xb4
0146 #define ESS_CMD_SETFORMAT       0xb6
0147 #define ESS_CMD_SETFORMAT2      0xb7
0148 #define ESS_CMD_DMACONTROL      0xb8
0149 #define ESS_CMD_DMATYPE         0xb9
0150 #define ESS_CMD_OFFSETLEFT      0xba    
0151 #define ESS_CMD_OFFSETRIGHT     0xbb
0152 #define ESS_CMD_READREG         0xc0
0153 #define ESS_CMD_ENABLEEXT       0xc6
0154 #define ESS_CMD_PAUSEDMA        0xd0
0155 #define ESS_CMD_ENABLEAUDIO1        0xd1
0156 #define ESS_CMD_STOPAUDIO1      0xd3
0157 #define ESS_CMD_AUDIO1STATUS        0xd8
0158 #define ESS_CMD_CONTDMA         0xd4
0159 #define ESS_CMD_TESTIRQ         0xf2
0160 
0161 #define ESS_RECSRC_MIC      0
0162 #define ESS_RECSRC_AUXACD   2
0163 #define ESS_RECSRC_AUXB     5
0164 #define ESS_RECSRC_LINE     6
0165 #define ESS_RECSRC_NONE     7
0166 
0167 #define DAC1 0x01
0168 #define ADC1 0x02
0169 #define DAC2 0x04
0170 
0171 /*
0172 
0173  */
0174 
0175 #define SAVED_REG_SIZE  32 /* max. number of registers to save */
0176 
0177 struct es1938 {
0178     int irq;
0179 
0180     unsigned long io_port;
0181     unsigned long sb_port;
0182     unsigned long vc_port;
0183     unsigned long mpu_port;
0184     unsigned long game_port;
0185     unsigned long ddma_port;
0186 
0187     unsigned char irqmask;
0188     unsigned char revision;
0189 
0190     struct snd_kcontrol *hw_volume;
0191     struct snd_kcontrol *hw_switch;
0192     struct snd_kcontrol *master_volume;
0193     struct snd_kcontrol *master_switch;
0194 
0195     struct pci_dev *pci;
0196     struct snd_card *card;
0197     struct snd_pcm *pcm;
0198     struct snd_pcm_substream *capture_substream;
0199     struct snd_pcm_substream *playback1_substream;
0200     struct snd_pcm_substream *playback2_substream;
0201     struct snd_rawmidi *rmidi;
0202 
0203     unsigned int dma1_size;
0204     unsigned int dma2_size;
0205     unsigned int dma1_start;
0206     unsigned int dma2_start;
0207     unsigned int dma1_shift;
0208     unsigned int dma2_shift;
0209     unsigned int last_capture_dmaaddr;
0210     unsigned int active;
0211 
0212     spinlock_t reg_lock;
0213     spinlock_t mixer_lock;
0214         struct snd_info_entry *proc_entry;
0215 
0216 #ifdef SUPPORT_JOYSTICK
0217     struct gameport *gameport;
0218 #endif
0219 #ifdef CONFIG_PM_SLEEP
0220     unsigned char saved_regs[SAVED_REG_SIZE];
0221 #endif
0222 };
0223 
0224 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
0225 
0226 static const struct pci_device_id snd_es1938_ids[] = {
0227     { PCI_VDEVICE(ESS, 0x1969), 0, },   /* Solo-1 */
0228     { 0, }
0229 };
0230 
0231 MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
0232 
0233 #define RESET_LOOP_TIMEOUT  0x10000
0234 #define WRITE_LOOP_TIMEOUT  0x10000
0235 #define GET_LOOP_TIMEOUT    0x01000
0236 
0237 /* -----------------------------------------------------------------
0238  * Write to a mixer register
0239  * -----------------------------------------------------------------*/
0240 static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
0241 {
0242     unsigned long flags;
0243     spin_lock_irqsave(&chip->mixer_lock, flags);
0244     outb(reg, SLSB_REG(chip, MIXERADDR));
0245     outb(val, SLSB_REG(chip, MIXERDATA));
0246     spin_unlock_irqrestore(&chip->mixer_lock, flags);
0247     dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
0248 }
0249 
0250 /* -----------------------------------------------------------------
0251  * Read from a mixer register
0252  * -----------------------------------------------------------------*/
0253 static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
0254 {
0255     int data;
0256     unsigned long flags;
0257     spin_lock_irqsave(&chip->mixer_lock, flags);
0258     outb(reg, SLSB_REG(chip, MIXERADDR));
0259     data = inb(SLSB_REG(chip, MIXERDATA));
0260     spin_unlock_irqrestore(&chip->mixer_lock, flags);
0261     dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
0262     return data;
0263 }
0264 
0265 /* -----------------------------------------------------------------
0266  * Write to some bits of a mixer register (return old value)
0267  * -----------------------------------------------------------------*/
0268 static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
0269                  unsigned char mask, unsigned char val)
0270 {
0271     unsigned long flags;
0272     unsigned char old, new, oval;
0273     spin_lock_irqsave(&chip->mixer_lock, flags);
0274     outb(reg, SLSB_REG(chip, MIXERADDR));
0275     old = inb(SLSB_REG(chip, MIXERDATA));
0276     oval = old & mask;
0277     if (val != oval) {
0278         new = (old & ~mask) | (val & mask);
0279         outb(new, SLSB_REG(chip, MIXERDATA));
0280         dev_dbg(chip->card->dev,
0281             "Mixer reg %02x was %02x, set to %02x\n",
0282                reg, old, new);
0283     }
0284     spin_unlock_irqrestore(&chip->mixer_lock, flags);
0285     return oval;
0286 }
0287 
0288 /* -----------------------------------------------------------------
0289  * Write command to Controller Registers
0290  * -----------------------------------------------------------------*/
0291 static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
0292 {
0293     int i;
0294     unsigned char v;
0295     for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
0296         v = inb(SLSB_REG(chip, READSTATUS));
0297         if (!(v & 0x80)) {
0298             outb(cmd, SLSB_REG(chip, WRITEDATA));
0299             return;
0300         }
0301     }
0302     dev_err(chip->card->dev,
0303         "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
0304 }
0305 
0306 /* -----------------------------------------------------------------
0307  * Read the Read Data Buffer
0308  * -----------------------------------------------------------------*/
0309 static int snd_es1938_get_byte(struct es1938 *chip)
0310 {
0311     int i;
0312     unsigned char v;
0313     for (i = GET_LOOP_TIMEOUT; i; i--) {
0314         v = inb(SLSB_REG(chip, STATUS));
0315         if (v & 0x80)
0316             return inb(SLSB_REG(chip, READDATA));
0317     }
0318     dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
0319     return -ENODEV;
0320 }
0321 
0322 /* -----------------------------------------------------------------
0323  * Write value cmd register
0324  * -----------------------------------------------------------------*/
0325 static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
0326 {
0327     unsigned long flags;
0328     spin_lock_irqsave(&chip->reg_lock, flags);
0329     snd_es1938_write_cmd(chip, reg);
0330     snd_es1938_write_cmd(chip, val);
0331     spin_unlock_irqrestore(&chip->reg_lock, flags);
0332     dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
0333 }
0334 
0335 /* -----------------------------------------------------------------
0336  * Read data from cmd register and return it
0337  * -----------------------------------------------------------------*/
0338 static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
0339 {
0340     unsigned char val;
0341     unsigned long flags;
0342     spin_lock_irqsave(&chip->reg_lock, flags);
0343     snd_es1938_write_cmd(chip, ESS_CMD_READREG);
0344     snd_es1938_write_cmd(chip, reg);
0345     val = snd_es1938_get_byte(chip);
0346     spin_unlock_irqrestore(&chip->reg_lock, flags);
0347     dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
0348     return val;
0349 }
0350 
0351 /* -----------------------------------------------------------------
0352  * Write data to cmd register and return old value
0353  * -----------------------------------------------------------------*/
0354 static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
0355                unsigned char val)
0356 {
0357     unsigned long flags;
0358     unsigned char old, new, oval;
0359     spin_lock_irqsave(&chip->reg_lock, flags);
0360     snd_es1938_write_cmd(chip, ESS_CMD_READREG);
0361     snd_es1938_write_cmd(chip, reg);
0362     old = snd_es1938_get_byte(chip);
0363     oval = old & mask;
0364     if (val != oval) {
0365         snd_es1938_write_cmd(chip, reg);
0366         new = (old & ~mask) | (val & mask);
0367         snd_es1938_write_cmd(chip, new);
0368         dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
0369                reg, old, new);
0370     }
0371     spin_unlock_irqrestore(&chip->reg_lock, flags);
0372     return oval;
0373 }
0374 
0375 /* --------------------------------------------------------------------
0376  * Reset the chip
0377  * --------------------------------------------------------------------*/
0378 static void snd_es1938_reset(struct es1938 *chip)
0379 {
0380     int i;
0381 
0382     outb(3, SLSB_REG(chip, RESET));
0383     inb(SLSB_REG(chip, RESET));
0384     outb(0, SLSB_REG(chip, RESET));
0385     for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
0386         if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
0387             if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
0388                 goto __next;
0389         }
0390     }
0391     dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
0392 
0393      __next:
0394     snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
0395 
0396     /* Demand transfer DMA: 4 bytes per DMA request */
0397     snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
0398 
0399     /* Change behaviour of register A1
0400        4x oversampling
0401        2nd channel DAC asynchronous */                                                      
0402     snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
0403     /* enable/select DMA channel and IRQ channel */
0404     snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
0405     snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
0406     snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
0407     /* Set spatializer parameters to recommended values */
0408     snd_es1938_mixer_write(chip, 0x54, 0x8f);
0409     snd_es1938_mixer_write(chip, 0x56, 0x95);
0410     snd_es1938_mixer_write(chip, 0x58, 0x94);
0411     snd_es1938_mixer_write(chip, 0x5a, 0x80);
0412 }
0413 
0414 /* --------------------------------------------------------------------
0415  * Reset the FIFOs
0416  * --------------------------------------------------------------------*/
0417 static void snd_es1938_reset_fifo(struct es1938 *chip)
0418 {
0419     outb(2, SLSB_REG(chip, RESET));
0420     outb(0, SLSB_REG(chip, RESET));
0421 }
0422 
0423 static const struct snd_ratnum clocks[2] = {
0424     {
0425         .num = 793800,
0426         .den_min = 1,
0427         .den_max = 128,
0428         .den_step = 1,
0429     },
0430     {
0431         .num = 768000,
0432         .den_min = 1,
0433         .den_max = 128,
0434         .den_step = 1,
0435     }
0436 };
0437 
0438 static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
0439     .nrats = 2,
0440     .rats = clocks,
0441 };
0442 
0443 
0444 static void snd_es1938_rate_set(struct es1938 *chip, 
0445                 struct snd_pcm_substream *substream,
0446                 int mode)
0447 {
0448     unsigned int bits, div0;
0449     struct snd_pcm_runtime *runtime = substream->runtime;
0450     if (runtime->rate_num == clocks[0].num)
0451         bits = 128 - runtime->rate_den;
0452     else
0453         bits = 256 - runtime->rate_den;
0454 
0455     /* set filter register */
0456     div0 = 256 - 7160000*20/(8*82*runtime->rate);
0457         
0458     if (mode == DAC2) {
0459         snd_es1938_mixer_write(chip, 0x70, bits);
0460         snd_es1938_mixer_write(chip, 0x72, div0);
0461     } else {
0462         snd_es1938_write(chip, 0xA1, bits);
0463         snd_es1938_write(chip, 0xA2, div0);
0464     }
0465 }
0466 
0467 /* --------------------------------------------------------------------
0468  * Configure Solo1 builtin DMA Controller
0469  * --------------------------------------------------------------------*/
0470 
0471 static void snd_es1938_playback1_setdma(struct es1938 *chip)
0472 {
0473     outb(0x00, SLIO_REG(chip, AUDIO2MODE));
0474     outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
0475     outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
0476     outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
0477 }
0478 
0479 static void snd_es1938_playback2_setdma(struct es1938 *chip)
0480 {
0481     /* Enable DMA controller */
0482     outb(0xc4, SLDM_REG(chip, DMACOMMAND));
0483     /* 1. Master reset */
0484     outb(0, SLDM_REG(chip, DMACLEAR));
0485     /* 2. Mask DMA */
0486     outb(1, SLDM_REG(chip, DMAMASK));
0487     outb(0x18, SLDM_REG(chip, DMAMODE));
0488     outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
0489     outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
0490     /* 3. Unmask DMA */
0491     outb(0, SLDM_REG(chip, DMAMASK));
0492 }
0493 
0494 static void snd_es1938_capture_setdma(struct es1938 *chip)
0495 {
0496     /* Enable DMA controller */
0497     outb(0xc4, SLDM_REG(chip, DMACOMMAND));
0498     /* 1. Master reset */
0499     outb(0, SLDM_REG(chip, DMACLEAR));
0500     /* 2. Mask DMA */
0501     outb(1, SLDM_REG(chip, DMAMASK));
0502     outb(0x14, SLDM_REG(chip, DMAMODE));
0503     outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
0504     chip->last_capture_dmaaddr = chip->dma1_start;
0505     outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
0506     /* 3. Unmask DMA */
0507     outb(0, SLDM_REG(chip, DMAMASK));
0508 }
0509 
0510 /* ----------------------------------------------------------------------
0511  *
0512  *                           *** PCM part ***
0513  */
0514 
0515 static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
0516                       int cmd)
0517 {
0518     struct es1938 *chip = snd_pcm_substream_chip(substream);
0519     int val;
0520     switch (cmd) {
0521     case SNDRV_PCM_TRIGGER_START:
0522     case SNDRV_PCM_TRIGGER_RESUME:
0523         val = 0x0f;
0524         chip->active |= ADC1;
0525         break;
0526     case SNDRV_PCM_TRIGGER_STOP:
0527     case SNDRV_PCM_TRIGGER_SUSPEND:
0528         val = 0x00;
0529         chip->active &= ~ADC1;
0530         break;
0531     default:
0532         return -EINVAL;
0533     }
0534     snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
0535     return 0;
0536 }
0537 
0538 static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
0539                     int cmd)
0540 {
0541     struct es1938 *chip = snd_pcm_substream_chip(substream);
0542     switch (cmd) {
0543     case SNDRV_PCM_TRIGGER_START:
0544     case SNDRV_PCM_TRIGGER_RESUME:
0545         /* According to the documentation this should be:
0546            0x13 but that value may randomly swap stereo channels */
0547                 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
0548                 udelay(10);
0549         snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
0550                 /* This two stage init gives the FIFO -> DAC connection time to
0551                  * settle before first data from DMA flows in.  This should ensure
0552                  * no swapping of stereo channels.  Report a bug if otherwise :-) */
0553         outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
0554         chip->active |= DAC2;
0555         break;
0556     case SNDRV_PCM_TRIGGER_STOP:
0557     case SNDRV_PCM_TRIGGER_SUSPEND:
0558         outb(0, SLIO_REG(chip, AUDIO2MODE));
0559         snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
0560         chip->active &= ~DAC2;
0561         break;
0562     default:
0563         return -EINVAL;
0564     }
0565     return 0;
0566 }
0567 
0568 static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
0569                     int cmd)
0570 {
0571     struct es1938 *chip = snd_pcm_substream_chip(substream);
0572     int val;
0573     switch (cmd) {
0574     case SNDRV_PCM_TRIGGER_START:
0575     case SNDRV_PCM_TRIGGER_RESUME:
0576         val = 5;
0577         chip->active |= DAC1;
0578         break;
0579     case SNDRV_PCM_TRIGGER_STOP:
0580     case SNDRV_PCM_TRIGGER_SUSPEND:
0581         val = 0;
0582         chip->active &= ~DAC1;
0583         break;
0584     default:
0585         return -EINVAL;
0586     }
0587     snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
0588     return 0;
0589 }
0590 
0591 static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
0592                        int cmd)
0593 {
0594     switch (substream->number) {
0595     case 0:
0596         return snd_es1938_playback1_trigger(substream, cmd);
0597     case 1:
0598         return snd_es1938_playback2_trigger(substream, cmd);
0599     }
0600     snd_BUG();
0601     return -EINVAL;
0602 }
0603 
0604 /* --------------------------------------------------------------------
0605  * First channel for Extended Mode Audio 1 ADC Operation
0606  * --------------------------------------------------------------------*/
0607 static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
0608 {
0609     struct es1938 *chip = snd_pcm_substream_chip(substream);
0610     struct snd_pcm_runtime *runtime = substream->runtime;
0611     int u, is8, mono;
0612     unsigned int size = snd_pcm_lib_buffer_bytes(substream);
0613     unsigned int count = snd_pcm_lib_period_bytes(substream);
0614 
0615     chip->dma1_size = size;
0616     chip->dma1_start = runtime->dma_addr;
0617 
0618     mono = (runtime->channels > 1) ? 0 : 1;
0619     is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
0620     u = snd_pcm_format_unsigned(runtime->format);
0621 
0622     chip->dma1_shift = 2 - mono - is8;
0623 
0624     snd_es1938_reset_fifo(chip);
0625     
0626     /* program type */
0627     snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
0628 
0629     /* set clock and counters */
0630         snd_es1938_rate_set(chip, substream, ADC1);
0631 
0632     count = 0x10000 - count;
0633     snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
0634     snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
0635 
0636     /* initialize and configure ADC */
0637     snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
0638     snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 | 
0639                (u ? 0x00 : 0x20) | 
0640                (is8 ? 0x00 : 0x04) | 
0641                (mono ? 0x40 : 0x08));
0642 
0643     //  snd_es1938_reset_fifo(chip);    
0644 
0645     /* 11. configure system interrupt controller and DMA controller */
0646     snd_es1938_capture_setdma(chip);
0647 
0648     return 0;
0649 }
0650 
0651 
0652 /* ------------------------------------------------------------------------------
0653  * Second Audio channel DAC Operation
0654  * ------------------------------------------------------------------------------*/
0655 static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
0656 {
0657     struct es1938 *chip = snd_pcm_substream_chip(substream);
0658     struct snd_pcm_runtime *runtime = substream->runtime;
0659     int u, is8, mono;
0660     unsigned int size = snd_pcm_lib_buffer_bytes(substream);
0661     unsigned int count = snd_pcm_lib_period_bytes(substream);
0662 
0663     chip->dma2_size = size;
0664     chip->dma2_start = runtime->dma_addr;
0665 
0666     mono = (runtime->channels > 1) ? 0 : 1;
0667     is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
0668     u = snd_pcm_format_unsigned(runtime->format);
0669 
0670     chip->dma2_shift = 2 - mono - is8;
0671 
0672         snd_es1938_reset_fifo(chip);
0673 
0674     /* set clock and counters */
0675         snd_es1938_rate_set(chip, substream, DAC2);
0676 
0677     count >>= 1;
0678     count = 0x10000 - count;
0679     snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
0680     snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
0681 
0682     /* initialize and configure Audio 2 DAC */
0683     snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
0684                    (mono ? 0 : 2) | (is8 ? 0 : 1));
0685 
0686     /* program DMA */
0687     snd_es1938_playback1_setdma(chip);
0688     
0689     return 0;
0690 }
0691 
0692 static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
0693 {
0694     struct es1938 *chip = snd_pcm_substream_chip(substream);
0695     struct snd_pcm_runtime *runtime = substream->runtime;
0696     int u, is8, mono;
0697     unsigned int size = snd_pcm_lib_buffer_bytes(substream);
0698     unsigned int count = snd_pcm_lib_period_bytes(substream);
0699 
0700     chip->dma1_size = size;
0701     chip->dma1_start = runtime->dma_addr;
0702 
0703     mono = (runtime->channels > 1) ? 0 : 1;
0704     is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
0705     u = snd_pcm_format_unsigned(runtime->format);
0706 
0707     chip->dma1_shift = 2 - mono - is8;
0708 
0709     count = 0x10000 - count;
0710  
0711     /* reset */
0712     snd_es1938_reset_fifo(chip);
0713     
0714     snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
0715 
0716     /* set clock and counters */
0717         snd_es1938_rate_set(chip, substream, DAC1);
0718     snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
0719     snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
0720 
0721     /* initialized and configure DAC */
0722         snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
0723         snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
0724         snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 
0725              0x90 | (mono ? 0x40 : 0x08) |
0726              (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
0727 
0728     /* program DMA */
0729     snd_es1938_playback2_setdma(chip);
0730     
0731     return 0;
0732 }
0733 
0734 static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
0735 {
0736     switch (substream->number) {
0737     case 0:
0738         return snd_es1938_playback1_prepare(substream);
0739     case 1:
0740         return snd_es1938_playback2_prepare(substream);
0741     }
0742     snd_BUG();
0743     return -EINVAL;
0744 }
0745 
0746 /* during the incrementing of dma counters the DMA register reads sometimes
0747    returns garbage. To ensure a valid hw pointer, the following checks which
0748    should be very unlikely to fail are used:
0749    - is the current DMA address in the valid DMA range ?
0750    - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
0751    One can argue this could differ by one byte depending on which register is
0752    updated first, so the implementation below allows for that.
0753 */
0754 static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
0755 {
0756     struct es1938 *chip = snd_pcm_substream_chip(substream);
0757     size_t ptr;
0758 #if 0
0759     size_t old, new;
0760     /* This stuff is *needed*, don't ask why - AB */
0761     old = inw(SLDM_REG(chip, DMACOUNT));
0762     while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
0763         old = new;
0764     ptr = chip->dma1_size - 1 - new;
0765 #else
0766     size_t count;
0767     unsigned int diff;
0768 
0769     ptr = inl(SLDM_REG(chip, DMAADDR));
0770     count = inw(SLDM_REG(chip, DMACOUNT));
0771     diff = chip->dma1_start + chip->dma1_size - ptr - count;
0772 
0773     if (diff > 3 || ptr < chip->dma1_start
0774           || ptr >= chip->dma1_start+chip->dma1_size)
0775       ptr = chip->last_capture_dmaaddr;            /* bad, use last saved */
0776     else
0777       chip->last_capture_dmaaddr = ptr;            /* good, remember it */
0778 
0779     ptr -= chip->dma1_start;
0780 #endif
0781     return ptr >> chip->dma1_shift;
0782 }
0783 
0784 static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
0785 {
0786     struct es1938 *chip = snd_pcm_substream_chip(substream);
0787     size_t ptr;
0788 #if 1
0789     ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
0790 #else
0791     ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
0792 #endif
0793     return ptr >> chip->dma2_shift;
0794 }
0795 
0796 static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
0797 {
0798     struct es1938 *chip = snd_pcm_substream_chip(substream);
0799     size_t ptr;
0800     size_t old, new;
0801 #if 1
0802     /* This stuff is *needed*, don't ask why - AB */
0803     old = inw(SLDM_REG(chip, DMACOUNT));
0804     while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
0805         old = new;
0806     ptr = chip->dma1_size - 1 - new;
0807 #else
0808     ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
0809 #endif
0810     return ptr >> chip->dma1_shift;
0811 }
0812 
0813 static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
0814 {
0815     switch (substream->number) {
0816     case 0:
0817         return snd_es1938_playback1_pointer(substream);
0818     case 1:
0819         return snd_es1938_playback2_pointer(substream);
0820     }
0821     snd_BUG();
0822     return -EINVAL;
0823 }
0824 
0825 static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
0826                    int channel, unsigned long pos,
0827                    void __user *dst, unsigned long count)
0828 {
0829     struct snd_pcm_runtime *runtime = substream->runtime;
0830     struct es1938 *chip = snd_pcm_substream_chip(substream);
0831 
0832     if (snd_BUG_ON(pos + count > chip->dma1_size))
0833         return -EINVAL;
0834     if (pos + count < chip->dma1_size) {
0835         if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
0836             return -EFAULT;
0837     } else {
0838         if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
0839             return -EFAULT;
0840         if (put_user(runtime->dma_area[0],
0841                  ((unsigned char __user *)dst) + count - 1))
0842             return -EFAULT;
0843     }
0844     return 0;
0845 }
0846 
0847 static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
0848                       int channel, unsigned long pos,
0849                       void *dst, unsigned long count)
0850 {
0851     struct snd_pcm_runtime *runtime = substream->runtime;
0852     struct es1938 *chip = snd_pcm_substream_chip(substream);
0853 
0854     if (snd_BUG_ON(pos + count > chip->dma1_size))
0855         return -EINVAL;
0856     if (pos + count < chip->dma1_size) {
0857         memcpy(dst, runtime->dma_area + pos + 1, count);
0858     } else {
0859         memcpy(dst, runtime->dma_area + pos + 1, count - 1);
0860         runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
0861     }
0862     return 0;
0863 }
0864 
0865 /* ----------------------------------------------------------------------
0866  * Audio1 Capture (ADC)
0867  * ----------------------------------------------------------------------*/
0868 static const struct snd_pcm_hardware snd_es1938_capture =
0869 {
0870     .info =         (SNDRV_PCM_INFO_INTERLEAVED |
0871                 SNDRV_PCM_INFO_BLOCK_TRANSFER),
0872     .formats =      (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
0873                  SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
0874     .rates =        SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
0875     .rate_min =     6000,
0876     .rate_max =     48000,
0877     .channels_min =     1,
0878     .channels_max =     2,
0879         .buffer_bytes_max = 0x8000,       /* DMA controller screws on higher values */
0880     .period_bytes_min = 64,
0881     .period_bytes_max = 0x8000,
0882     .periods_min =      1,
0883     .periods_max =      1024,
0884     .fifo_size =        256,
0885 };
0886 
0887 /* -----------------------------------------------------------------------
0888  * Audio2 Playback (DAC)
0889  * -----------------------------------------------------------------------*/
0890 static const struct snd_pcm_hardware snd_es1938_playback =
0891 {
0892     .info =         (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
0893                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
0894                  SNDRV_PCM_INFO_MMAP_VALID),
0895     .formats =      (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
0896                  SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
0897     .rates =        SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
0898     .rate_min =     6000,
0899     .rate_max =     48000,
0900     .channels_min =     1,
0901     .channels_max =     2,
0902         .buffer_bytes_max = 0x8000,       /* DMA controller screws on higher values */
0903     .period_bytes_min = 64,
0904     .period_bytes_max = 0x8000,
0905     .periods_min =      1,
0906     .periods_max =      1024,
0907     .fifo_size =        256,
0908 };
0909 
0910 static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
0911 {
0912     struct es1938 *chip = snd_pcm_substream_chip(substream);
0913     struct snd_pcm_runtime *runtime = substream->runtime;
0914 
0915     if (chip->playback2_substream)
0916         return -EAGAIN;
0917     chip->capture_substream = substream;
0918     runtime->hw = snd_es1938_capture;
0919     snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
0920                       &hw_constraints_clocks);
0921     snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
0922     return 0;
0923 }
0924 
0925 static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
0926 {
0927     struct es1938 *chip = snd_pcm_substream_chip(substream);
0928     struct snd_pcm_runtime *runtime = substream->runtime;
0929 
0930     switch (substream->number) {
0931     case 0:
0932         chip->playback1_substream = substream;
0933         break;
0934     case 1:
0935         if (chip->capture_substream)
0936             return -EAGAIN;
0937         chip->playback2_substream = substream;
0938         break;
0939     default:
0940         snd_BUG();
0941         return -EINVAL;
0942     }
0943     runtime->hw = snd_es1938_playback;
0944     snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
0945                       &hw_constraints_clocks);
0946     snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
0947     return 0;
0948 }
0949 
0950 static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
0951 {
0952     struct es1938 *chip = snd_pcm_substream_chip(substream);
0953 
0954     chip->capture_substream = NULL;
0955     return 0;
0956 }
0957 
0958 static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
0959 {
0960     struct es1938 *chip = snd_pcm_substream_chip(substream);
0961 
0962     switch (substream->number) {
0963     case 0:
0964         chip->playback1_substream = NULL;
0965         break;
0966     case 1:
0967         chip->playback2_substream = NULL;
0968         break;
0969     default:
0970         snd_BUG();
0971         return -EINVAL;
0972     }
0973     return 0;
0974 }
0975 
0976 static const struct snd_pcm_ops snd_es1938_playback_ops = {
0977     .open =     snd_es1938_playback_open,
0978     .close =    snd_es1938_playback_close,
0979     .prepare =  snd_es1938_playback_prepare,
0980     .trigger =  snd_es1938_playback_trigger,
0981     .pointer =  snd_es1938_playback_pointer,
0982 };
0983 
0984 static const struct snd_pcm_ops snd_es1938_capture_ops = {
0985     .open =     snd_es1938_capture_open,
0986     .close =    snd_es1938_capture_close,
0987     .prepare =  snd_es1938_capture_prepare,
0988     .trigger =  snd_es1938_capture_trigger,
0989     .pointer =  snd_es1938_capture_pointer,
0990     .copy_user =    snd_es1938_capture_copy,
0991     .copy_kernel =  snd_es1938_capture_copy_kernel,
0992 };
0993 
0994 static int snd_es1938_new_pcm(struct es1938 *chip, int device)
0995 {
0996     struct snd_pcm *pcm;
0997     int err;
0998 
0999     err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm);
1000     if (err < 0)
1001         return err;
1002     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1003     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1004     
1005     pcm->private_data = chip;
1006     pcm->info_flags = 0;
1007     strcpy(pcm->name, "ESS Solo-1");
1008 
1009     snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1010                        &chip->pci->dev, 64*1024, 64*1024);
1011 
1012     chip->pcm = pcm;
1013     return 0;
1014 }
1015 
1016 /* -------------------------------------------------------------------
1017  * 
1018  *                       *** Mixer part ***
1019  */
1020 
1021 static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1022                    struct snd_ctl_elem_info *uinfo)
1023 {
1024     static const char * const texts[8] = {
1025         "Mic", "Mic Master", "CD", "AOUT",
1026         "Mic1", "Mix", "Line", "Master"
1027     };
1028 
1029     return snd_ctl_enum_info(uinfo, 1, 8, texts);
1030 }
1031 
1032 static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1033                   struct snd_ctl_elem_value *ucontrol)
1034 {
1035     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1036     ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1037     return 0;
1038 }
1039 
1040 static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1041                   struct snd_ctl_elem_value *ucontrol)
1042 {
1043     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1044     unsigned char val = ucontrol->value.enumerated.item[0];
1045     
1046     if (val > 7)
1047         return -EINVAL;
1048     return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1049 }
1050 
1051 #define snd_es1938_info_spatializer_enable  snd_ctl_boolean_mono_info
1052 
1053 static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1054                          struct snd_ctl_elem_value *ucontrol)
1055 {
1056     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1057     unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1058     ucontrol->value.integer.value[0] = !!(val & 8);
1059     return 0;
1060 }
1061 
1062 static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1063                          struct snd_ctl_elem_value *ucontrol)
1064 {
1065     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1066     unsigned char oval, nval;
1067     int change;
1068     nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1069     oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1070     change = nval != oval;
1071     if (change) {
1072         snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1073         snd_es1938_mixer_write(chip, 0x50, nval);
1074     }
1075     return change;
1076 }
1077 
1078 static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1079                      struct snd_ctl_elem_info *uinfo)
1080 {
1081     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1082     uinfo->count = 2;
1083     uinfo->value.integer.min = 0;
1084     uinfo->value.integer.max = 63;
1085     return 0;
1086 }
1087 
1088 static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1089                     struct snd_ctl_elem_value *ucontrol)
1090 {
1091     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1092     ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1093     ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1094     return 0;
1095 }
1096 
1097 #define snd_es1938_info_hw_switch       snd_ctl_boolean_stereo_info
1098 
1099 static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1100                     struct snd_ctl_elem_value *ucontrol)
1101 {
1102     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1103     ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1104     ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1105     return 0;
1106 }
1107 
1108 static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1109 {
1110     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1111     chip->master_volume = NULL;
1112     chip->master_switch = NULL;
1113     chip->hw_volume = NULL;
1114     chip->hw_switch = NULL;
1115 }
1116 
1117 static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1118                    unsigned char mask, unsigned char val)
1119 {
1120     if (reg < 0xa0)
1121         return snd_es1938_mixer_bits(chip, reg, mask, val);
1122     else
1123         return snd_es1938_bits(chip, reg, mask, val);
1124 }
1125 
1126 static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1127 {
1128     if (reg < 0xa0)
1129         return snd_es1938_mixer_read(chip, reg);
1130     else
1131         return snd_es1938_read(chip, reg);
1132 }
1133 
1134 #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv)    \
1135 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1136   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1137   .name = xname, .index = xindex, \
1138   .info = snd_es1938_info_single, \
1139   .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1140   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1141   .tlv = { .p = xtlv } }
1142 #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1143 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1144   .info = snd_es1938_info_single, \
1145   .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1146   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1147 
1148 static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1149                   struct snd_ctl_elem_info *uinfo)
1150 {
1151     int mask = (kcontrol->private_value >> 16) & 0xff;
1152 
1153     uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1154     uinfo->count = 1;
1155     uinfo->value.integer.min = 0;
1156     uinfo->value.integer.max = mask;
1157     return 0;
1158 }
1159 
1160 static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1161                  struct snd_ctl_elem_value *ucontrol)
1162 {
1163     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1164     int reg = kcontrol->private_value & 0xff;
1165     int shift = (kcontrol->private_value >> 8) & 0xff;
1166     int mask = (kcontrol->private_value >> 16) & 0xff;
1167     int invert = (kcontrol->private_value >> 24) & 0xff;
1168     int val;
1169     
1170     val = snd_es1938_reg_read(chip, reg);
1171     ucontrol->value.integer.value[0] = (val >> shift) & mask;
1172     if (invert)
1173         ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1174     return 0;
1175 }
1176 
1177 static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1178                  struct snd_ctl_elem_value *ucontrol)
1179 {
1180     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1181     int reg = kcontrol->private_value & 0xff;
1182     int shift = (kcontrol->private_value >> 8) & 0xff;
1183     int mask = (kcontrol->private_value >> 16) & 0xff;
1184     int invert = (kcontrol->private_value >> 24) & 0xff;
1185     unsigned char val;
1186     
1187     val = (ucontrol->value.integer.value[0] & mask);
1188     if (invert)
1189         val = mask - val;
1190     mask <<= shift;
1191     val <<= shift;
1192     return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1193 }
1194 
1195 #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1196 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1197   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1198   .name = xname, .index = xindex, \
1199   .info = snd_es1938_info_double, \
1200   .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1201   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1202   .tlv = { .p = xtlv } }
1203 #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1204 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1205   .info = snd_es1938_info_double, \
1206   .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1207   .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1208 
1209 static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1210                   struct snd_ctl_elem_info *uinfo)
1211 {
1212     int mask = (kcontrol->private_value >> 24) & 0xff;
1213 
1214     uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1215     uinfo->count = 2;
1216     uinfo->value.integer.min = 0;
1217     uinfo->value.integer.max = mask;
1218     return 0;
1219 }
1220 
1221 static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1222                  struct snd_ctl_elem_value *ucontrol)
1223 {
1224     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1225     int left_reg = kcontrol->private_value & 0xff;
1226     int right_reg = (kcontrol->private_value >> 8) & 0xff;
1227     int shift_left = (kcontrol->private_value >> 16) & 0x07;
1228     int shift_right = (kcontrol->private_value >> 19) & 0x07;
1229     int mask = (kcontrol->private_value >> 24) & 0xff;
1230     int invert = (kcontrol->private_value >> 22) & 1;
1231     unsigned char left, right;
1232     
1233     left = snd_es1938_reg_read(chip, left_reg);
1234     if (left_reg != right_reg)
1235         right = snd_es1938_reg_read(chip, right_reg);
1236     else
1237         right = left;
1238     ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1239     ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1240     if (invert) {
1241         ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1242         ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1243     }
1244     return 0;
1245 }
1246 
1247 static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1248                  struct snd_ctl_elem_value *ucontrol)
1249 {
1250     struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1251     int left_reg = kcontrol->private_value & 0xff;
1252     int right_reg = (kcontrol->private_value >> 8) & 0xff;
1253     int shift_left = (kcontrol->private_value >> 16) & 0x07;
1254     int shift_right = (kcontrol->private_value >> 19) & 0x07;
1255     int mask = (kcontrol->private_value >> 24) & 0xff;
1256     int invert = (kcontrol->private_value >> 22) & 1;
1257     int change;
1258     unsigned char val1, val2, mask1, mask2;
1259     
1260     val1 = ucontrol->value.integer.value[0] & mask;
1261     val2 = ucontrol->value.integer.value[1] & mask;
1262     if (invert) {
1263         val1 = mask - val1;
1264         val2 = mask - val2;
1265     }
1266     val1 <<= shift_left;
1267     val2 <<= shift_right;
1268     mask1 = mask << shift_left;
1269     mask2 = mask << shift_right;
1270     if (left_reg != right_reg) {
1271         change = 0;
1272         if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1273             change = 1;
1274         if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1275             change = 1;
1276     } else {
1277         change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2, 
1278                           val1 | val2) != (val1 | val2));
1279     }
1280     return change;
1281 }
1282 
1283 static const DECLARE_TLV_DB_RANGE(db_scale_master,
1284     0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1285     54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1286 );
1287 
1288 static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1289     0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1290     8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1291 );
1292 
1293 static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1294     0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1295     8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1296 );
1297 
1298 static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1299     0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1300     8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1301 );
1302 
1303 static const DECLARE_TLV_DB_RANGE(db_scale_line,
1304     0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1305     8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1306 );
1307 
1308 static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1309 
1310 static const struct snd_kcontrol_new snd_es1938_controls[] = {
1311 ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1312           db_scale_master),
1313 ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1314 {
1315     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1316     .name = "Hardware Master Playback Volume",
1317     .access = SNDRV_CTL_ELEM_ACCESS_READ,
1318     .info = snd_es1938_info_hw_volume,
1319     .get = snd_es1938_get_hw_volume,
1320 },
1321 {
1322     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1323     .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1324            SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1325     .name = "Hardware Master Playback Switch",
1326     .info = snd_es1938_info_hw_switch,
1327     .get = snd_es1938_get_hw_switch,
1328     .tlv = { .p = db_scale_master },
1329 },
1330 ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1331 ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1332           db_scale_line),
1333 ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1334 ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1335           db_scale_mic),
1336 ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1337           db_scale_line),
1338 ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1339           db_scale_mic),
1340 ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1341           db_scale_line),
1342 ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1343           db_scale_capture),
1344 ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1345 ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1346 ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1347 {
1348     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1349     .name = "Capture Source",
1350     .info = snd_es1938_info_mux,
1351     .get = snd_es1938_get_mux,
1352     .put = snd_es1938_put_mux,
1353 },
1354 ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1355           db_scale_line),
1356 ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1357           db_scale_audio2),
1358 ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1359           db_scale_mic),
1360 ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1361           db_scale_line),
1362 ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1363           db_scale_mic),
1364 ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1365           db_scale_line),
1366 ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1367           db_scale_line),
1368 ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1369           db_scale_line),
1370 ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1371           db_scale_audio2),
1372 ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1373           db_scale_audio1),
1374 ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1375 {
1376     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1377     .name = "3D Control - Switch",
1378     .info = snd_es1938_info_spatializer_enable,
1379     .get = snd_es1938_get_spatializer_enable,
1380     .put = snd_es1938_put_spatializer_enable,
1381 },
1382 ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1383 };
1384 
1385 
1386 /* ---------------------------------------------------------------------------- */
1387 /* ---------------------------------------------------------------------------- */
1388 
1389 /*
1390  * initialize the chip - used by resume callback, too
1391  */
1392 static void snd_es1938_chip_init(struct es1938 *chip)
1393 {
1394     /* reset chip */
1395     snd_es1938_reset(chip);
1396 
1397     /* configure native mode */
1398 
1399     /* enable bus master */
1400     pci_set_master(chip->pci);
1401 
1402     /* disable legacy audio */
1403     pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1404 
1405     /* set DDMA base */
1406     pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1407 
1408     /* set DMA/IRQ policy */
1409     pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1410 
1411     /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1412     outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1413 
1414     /* reset DMA */
1415     outb(0, SLDM_REG(chip, DMACLEAR));
1416 }
1417 
1418 #ifdef CONFIG_PM_SLEEP
1419 /*
1420  * PM support
1421  */
1422 
1423 static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1424     0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1425     0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1426     0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1427     0xa8, 0xb4,
1428 };
1429 
1430 
1431 static int es1938_suspend(struct device *dev)
1432 {
1433     struct snd_card *card = dev_get_drvdata(dev);
1434     struct es1938 *chip = card->private_data;
1435     const unsigned char *s;
1436     unsigned char *d;
1437 
1438     snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1439 
1440     /* save mixer-related registers */
1441     for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1442         *d = snd_es1938_reg_read(chip, *s);
1443 
1444     outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1445     if (chip->irq >= 0) {
1446         free_irq(chip->irq, chip);
1447         chip->irq = -1;
1448         card->sync_irq = -1;
1449     }
1450     return 0;
1451 }
1452 
1453 static int es1938_resume(struct device *dev)
1454 {
1455     struct pci_dev *pci = to_pci_dev(dev);
1456     struct snd_card *card = dev_get_drvdata(dev);
1457     struct es1938 *chip = card->private_data;
1458     const unsigned char *s;
1459     unsigned char *d;
1460 
1461     if (request_irq(pci->irq, snd_es1938_interrupt,
1462             IRQF_SHARED, KBUILD_MODNAME, chip)) {
1463         dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1464             pci->irq);
1465         snd_card_disconnect(card);
1466         return -EIO;
1467     }
1468     chip->irq = pci->irq;
1469     card->sync_irq = chip->irq;
1470     snd_es1938_chip_init(chip);
1471 
1472     /* restore mixer-related registers */
1473     for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1474         if (*s < 0xa0)
1475             snd_es1938_mixer_write(chip, *s, *d);
1476         else
1477             snd_es1938_write(chip, *s, *d);
1478     }
1479 
1480     snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1481     return 0;
1482 }
1483 
1484 static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1485 #define ES1938_PM_OPS   &es1938_pm
1486 #else
1487 #define ES1938_PM_OPS   NULL
1488 #endif /* CONFIG_PM_SLEEP */
1489 
1490 #ifdef SUPPORT_JOYSTICK
1491 static int snd_es1938_create_gameport(struct es1938 *chip)
1492 {
1493     struct gameport *gp;
1494 
1495     chip->gameport = gp = gameport_allocate_port();
1496     if (!gp) {
1497         dev_err(chip->card->dev,
1498             "cannot allocate memory for gameport\n");
1499         return -ENOMEM;
1500     }
1501 
1502     gameport_set_name(gp, "ES1938");
1503     gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1504     gameport_set_dev_parent(gp, &chip->pci->dev);
1505     gp->io = chip->game_port;
1506 
1507     gameport_register_port(gp);
1508 
1509     return 0;
1510 }
1511 
1512 static void snd_es1938_free_gameport(struct es1938 *chip)
1513 {
1514     if (chip->gameport) {
1515         gameport_unregister_port(chip->gameport);
1516         chip->gameport = NULL;
1517     }
1518 }
1519 #else
1520 static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1521 static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1522 #endif /* SUPPORT_JOYSTICK */
1523 
1524 static void snd_es1938_free(struct snd_card *card)
1525 {
1526     struct es1938 *chip = card->private_data;
1527 
1528     /* disable irqs */
1529     outb(0x00, SLIO_REG(chip, IRQCONTROL));
1530     if (chip->rmidi)
1531         snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1532 
1533     snd_es1938_free_gameport(chip);
1534 
1535     if (chip->irq >= 0)
1536         free_irq(chip->irq, chip);
1537 }
1538 
1539 static int snd_es1938_create(struct snd_card *card,
1540                  struct pci_dev *pci)
1541 {
1542     struct es1938 *chip = card->private_data;
1543     int err;
1544 
1545     /* enable PCI device */
1546     err = pcim_enable_device(pci);
1547     if (err < 0)
1548         return err;
1549         /* check, if we can restrict PCI DMA transfers to 24 bits */
1550     if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1551         dev_err(card->dev,
1552             "architecture does not support 24bit PCI busmaster DMA\n");
1553                 return -ENXIO;
1554         }
1555 
1556     spin_lock_init(&chip->reg_lock);
1557     spin_lock_init(&chip->mixer_lock);
1558     chip->card = card;
1559     chip->pci = pci;
1560     chip->irq = -1;
1561     err = pci_request_regions(pci, "ESS Solo-1");
1562     if (err < 0)
1563         return err;
1564     chip->io_port = pci_resource_start(pci, 0);
1565     chip->sb_port = pci_resource_start(pci, 1);
1566     chip->vc_port = pci_resource_start(pci, 2);
1567     chip->mpu_port = pci_resource_start(pci, 3);
1568     chip->game_port = pci_resource_start(pci, 4);
1569     /* still use non-managed irq handler as it's re-acquired at PM resume */
1570     if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1571             KBUILD_MODNAME, chip)) {
1572         dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1573         return -EBUSY;
1574     }
1575     chip->irq = pci->irq;
1576     card->sync_irq = chip->irq;
1577     card->private_free = snd_es1938_free;
1578     dev_dbg(card->dev,
1579         "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1580            chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1581 
1582     chip->ddma_port = chip->vc_port + 0x00;     /* fix from Thomas Sailer */
1583 
1584     snd_es1938_chip_init(chip);
1585     return 0;
1586 }
1587 
1588 /* --------------------------------------------------------------------
1589  * Interrupt handler
1590  * -------------------------------------------------------------------- */
1591 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1592 {
1593     struct es1938 *chip = dev_id;
1594     unsigned char status;
1595     __always_unused unsigned char audiostatus;
1596     int handled = 0;
1597 
1598     status = inb(SLIO_REG(chip, IRQCONTROL));
1599 #if 0
1600     dev_dbg(chip->card->dev,
1601         "Es1938debug - interrupt status: =0x%x\n", status);
1602 #endif
1603     
1604     /* AUDIO 1 */
1605     if (status & 0x10) {
1606 #if 0
1607         dev_dbg(chip->card->dev,
1608                "Es1938debug - AUDIO channel 1 interrupt\n");
1609         dev_dbg(chip->card->dev,
1610                "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1611                inw(SLDM_REG(chip, DMACOUNT)));
1612         dev_dbg(chip->card->dev,
1613                "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1614                inl(SLDM_REG(chip, DMAADDR)));
1615         dev_dbg(chip->card->dev,
1616                "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1617                inl(SLDM_REG(chip, DMASTATUS)));
1618 #endif
1619         /* clear irq */
1620         handled = 1;
1621         audiostatus = inb(SLSB_REG(chip, STATUS));
1622         if (chip->active & ADC1)
1623             snd_pcm_period_elapsed(chip->capture_substream);
1624         else if (chip->active & DAC1)
1625             snd_pcm_period_elapsed(chip->playback2_substream);
1626     }
1627     
1628     /* AUDIO 2 */
1629     if (status & 0x20) {
1630 #if 0
1631         dev_dbg(chip->card->dev,
1632                "Es1938debug - AUDIO channel 2 interrupt\n");
1633         dev_dbg(chip->card->dev,
1634                "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1635                inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1636         dev_dbg(chip->card->dev,
1637                "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1638                inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1639 
1640 #endif
1641         /* clear irq */
1642         handled = 1;
1643         snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1644         if (chip->active & DAC2)
1645             snd_pcm_period_elapsed(chip->playback1_substream);
1646     }
1647 
1648     /* Hardware volume */
1649     if (status & 0x40) {
1650         int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1651         handled = 1;
1652         snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1653         snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1654         if (!split) {
1655             snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1656                        &chip->master_switch->id);
1657             snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1658                        &chip->master_volume->id);
1659         }
1660         /* ack interrupt */
1661         snd_es1938_mixer_write(chip, 0x66, 0x00);
1662     }
1663 
1664     /* MPU401 */
1665     if (status & 0x80) {
1666         // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1667         // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1668         // andreas@flying-snail.de
1669         // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1670         if (chip->rmidi) {
1671             handled = 1;
1672             snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1673         }
1674     }
1675     return IRQ_RETVAL(handled);
1676 }
1677 
1678 #define ES1938_DMA_SIZE 64
1679 
1680 static int snd_es1938_mixer(struct es1938 *chip)
1681 {
1682     struct snd_card *card;
1683     unsigned int idx;
1684     int err;
1685 
1686     card = chip->card;
1687 
1688     strcpy(card->mixername, "ESS Solo-1");
1689 
1690     for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1691         struct snd_kcontrol *kctl;
1692         kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1693         switch (idx) {
1694             case 0:
1695                 chip->master_volume = kctl;
1696                 kctl->private_free = snd_es1938_hwv_free;
1697                 break;
1698             case 1:
1699                 chip->master_switch = kctl;
1700                 kctl->private_free = snd_es1938_hwv_free;
1701                 break;
1702             case 2:
1703                 chip->hw_volume = kctl;
1704                 kctl->private_free = snd_es1938_hwv_free;
1705                 break;
1706             case 3:
1707                 chip->hw_switch = kctl;
1708                 kctl->private_free = snd_es1938_hwv_free;
1709                 break;
1710             }
1711         err = snd_ctl_add(card, kctl);
1712         if (err < 0)
1713             return err;
1714     }
1715     return 0;
1716 }
1717        
1718 
1719 static int __snd_es1938_probe(struct pci_dev *pci,
1720                   const struct pci_device_id *pci_id)
1721 {
1722     static int dev;
1723     struct snd_card *card;
1724     struct es1938 *chip;
1725     struct snd_opl3 *opl3;
1726     int idx, err;
1727 
1728     if (dev >= SNDRV_CARDS)
1729         return -ENODEV;
1730     if (!enable[dev]) {
1731         dev++;
1732         return -ENOENT;
1733     }
1734 
1735     err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1736                 sizeof(*chip), &card);
1737     if (err < 0)
1738         return err;
1739     chip = card->private_data;
1740 
1741     for (idx = 0; idx < 5; idx++)
1742         if (pci_resource_start(pci, idx) == 0 ||
1743             !(pci_resource_flags(pci, idx) & IORESOURCE_IO))
1744             return -ENODEV;
1745 
1746     err = snd_es1938_create(card, pci);
1747     if (err < 0)
1748         return err;
1749 
1750     strcpy(card->driver, "ES1938");
1751     strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1752     sprintf(card->longname, "%s rev %i, irq %i",
1753         card->shortname,
1754         chip->revision,
1755         chip->irq);
1756 
1757     err = snd_es1938_new_pcm(chip, 0);
1758     if (err < 0)
1759         return err;
1760     err = snd_es1938_mixer(chip);
1761     if (err < 0)
1762         return err;
1763     if (snd_opl3_create(card,
1764                 SLSB_REG(chip, FMLOWADDR),
1765                 SLSB_REG(chip, FMHIGHADDR),
1766                 OPL3_HW_OPL3, 1, &opl3) < 0) {
1767         dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1768                SLSB_REG(chip, FMLOWADDR));
1769     } else {
1770         err = snd_opl3_timer_new(opl3, 0, 1);
1771         if (err < 0)
1772                     return err;
1773         err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1774         if (err < 0)
1775                     return err;
1776     }
1777     if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1778                 chip->mpu_port,
1779                 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1780                 -1, &chip->rmidi) < 0) {
1781         dev_err(card->dev, "unable to initialize MPU-401\n");
1782     } else {
1783         // this line is vital for MIDI interrupt handling on ess-solo1
1784         // andreas@flying-snail.de
1785         snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1786     }
1787 
1788     snd_es1938_create_gameport(chip);
1789 
1790     err = snd_card_register(card);
1791     if (err < 0)
1792         return err;
1793 
1794     pci_set_drvdata(pci, card);
1795     dev++;
1796     return 0;
1797 }
1798 
1799 static int snd_es1938_probe(struct pci_dev *pci,
1800                 const struct pci_device_id *pci_id)
1801 {
1802     return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id));
1803 }
1804 
1805 static struct pci_driver es1938_driver = {
1806     .name = KBUILD_MODNAME,
1807     .id_table = snd_es1938_ids,
1808     .probe = snd_es1938_probe,
1809     .driver = {
1810         .pm = ES1938_PM_OPS,
1811     },
1812 };
1813 
1814 module_pci_driver(es1938_driver);
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