pci/echoaudio/darla24_dsp.c

0001 /***************************************************************************
0002
0003    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
0004    All rights reserved
0005    www.echoaudio.com
0006
0007    This file is part of Echo Digital Audio's generic driver library.
0008
0009    Echo Digital Audio's generic driver library is free software;
0010    you can redistribute it and/or modify it under the terms of
0011    the GNU General Public License as published by the Free Software
0012    Foundation.
0013
0014    This program is distributed in the hope that it will be useful,
0015    but WITHOUT ANY WARRANTY; without even the implied warranty of
0016    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0017    GNU General Public License for more details.
0018
0019    You should have received a copy of the GNU General Public License
0020    along with this program; if not, write to the Free Software
0021    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
0022    MA  02111-1307, USA.
0023
0024    *************************************************************************
0025
0026  Translation from C++ and adaptation for use in ALSA-Driver
0027  were made by Giuliano Pochini <pochini@shiny.it>
0028
0029 ****************************************************************************/
0030
0031
0032 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
0033 {
0034     int err;
0035
0036     if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA24))
0037         return -ENODEV;
0038
0039     err = init_dsp_comm_page(chip);
0040     if (err) {
0041         dev_err(chip->card->dev,
0042             "init_hw: could not initialize DSP comm page\n");
0043         return err;
0044     }
0045
0046     chip->device_id = device_id;
0047     chip->subdevice_id = subdevice_id;
0048     chip->bad_board = true;
0049     chip->dsp_code_to_load = FW_DARLA24_DSP;
0050     /* Since this card has no ASIC, mark it as loaded so everything
0051        works OK */
0052     chip->asic_loaded = true;
0053     chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL |
0054         ECHO_CLOCK_BIT_ESYNC;
0055
0056     err = load_firmware(chip);
0057     if (err < 0)
0058         return err;
0059     chip->bad_board = false;
0060
0061     return err;
0062 }
0063
0064
0065
0066 static int set_mixer_defaults(struct echoaudio *chip)
0067 {
0068     return init_line_levels(chip);
0069 }
0070
0071
0072
0073 static u32 detect_input_clocks(const struct echoaudio *chip)
0074 {
0075     u32 clocks_from_dsp, clock_bits;
0076
0077     /* Map the DSP clock detect bits to the generic driver clock
0078        detect bits */
0079     clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);
0080
0081     clock_bits = ECHO_CLOCK_BIT_INTERNAL;
0082
0083     if (clocks_from_dsp & GLDM_CLOCK_DETECT_BIT_ESYNC)
0084         clock_bits |= ECHO_CLOCK_BIT_ESYNC;
0085
0086     return clock_bits;
0087 }
0088
0089
0090
0091 /* The Darla24 has no ASIC. Just do nothing */
0092 static int load_asic(struct echoaudio *chip)
0093 {
0094     return 0;
0095 }
0096
0097
0098
0099 static int set_sample_rate(struct echoaudio *chip, u32 rate)
0100 {
0101     u8 clock;
0102
0103     switch (rate) {
0104     case 96000:
0105         clock = GD24_96000;
0106         break;
0107     case 88200:
0108         clock = GD24_88200;
0109         break;
0110     case 48000:
0111         clock = GD24_48000;
0112         break;
0113     case 44100:
0114         clock = GD24_44100;
0115         break;
0116     case 32000:
0117         clock = GD24_32000;
0118         break;
0119     case 22050:
0120         clock = GD24_22050;
0121         break;
0122     case 16000:
0123         clock = GD24_16000;
0124         break;
0125     case 11025:
0126         clock = GD24_11025;
0127         break;
0128     case 8000:
0129         clock = GD24_8000;
0130         break;
0131     default:
0132         dev_err(chip->card->dev,
0133             "set_sample_rate: Error, invalid sample rate %d\n",
0134             rate);
0135         return -EINVAL;
0136     }
0137
0138     if (wait_handshake(chip))
0139         return -EIO;
0140
0141     dev_dbg(chip->card->dev,
0142         "set_sample_rate: %d clock %d\n", rate, clock);
0143     chip->sample_rate = rate;
0144
0145     /* Override the sample rate if this card is set to Echo sync. */
0146     if (chip->input_clock == ECHO_CLOCK_ESYNC)
0147         clock = GD24_EXT_SYNC;
0148
0149     chip->comm_page->sample_rate = cpu_to_le32(rate);   /* ignored by the DSP ? */
0150     chip->comm_page->gd_clock_state = clock;
0151     clear_handshake(chip);
0152     return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
0153 }
0154
0155
0156
0157 static int set_input_clock(struct echoaudio *chip, u16 clock)
0158 {
0159     if (snd_BUG_ON(clock != ECHO_CLOCK_INTERNAL &&
0160                clock != ECHO_CLOCK_ESYNC))
0161         return -EINVAL;
0162     chip->input_clock = clock;
0163     return set_sample_rate(chip, chip->sample_rate);
0164 }
0165