pci/echoaudio/darla20_dsp.c

0001 /***************************************************************************
0002
0003    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
0004    All rights reserved
0005    www.echoaudio.com
0006
0007    This file is part of Echo Digital Audio's generic driver library.
0008
0009    Echo Digital Audio's generic driver library is free software;
0010    you can redistribute it and/or modify it under the terms of
0011    the GNU General Public License as published by the Free Software
0012    Foundation.
0013
0014    This program is distributed in the hope that it will be useful,
0015    but WITHOUT ANY WARRANTY; without even the implied warranty of
0016    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
0017    GNU General Public License for more details.
0018
0019    You should have received a copy of the GNU General Public License
0020    along with this program; if not, write to the Free Software
0021    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
0022    MA  02111-1307, USA.
0023
0024    *************************************************************************
0025
0026  Translation from C++ and adaptation for use in ALSA-Driver
0027  were made by Giuliano Pochini <pochini@shiny.it>
0028
0029 ****************************************************************************/
0030
0031
0032 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
0033 {
0034     int err;
0035
0036     if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20))
0037         return -ENODEV;
0038
0039     err = init_dsp_comm_page(chip);
0040     if (err) {
0041         dev_err(chip->card->dev,
0042             "init_hw: could not initialize DSP comm page\n");
0043         return err;
0044     }
0045
0046     chip->device_id = device_id;
0047     chip->subdevice_id = subdevice_id;
0048     chip->bad_board = true;
0049     chip->dsp_code_to_load = FW_DARLA20_DSP;
0050     chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
0051     chip->clock_state = GD_CLOCK_UNDEF;
0052     /* Since this card has no ASIC, mark it as loaded so everything
0053        works OK */
0054     chip->asic_loaded = true;
0055     chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
0056
0057     err = load_firmware(chip);
0058     if (err < 0)
0059         return err;
0060     chip->bad_board = false;
0061
0062     return err;
0063 }
0064
0065
0066
0067 static int set_mixer_defaults(struct echoaudio *chip)
0068 {
0069     return init_line_levels(chip);
0070 }
0071
0072
0073
0074 /* The Darla20 has no external clock sources */
0075 static u32 detect_input_clocks(const struct echoaudio *chip)
0076 {
0077     return ECHO_CLOCK_BIT_INTERNAL;
0078 }
0079
0080
0081
0082 /* The Darla20 has no ASIC. Just do nothing */
0083 static int load_asic(struct echoaudio *chip)
0084 {
0085     return 0;
0086 }
0087
0088
0089
0090 static int set_sample_rate(struct echoaudio *chip, u32 rate)
0091 {
0092     u8 clock_state, spdif_status;
0093
0094     if (wait_handshake(chip))
0095         return -EIO;
0096
0097     switch (rate) {
0098     case 44100:
0099         clock_state = GD_CLOCK_44;
0100         spdif_status = GD_SPDIF_STATUS_44;
0101         break;
0102     case 48000:
0103         clock_state = GD_CLOCK_48;
0104         spdif_status = GD_SPDIF_STATUS_48;
0105         break;
0106     default:
0107         clock_state = GD_CLOCK_NOCHANGE;
0108         spdif_status = GD_SPDIF_STATUS_NOCHANGE;
0109         break;
0110     }
0111
0112     if (chip->clock_state == clock_state)
0113         clock_state = GD_CLOCK_NOCHANGE;
0114     if (spdif_status == chip->spdif_status)
0115         spdif_status = GD_SPDIF_STATUS_NOCHANGE;
0116
0117     chip->comm_page->sample_rate = cpu_to_le32(rate);
0118     chip->comm_page->gd_clock_state = clock_state;
0119     chip->comm_page->gd_spdif_status = spdif_status;
0120     chip->comm_page->gd_resampler_state = 3;    /* magic number - should always be 3 */
0121
0122     /* Save the new audio state if it changed */
0123     if (clock_state != GD_CLOCK_NOCHANGE)
0124         chip->clock_state = clock_state;
0125     if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
0126         chip->spdif_status = spdif_status;
0127     chip->sample_rate = rate;
0128
0129     clear_handshake(chip);
0130     return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
0131 }