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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
0004  *  Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
0005  *  Version: 0.0.25
0006  *
0007  *  FEATURES currently supported:
0008  *    Front, Rear and Center/LFE.
0009  *    Surround40 and Surround51.
0010  *    Capture from MIC an LINE IN input.
0011  *    SPDIF digital playback of PCM stereo and AC3/DTS works.
0012  *    (One can use a standard mono mini-jack to one RCA plugs cable.
0013  *     or one can use a standard stereo mini-jack to two RCA plugs cable.
0014  *     Plug one of the RCA plugs into the Coax input of the external decoder/receiver.)
0015  *    ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. )
0016  *    Notes on how to capture sound:
0017  *      The AC97 is used in the PLAYBACK direction.
0018  *      The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC.
0019  *      So, to record from the MIC, set the MIC Playback volume to max,
0020  *      unmute the MIC and turn up the MASTER Playback volume.
0021  *      So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume.
0022  *   
0023  *    The only playback controls that currently do anything are: -
0024  *    Analog Front
0025  *    Analog Rear
0026  *    Analog Center/LFE
0027  *    SPDIF Front
0028  *    SPDIF Rear
0029  *    SPDIF Center/LFE
0030  *   
0031  *    For capture from Mic in or Line in.
0032  *    Digital/Analog ( switch must be in Analog mode for CAPTURE. )
0033  * 
0034  *    CAPTURE feedback into PLAYBACK
0035  * 
0036  *  Changelog:
0037  *    Support interrupts per period.
0038  *    Removed noise from Center/LFE channel when in Analog mode.
0039  *    Rename and remove mixer controls.
0040  *  0.0.6
0041  *    Use separate card based DMA buffer for periods table list.
0042  *  0.0.7
0043  *    Change remove and rename ctrls into lists.
0044  *  0.0.8
0045  *    Try to fix capture sources.
0046  *  0.0.9
0047  *    Fix AC3 output.
0048  *    Enable S32_LE format support.
0049  *  0.0.10
0050  *    Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".)
0051  *  0.0.11
0052  *    Add Model name recognition.
0053  *  0.0.12
0054  *    Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period.
0055  *    Remove redundent "voice" handling.
0056  *  0.0.13
0057  *    Single trigger call for multi channels.
0058  *  0.0.14
0059  *    Set limits based on what the sound card hardware can do.
0060  *    playback periods_min=2, periods_max=8
0061  *    capture hw constraints require period_size = n * 64 bytes.
0062  *    playback hw constraints require period_size = n * 64 bytes.
0063  *  0.0.15
0064  *    Minor updates.
0065  *  0.0.16
0066  *    Implement 192000 sample rate.
0067  *  0.0.17
0068  *    Add support for SB0410 and SB0413.
0069  *  0.0.18
0070  *    Modified Copyright message.
0071  *  0.0.19
0072  *    Finally fix support for SB Live 24 bit. SB0410 and SB0413.
0073  *    The output codec needs resetting, otherwise all output is muted.
0074  *  0.0.20
0075  *    Merge "pci_disable_device(pci);" fixes.
0076  *  0.0.21
0077  *    Add 4 capture channels. (SPDIF only comes in on channel 0. )
0078  *    Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.)
0079  *  0.0.22
0080  *    Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901
0081  *  0.0.23
0082  *    Implement support for Line-in capture on SB Live 24bit.
0083  *  0.0.24
0084  *    Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
0085  *  0.0.25
0086  *    Powerdown SPI DAC channels when not in use
0087  *
0088  *  BUGS:
0089  *    Some stability problems when unloading the snd-ca0106 kernel module.
0090  *    --
0091  *
0092  *  TODO:
0093  *    4 Capture channels, only one implemented so far.
0094  *    Other capture rates apart from 48khz not implemented.
0095  *    MIDI
0096  *    --
0097  *  GENERAL INFO:
0098  *    Model: SB0310
0099  *    P17 Chip: CA0106-DAT
0100  *    AC97 Codec: STAC 9721
0101  *    ADC: Philips 1361T (Stereo 24bit)
0102  *    DAC: WM8746EDS (6-channel, 24bit, 192Khz)
0103  *
0104  *  GENERAL INFO:
0105  *    Model: SB0410
0106  *    P17 Chip: CA0106-DAT
0107  *    AC97 Codec: None
0108  *    ADC: WM8775EDS (4 Channel)
0109  *    DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support)
0110  *    SPDIF Out control switches between Mic in and SPDIF out.
0111  *    No sound out or mic input working yet.
0112  * 
0113  *  GENERAL INFO:
0114  *    Model: SB0413
0115  *    P17 Chip: CA0106-DAT
0116  *    AC97 Codec: None.
0117  *    ADC: Unknown
0118  *    DAC: Unknown
0119  *    Trying to handle it like the SB0410.
0120  *
0121  *  This code was initially based on code from ALSA's emu10k1x.c which is:
0122  *  Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
0123  */
0124 #include <linux/delay.h>
0125 #include <linux/init.h>
0126 #include <linux/interrupt.h>
0127 #include <linux/pci.h>
0128 #include <linux/slab.h>
0129 #include <linux/module.h>
0130 #include <linux/dma-mapping.h>
0131 #include <sound/core.h>
0132 #include <sound/initval.h>
0133 #include <sound/pcm.h>
0134 #include <sound/ac97_codec.h>
0135 #include <sound/info.h>
0136 
0137 MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>");
0138 MODULE_DESCRIPTION("CA0106");
0139 MODULE_LICENSE("GPL");
0140 
0141 // module parameters (see "Module Parameters")
0142 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
0143 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
0144 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
0145 static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
0146 
0147 module_param_array(index, int, NULL, 0444);
0148 MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
0149 module_param_array(id, charp, NULL, 0444);
0150 MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
0151 module_param_array(enable, bool, NULL, 0444);
0152 MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
0153 module_param_array(subsystem, uint, NULL, 0444);
0154 MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
0155 
0156 #include "ca0106.h"
0157 
0158 static const struct snd_ca0106_details ca0106_chip_details[] = {
0159      /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
0160      /* It is really just a normal SB Live 24bit. */
0161      /* Tested:
0162       * See ALSA bug#3251
0163       */
0164      { .serial = 0x10131102,
0165        .name   = "X-Fi Extreme Audio [SBxxxx]",
0166        .gpio_type = 1,
0167        .i2c_adc = 1 } ,
0168      /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
0169      /* It is really just a normal SB Live 24bit. */
0170      /*
0171       * CTRL:CA0111-WTLF
0172       * ADC: WM8775SEDS
0173       * DAC: CS4382-KQZ
0174       */
0175      /* Tested:
0176       * Playback on front, rear, center/lfe speakers
0177       * Capture from Mic in.
0178       * Not-Tested:
0179       * Capture from Line in.
0180       * Playback to digital out.
0181       */
0182      { .serial = 0x10121102,
0183        .name   = "X-Fi Extreme Audio [SB0790]",
0184        .gpio_type = 1,
0185        .i2c_adc = 1 } ,
0186      /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97.  */
0187      /* AudigyLS[SB0310] */
0188      { .serial = 0x10021102,
0189        .name   = "AudigyLS [SB0310]",
0190        .ac97   = 1 } , 
0191      /* Unknown AudigyLS that also says SB0310 on it */
0192      { .serial = 0x10051102,
0193        .name   = "AudigyLS [SB0310b]",
0194        .ac97   = 1 } ,
0195      /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */
0196      { .serial = 0x10061102,
0197        .name   = "Live! 7.1 24bit [SB0410]",
0198        .gpio_type = 1,
0199        .i2c_adc = 1 } ,
0200      /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97.  */
0201      { .serial = 0x10071102,
0202        .name   = "Live! 7.1 24bit [SB0413]",
0203        .gpio_type = 1,
0204        .i2c_adc = 1 } ,
0205      /* New Audigy SE. Has a different DAC. */
0206      /* SB0570:
0207       * CTRL:CA0106-DAT
0208       * ADC: WM8775EDS
0209       * DAC: WM8768GEDS
0210       */
0211      { .serial = 0x100a1102,
0212        .name   = "Audigy SE [SB0570]",
0213        .gpio_type = 1,
0214        .i2c_adc = 1,
0215        .spi_dac = 0x4021 } ,
0216      /* New Audigy LS. Has a different DAC. */
0217      /* SB0570:
0218       * CTRL:CA0106-DAT
0219       * ADC: WM8775EDS
0220       * DAC: WM8768GEDS
0221       */
0222      { .serial = 0x10111102,
0223        .name   = "Audigy SE OEM [SB0570a]",
0224        .gpio_type = 1,
0225        .i2c_adc = 1,
0226        .spi_dac = 0x4021 } ,
0227     /* Sound Blaster 5.1vx
0228      * Tested: Playback on front, rear, center/lfe speakers
0229      * Not-Tested: Capture
0230      */
0231     { .serial = 0x10041102,
0232       .name   = "Sound Blaster 5.1vx [SB1070]",
0233       .gpio_type = 1,
0234       .i2c_adc = 0,
0235       .spi_dac = 0x0124
0236      } ,
0237      /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */
0238      /* SB0438
0239       * CTRL:CA0106-DAT
0240       * ADC: WM8775SEDS
0241       * DAC: CS4382-KQZ
0242       */
0243      { .serial = 0x10091462,
0244        .name   = "MSI K8N Diamond MB [SB0438]",
0245        .gpio_type = 2,
0246        .i2c_adc = 1 } ,
0247      /* MSI K8N Diamond PLUS MB */
0248      { .serial = 0x10091102,
0249        .name   = "MSI K8N Diamond MB",
0250        .gpio_type = 2,
0251        .i2c_adc = 1,
0252        .spi_dac = 0x4021 } ,
0253     /* Giga-byte GA-G1975X mobo
0254      * Novell bnc#395807
0255      */
0256     /* FIXME: the GPIO and I2C setting aren't tested well */
0257     { .serial = 0x1458a006,
0258       .name = "Giga-byte GA-G1975X",
0259       .gpio_type = 1,
0260       .i2c_adc = 1 },
0261      /* Shuttle XPC SD31P which has an onboard Creative Labs
0262       * Sound Blaster Live! 24-bit EAX
0263       * high-definition 7.1 audio processor".
0264       * Added using info from andrewvegan in alsa bug #1298
0265       */
0266      { .serial = 0x30381297,
0267        .name   = "Shuttle XPC SD31P [SD31P]",
0268        .gpio_type = 1,
0269        .i2c_adc = 1 } ,
0270     /* Shuttle XPC SD11G5 which has an onboard Creative Labs
0271      * Sound Blaster Live! 24-bit EAX
0272      * high-definition 7.1 audio processor".
0273      * Fixes ALSA bug#1600
0274          */
0275     { .serial = 0x30411297,
0276       .name = "Shuttle XPC SD11G5 [SD11G5]",
0277       .gpio_type = 1,
0278       .i2c_adc = 1 } ,
0279      { .serial = 0,
0280        .name   = "AudigyLS [Unknown]" }
0281 };
0282 
0283 /* hardware definition */
0284 static const struct snd_pcm_hardware snd_ca0106_playback_hw = {
0285     .info =         SNDRV_PCM_INFO_MMAP | 
0286                 SNDRV_PCM_INFO_INTERLEAVED |
0287                 SNDRV_PCM_INFO_BLOCK_TRANSFER |
0288                 SNDRV_PCM_INFO_MMAP_VALID |
0289                 SNDRV_PCM_INFO_SYNC_START,
0290     .formats =      SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
0291     .rates =        (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
0292                  SNDRV_PCM_RATE_192000),
0293     .rate_min =     48000,
0294     .rate_max =     192000,
0295     .channels_min =     2,  //1,
0296     .channels_max =     2,  //6,
0297     .buffer_bytes_max = ((65536 - 64) * 8),
0298     .period_bytes_min = 64,
0299     .period_bytes_max = (65536 - 64),
0300     .periods_min =      2,
0301     .periods_max =      8,
0302     .fifo_size =        0,
0303 };
0304 
0305 static const struct snd_pcm_hardware snd_ca0106_capture_hw = {
0306     .info =         (SNDRV_PCM_INFO_MMAP | 
0307                  SNDRV_PCM_INFO_INTERLEAVED |
0308                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
0309                  SNDRV_PCM_INFO_MMAP_VALID),
0310     .formats =      SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
0311 #if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */
0312     .rates =        (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
0313                  SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
0314     .rate_min =     44100,
0315 #else
0316     .rates =        (SNDRV_PCM_RATE_48000 |
0317                  SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
0318     .rate_min =     48000,
0319 #endif /* FIXME */
0320     .rate_max =     192000,
0321     .channels_min =     2,
0322     .channels_max =     2,
0323     .buffer_bytes_max = 65536 - 128,
0324     .period_bytes_min = 64,
0325     .period_bytes_max = 32768 - 64,
0326     .periods_min =      2,
0327     .periods_max =      2,
0328     .fifo_size =        0,
0329 };
0330 
0331 unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu, 
0332                       unsigned int reg, 
0333                       unsigned int chn)
0334 {
0335     unsigned long flags;
0336     unsigned int regptr, val;
0337   
0338     regptr = (reg << 16) | chn;
0339 
0340     spin_lock_irqsave(&emu->emu_lock, flags);
0341     outl(regptr, emu->port + CA0106_PTR);
0342     val = inl(emu->port + CA0106_DATA);
0343     spin_unlock_irqrestore(&emu->emu_lock, flags);
0344     return val;
0345 }
0346 
0347 void snd_ca0106_ptr_write(struct snd_ca0106 *emu, 
0348                    unsigned int reg, 
0349                    unsigned int chn, 
0350                    unsigned int data)
0351 {
0352     unsigned int regptr;
0353     unsigned long flags;
0354 
0355     regptr = (reg << 16) | chn;
0356 
0357     spin_lock_irqsave(&emu->emu_lock, flags);
0358     outl(regptr, emu->port + CA0106_PTR);
0359     outl(data, emu->port + CA0106_DATA);
0360     spin_unlock_irqrestore(&emu->emu_lock, flags);
0361 }
0362 
0363 int snd_ca0106_spi_write(struct snd_ca0106 * emu,
0364                    unsigned int data)
0365 {
0366     unsigned int reset, set;
0367     unsigned int reg, tmp;
0368     int n, result;
0369     reg = SPI;
0370     if (data > 0xffff) /* Only 16bit values allowed */
0371         return 1;
0372     tmp = snd_ca0106_ptr_read(emu, reg, 0);
0373     reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
0374     set = reset | 0x10000; /* Set xxx1xxxx */
0375     snd_ca0106_ptr_write(emu, reg, 0, reset | data);
0376     tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */
0377     snd_ca0106_ptr_write(emu, reg, 0, set | data);
0378     result = 1;
0379     /* Wait for status bit to return to 0 */
0380     for (n = 0; n < 100; n++) {
0381         udelay(10);
0382         tmp = snd_ca0106_ptr_read(emu, reg, 0);
0383         if (!(tmp & 0x10000)) {
0384             result = 0;
0385             break;
0386         }
0387     }
0388     if (result) /* Timed out */
0389         return 1;
0390     snd_ca0106_ptr_write(emu, reg, 0, reset | data);
0391     tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */
0392     return 0;
0393 }
0394 
0395 /* The ADC does not support i2c read, so only write is implemented */
0396 int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
0397                 u32 reg,
0398                 u32 value)
0399 {
0400     u32 tmp;
0401     int timeout = 0;
0402     int status;
0403     int retry;
0404     if ((reg > 0x7f) || (value > 0x1ff)) {
0405         dev_err(emu->card->dev, "i2c_write: invalid values.\n");
0406         return -EINVAL;
0407     }
0408 
0409     tmp = reg << 25 | value << 16;
0410     /*
0411     dev_dbg(emu->card->dev, "I2C-write:reg=0x%x, value=0x%x\n", reg, value);
0412     */
0413     /* Not sure what this I2C channel controls. */
0414     /* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
0415 
0416     /* This controls the I2C connected to the WM8775 ADC Codec */
0417     snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
0418 
0419     for (retry = 0; retry < 10; retry++) {
0420         /* Send the data to i2c */
0421         //tmp = snd_ca0106_ptr_read(emu, I2C_A, 0);
0422         //tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
0423         tmp = 0;
0424         tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
0425         snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
0426 
0427         /* Wait till the transaction ends */
0428         while (1) {
0429             status = snd_ca0106_ptr_read(emu, I2C_A, 0);
0430             /*dev_dbg(emu->card->dev, "I2C:status=0x%x\n", status);*/
0431             timeout++;
0432             if ((status & I2C_A_ADC_START) == 0)
0433                 break;
0434 
0435             if (timeout > 1000)
0436                 break;
0437         }
0438         //Read back and see if the transaction is successful
0439         if ((status & I2C_A_ADC_ABORT) == 0)
0440             break;
0441     }
0442 
0443     if (retry == 10) {
0444         dev_err(emu->card->dev, "Writing to ADC failed!\n");
0445         return -EINVAL;
0446     }
0447     
0448         return 0;
0449 }
0450 
0451 
0452 static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
0453 {
0454     unsigned long flags;
0455     unsigned int intr_enable;
0456 
0457     spin_lock_irqsave(&emu->emu_lock, flags);
0458     intr_enable = inl(emu->port + CA0106_INTE) | intrenb;
0459     outl(intr_enable, emu->port + CA0106_INTE);
0460     spin_unlock_irqrestore(&emu->emu_lock, flags);
0461 }
0462 
0463 static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
0464 {
0465     unsigned long flags;
0466     unsigned int intr_enable;
0467 
0468     spin_lock_irqsave(&emu->emu_lock, flags);
0469     intr_enable = inl(emu->port + CA0106_INTE) & ~intrenb;
0470     outl(intr_enable, emu->port + CA0106_INTE);
0471     spin_unlock_irqrestore(&emu->emu_lock, flags);
0472 }
0473 
0474 
0475 static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
0476 {
0477     kfree(runtime->private_data);
0478 }
0479 
0480 static const int spi_dacd_reg[] = {
0481     SPI_DACD0_REG,
0482     SPI_DACD1_REG,
0483     SPI_DACD2_REG,
0484     0,
0485     SPI_DACD4_REG,
0486 };
0487 static const int spi_dacd_bit[] = {
0488     SPI_DACD0_BIT,
0489     SPI_DACD1_BIT,
0490     SPI_DACD2_BIT,
0491     0,
0492     SPI_DACD4_BIT,
0493 };
0494 
0495 static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
0496 {
0497     if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
0498         chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
0499         snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
0500                      chip->spdif_str_bits[idx]);
0501     }
0502 }
0503 
0504 static int snd_ca0106_channel_dac(struct snd_ca0106 *chip,
0505                   const struct snd_ca0106_details *details,
0506                   int channel_id)
0507 {
0508     switch (channel_id) {
0509     case PCM_FRONT_CHANNEL:
0510         return (details->spi_dac & 0xf000) >> (4 * 3);
0511     case PCM_REAR_CHANNEL:
0512         return (details->spi_dac & 0x0f00) >> (4 * 2);
0513     case PCM_CENTER_LFE_CHANNEL:
0514         return (details->spi_dac & 0x00f0) >> (4 * 1);
0515     case PCM_UNKNOWN_CHANNEL:
0516         return (details->spi_dac & 0x000f) >> (4 * 0);
0517     default:
0518         dev_dbg(chip->card->dev, "ca0106: unknown channel_id %d\n",
0519                channel_id);
0520     }
0521     return 0;
0522 }
0523 
0524 static int snd_ca0106_pcm_power_dac(struct snd_ca0106 *chip, int channel_id,
0525                     int power)
0526 {
0527     if (chip->details->spi_dac) {
0528         const int dac = snd_ca0106_channel_dac(chip, chip->details,
0529                                channel_id);
0530         const int reg = spi_dacd_reg[dac];
0531         const int bit = spi_dacd_bit[dac];
0532 
0533         if (power)
0534             /* Power up */
0535             chip->spi_dac_reg[reg] &= ~bit;
0536         else
0537             /* Power down */
0538             chip->spi_dac_reg[reg] |= bit;
0539         if (snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]) != 0)
0540             return -ENXIO;
0541     }
0542     return 0;
0543 }
0544 
0545 /* open_playback callback */
0546 static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
0547                         int channel_id)
0548 {
0549     struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
0550         struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
0551     struct snd_ca0106_pcm *epcm;
0552     struct snd_pcm_runtime *runtime = substream->runtime;
0553     int err;
0554 
0555     epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
0556 
0557     if (epcm == NULL)
0558         return -ENOMEM;
0559     epcm->emu = chip;
0560     epcm->substream = substream;
0561         epcm->channel_id=channel_id;
0562   
0563     runtime->private_data = epcm;
0564     runtime->private_free = snd_ca0106_pcm_free_substream;
0565   
0566     runtime->hw = snd_ca0106_playback_hw;
0567 
0568         channel->emu = chip;
0569         channel->number = channel_id;
0570 
0571     channel->use = 1;
0572     /*
0573     dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
0574            channel_id, chip, channel);
0575     */
0576         //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
0577     channel->epcm = epcm;
0578     err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
0579     if (err < 0)
0580                 return err;
0581     err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
0582     if (err < 0)
0583                 return err;
0584     snd_pcm_set_sync(substream);
0585 
0586     /* Front channel dac should already be on */
0587     if (channel_id != PCM_FRONT_CHANNEL) {
0588         err = snd_ca0106_pcm_power_dac(chip, channel_id, 1);
0589         if (err < 0)
0590             return err;
0591     }
0592 
0593     restore_spdif_bits(chip, channel_id);
0594 
0595     return 0;
0596 }
0597 
0598 /* close callback */
0599 static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
0600 {
0601     struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
0602     struct snd_pcm_runtime *runtime = substream->runtime;
0603         struct snd_ca0106_pcm *epcm = runtime->private_data;
0604     chip->playback_channels[epcm->channel_id].use = 0;
0605 
0606     restore_spdif_bits(chip, epcm->channel_id);
0607 
0608     /* Front channel dac should stay on */
0609     if (epcm->channel_id != PCM_FRONT_CHANNEL) {
0610         int err;
0611         err = snd_ca0106_pcm_power_dac(chip, epcm->channel_id, 0);
0612         if (err < 0)
0613             return err;
0614     }
0615 
0616     /* FIXME: maybe zero others */
0617     return 0;
0618 }
0619 
0620 static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
0621 {
0622     return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
0623 }
0624 
0625 static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
0626 {
0627     return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
0628 }
0629 
0630 static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
0631 {
0632     return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
0633 }
0634 
0635 static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
0636 {
0637     return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
0638 }
0639 
0640 /* open_capture callback */
0641 static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
0642                            int channel_id)
0643 {
0644     struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
0645         struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
0646     struct snd_ca0106_pcm *epcm;
0647     struct snd_pcm_runtime *runtime = substream->runtime;
0648     int err;
0649 
0650     epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
0651     if (!epcm)
0652         return -ENOMEM;
0653 
0654     epcm->emu = chip;
0655     epcm->substream = substream;
0656         epcm->channel_id=channel_id;
0657   
0658     runtime->private_data = epcm;
0659     runtime->private_free = snd_ca0106_pcm_free_substream;
0660   
0661     runtime->hw = snd_ca0106_capture_hw;
0662 
0663         channel->emu = chip;
0664         channel->number = channel_id;
0665 
0666     channel->use = 1;
0667     /*
0668     dev_dbg(chip->card->dev, "open:channel_id=%d, chip=%p, channel=%p\n",
0669            channel_id, chip, channel);
0670     */
0671         //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
0672         channel->epcm = epcm;
0673     err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
0674     if (err < 0)
0675                 return err;
0676     //snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes);
0677     err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64);
0678     if (err < 0)
0679                 return err;
0680     return 0;
0681 }
0682 
0683 /* close callback */
0684 static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
0685 {
0686     struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
0687     struct snd_pcm_runtime *runtime = substream->runtime;
0688         struct snd_ca0106_pcm *epcm = runtime->private_data;
0689     chip->capture_channels[epcm->channel_id].use = 0;
0690     /* FIXME: maybe zero others */
0691     return 0;
0692 }
0693 
0694 static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
0695 {
0696     return snd_ca0106_pcm_open_capture_channel(substream, 0);
0697 }
0698 
0699 static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
0700 {
0701     return snd_ca0106_pcm_open_capture_channel(substream, 1);
0702 }
0703 
0704 static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
0705 {
0706     return snd_ca0106_pcm_open_capture_channel(substream, 2);
0707 }
0708 
0709 static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
0710 {
0711     return snd_ca0106_pcm_open_capture_channel(substream, 3);
0712 }
0713 
0714 /* prepare playback callback */
0715 static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
0716 {
0717     struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
0718     struct snd_pcm_runtime *runtime = substream->runtime;
0719     struct snd_ca0106_pcm *epcm = runtime->private_data;
0720     int channel = epcm->channel_id;
0721     u32 *table_base = (u32 *)(emu->buffer->area+(8*16*channel));
0722     u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
0723     u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
0724     u32 hcfg_set = 0x00000000;
0725     u32 hcfg;
0726     u32 reg40_mask = 0x30000 << (channel<<1);
0727     u32 reg40_set = 0;
0728     u32 reg40;
0729     /* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */
0730     u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */
0731     u32 reg71_set = 0;
0732     u32 reg71;
0733     int i;
0734     
0735 #if 0 /* debug */
0736     dev_dbg(emu->card->dev,
0737            "prepare:channel_number=%d, rate=%d, format=0x%x, "
0738            "channels=%d, buffer_size=%ld, period_size=%ld, "
0739            "periods=%u, frames_to_bytes=%d\n",
0740            channel, runtime->rate, runtime->format,
0741            runtime->channels, runtime->buffer_size,
0742            runtime->period_size, runtime->periods,
0743            frames_to_bytes(runtime, 1));
0744     dev_dbg(emu->card->dev,
0745         "dma_addr=%x, dma_area=%p, table_base=%p\n",
0746            runtime->dma_addr, runtime->dma_area, table_base);
0747     dev_dbg(emu->card->dev,
0748         "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
0749            emu->buffer->addr, emu->buffer->area, emu->buffer->bytes);
0750 #endif /* debug */
0751     /* Rate can be set per channel. */
0752     /* reg40 control host to fifo */
0753     /* reg71 controls DAC rate. */
0754     switch (runtime->rate) {
0755     case 44100:
0756         reg40_set = 0x10000 << (channel<<1);
0757         reg71_set = 0x01010000; 
0758         break;
0759         case 48000:
0760         reg40_set = 0;
0761         reg71_set = 0; 
0762         break;
0763     case 96000:
0764         reg40_set = 0x20000 << (channel<<1);
0765         reg71_set = 0x02020000; 
0766         break;
0767     case 192000:
0768         reg40_set = 0x30000 << (channel<<1);
0769         reg71_set = 0x03030000; 
0770         break;
0771     default:
0772         reg40_set = 0;
0773         reg71_set = 0; 
0774         break;
0775     }
0776     /* Format is a global setting */
0777     /* FIXME: Only let the first channel accessed set this. */
0778     switch (runtime->format) {
0779     case SNDRV_PCM_FORMAT_S16_LE:
0780         hcfg_set = 0;
0781         break;
0782     case SNDRV_PCM_FORMAT_S32_LE:
0783         hcfg_set = HCFG_PLAYBACK_S32_LE;
0784         break;
0785     default:
0786         hcfg_set = 0;
0787         break;
0788     }
0789     hcfg = inl(emu->port + CA0106_HCFG) ;
0790     hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
0791     outl(hcfg, emu->port + CA0106_HCFG);
0792     reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
0793     reg40 = (reg40 & ~reg40_mask) | reg40_set;
0794     snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
0795     reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
0796     reg71 = (reg71 & ~reg71_mask) | reg71_set;
0797     snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
0798 
0799     /* FIXME: Check emu->buffer->size before actually writing to it. */
0800         for(i=0; i < runtime->periods; i++) {
0801         table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
0802         table_base[i*2+1] = period_size_bytes << 16;
0803     }
0804  
0805     snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer->addr+(8*16*channel));
0806     snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
0807     snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
0808     snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
0809     snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
0810     /* FIXME  test what 0 bytes does. */
0811     snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
0812     snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
0813     snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
0814     snd_ca0106_ptr_write(emu, 0x08, channel, 0);
0815         snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */
0816 #if 0
0817     snd_ca0106_ptr_write(emu, SPCS0, 0,
0818                    SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
0819                    SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
0820                    SPCS_GENERATIONSTATUS | 0x00001200 |
0821                    0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
0822 #endif
0823 
0824     return 0;
0825 }
0826 
0827 /* prepare capture callback */
0828 static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
0829 {
0830     struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
0831     struct snd_pcm_runtime *runtime = substream->runtime;
0832     struct snd_ca0106_pcm *epcm = runtime->private_data;
0833     int channel = epcm->channel_id;
0834     u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
0835     u32 hcfg_set = 0x00000000;
0836     u32 hcfg;
0837     u32 over_sampling=0x2;
0838     u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */
0839     u32 reg71_set = 0;
0840     u32 reg71;
0841     
0842 #if 0 /* debug */
0843     dev_dbg(emu->card->dev,
0844            "prepare:channel_number=%d, rate=%d, format=0x%x, "
0845            "channels=%d, buffer_size=%ld, period_size=%ld, "
0846            "periods=%u, frames_to_bytes=%d\n",
0847            channel, runtime->rate, runtime->format,
0848            runtime->channels, runtime->buffer_size,
0849            runtime->period_size, runtime->periods,
0850            frames_to_bytes(runtime, 1));
0851     dev_dbg(emu->card->dev,
0852         "dma_addr=%x, dma_area=%p, table_base=%p\n",
0853            runtime->dma_addr, runtime->dma_area, table_base);
0854     dev_dbg(emu->card->dev,
0855         "dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",
0856            emu->buffer->addr, emu->buffer->area, emu->buffer->bytes);
0857 #endif /* debug */
0858     /* reg71 controls ADC rate. */
0859     switch (runtime->rate) {
0860     case 44100:
0861         reg71_set = 0x00004000;
0862         break;
0863         case 48000:
0864         reg71_set = 0; 
0865         break;
0866     case 96000:
0867         reg71_set = 0x00008000;
0868         over_sampling=0xa;
0869         break;
0870     case 192000:
0871         reg71_set = 0x0000c000; 
0872         over_sampling=0xa;
0873         break;
0874     default:
0875         reg71_set = 0; 
0876         break;
0877     }
0878     /* Format is a global setting */
0879     /* FIXME: Only let the first channel accessed set this. */
0880     switch (runtime->format) {
0881     case SNDRV_PCM_FORMAT_S16_LE:
0882         hcfg_set = 0;
0883         break;
0884     case SNDRV_PCM_FORMAT_S32_LE:
0885         hcfg_set = HCFG_CAPTURE_S32_LE;
0886         break;
0887     default:
0888         hcfg_set = 0;
0889         break;
0890     }
0891     hcfg = inl(emu->port + CA0106_HCFG) ;
0892     hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
0893     outl(hcfg, emu->port + CA0106_HCFG);
0894     reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
0895     reg71 = (reg71 & ~reg71_mask) | reg71_set;
0896     snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
0897         if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */
0898             snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */
0899     }
0900 
0901 
0902     /*
0903     dev_dbg(emu->card->dev,
0904            "prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, "
0905            "buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",
0906            channel, runtime->rate, runtime->format, runtime->channels,
0907            runtime->buffer_size, runtime->period_size,
0908            frames_to_bytes(runtime, 1));
0909     */
0910     snd_ca0106_ptr_write(emu, 0x13, channel, 0);
0911     snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
0912     snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
0913     snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
0914 
0915     return 0;
0916 }
0917 
0918 /* trigger_playback callback */
0919 static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
0920                     int cmd)
0921 {
0922     struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
0923     struct snd_pcm_runtime *runtime;
0924     struct snd_ca0106_pcm *epcm;
0925     int channel;
0926     int result = 0;
0927         struct snd_pcm_substream *s;
0928     u32 basic = 0;
0929     u32 extended = 0;
0930     u32 bits;
0931     int running = 0;
0932 
0933     switch (cmd) {
0934     case SNDRV_PCM_TRIGGER_START:
0935     case SNDRV_PCM_TRIGGER_RESUME:
0936         running = 1;
0937         break;
0938     case SNDRV_PCM_TRIGGER_STOP:
0939     case SNDRV_PCM_TRIGGER_SUSPEND:
0940     default:
0941         running = 0;
0942         break;
0943     }
0944         snd_pcm_group_for_each_entry(s, substream) {
0945         if (snd_pcm_substream_chip(s) != emu ||
0946             s->stream != SNDRV_PCM_STREAM_PLAYBACK)
0947             continue;
0948         runtime = s->runtime;
0949         epcm = runtime->private_data;
0950         channel = epcm->channel_id;
0951         /* dev_dbg(emu->card->dev, "channel=%d\n", channel); */
0952         epcm->running = running;
0953         basic |= (0x1 << channel);
0954         extended |= (0x10 << channel);
0955                 snd_pcm_trigger_done(s, substream);
0956         }
0957     /* dev_dbg(emu->card->dev, "basic=0x%x, extended=0x%x\n",basic, extended); */
0958 
0959     switch (cmd) {
0960     case SNDRV_PCM_TRIGGER_START:
0961     case SNDRV_PCM_TRIGGER_RESUME:
0962         bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
0963         bits |= extended;
0964         snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
0965         bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
0966         bits |= basic;
0967         snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
0968         break;
0969     case SNDRV_PCM_TRIGGER_STOP:
0970     case SNDRV_PCM_TRIGGER_SUSPEND:
0971         bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
0972         bits &= ~basic;
0973         snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
0974         bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
0975         bits &= ~extended;
0976         snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
0977         break;
0978     default:
0979         result = -EINVAL;
0980         break;
0981     }
0982     return result;
0983 }
0984 
0985 /* trigger_capture callback */
0986 static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
0987                     int cmd)
0988 {
0989     struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
0990     struct snd_pcm_runtime *runtime = substream->runtime;
0991     struct snd_ca0106_pcm *epcm = runtime->private_data;
0992     int channel = epcm->channel_id;
0993     int result = 0;
0994 
0995     switch (cmd) {
0996     case SNDRV_PCM_TRIGGER_START:
0997         snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
0998         snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
0999         epcm->running = 1;
1000         break;
1001     case SNDRV_PCM_TRIGGER_STOP:
1002         snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
1003         snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
1004         epcm->running = 0;
1005         break;
1006     default:
1007         result = -EINVAL;
1008         break;
1009     }
1010     return result;
1011 }
1012 
1013 /* pointer_playback callback */
1014 static snd_pcm_uframes_t
1015 snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
1016 {
1017     struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1018     struct snd_pcm_runtime *runtime = substream->runtime;
1019     struct snd_ca0106_pcm *epcm = runtime->private_data;
1020     unsigned int ptr, prev_ptr;
1021     int channel = epcm->channel_id;
1022     int timeout = 10;
1023 
1024     if (!epcm->running)
1025         return 0;
1026 
1027     prev_ptr = -1;
1028     do {
1029         ptr = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
1030         ptr = (ptr >> 3) * runtime->period_size;
1031         ptr += bytes_to_frames(runtime,
1032             snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel));
1033         if (ptr >= runtime->buffer_size)
1034             ptr -= runtime->buffer_size;
1035         if (prev_ptr == ptr)
1036             return ptr;
1037         prev_ptr = ptr;
1038     } while (--timeout);
1039     dev_warn(emu->card->dev, "ca0106: unstable DMA pointer!\n");
1040     return 0;
1041 }
1042 
1043 /* pointer_capture callback */
1044 static snd_pcm_uframes_t
1045 snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
1046 {
1047     struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
1048     struct snd_pcm_runtime *runtime = substream->runtime;
1049     struct snd_ca0106_pcm *epcm = runtime->private_data;
1050     snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
1051     int channel = epcm->channel_id;
1052 
1053     if (!epcm->running)
1054         return 0;
1055 
1056     ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
1057     ptr2 = bytes_to_frames(runtime, ptr1);
1058     ptr=ptr2;
1059         if (ptr >= runtime->buffer_size)
1060         ptr -= runtime->buffer_size;
1061     /*
1062     dev_dbg(emu->card->dev, "ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, "
1063            "buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n",
1064            ptr1, ptr2, ptr, (int)runtime->buffer_size,
1065            (int)runtime->period_size, (int)runtime->frame_bits,
1066            (int)runtime->rate);
1067     */
1068     return ptr;
1069 }
1070 
1071 /* operators */
1072 static const struct snd_pcm_ops snd_ca0106_playback_front_ops = {
1073     .open =        snd_ca0106_pcm_open_playback_front,
1074     .close =       snd_ca0106_pcm_close_playback,
1075     .prepare =     snd_ca0106_pcm_prepare_playback,
1076     .trigger =     snd_ca0106_pcm_trigger_playback,
1077     .pointer =     snd_ca0106_pcm_pointer_playback,
1078 };
1079 
1080 static const struct snd_pcm_ops snd_ca0106_capture_0_ops = {
1081     .open =        snd_ca0106_pcm_open_0_capture,
1082     .close =       snd_ca0106_pcm_close_capture,
1083     .prepare =     snd_ca0106_pcm_prepare_capture,
1084     .trigger =     snd_ca0106_pcm_trigger_capture,
1085     .pointer =     snd_ca0106_pcm_pointer_capture,
1086 };
1087 
1088 static const struct snd_pcm_ops snd_ca0106_capture_1_ops = {
1089     .open =        snd_ca0106_pcm_open_1_capture,
1090     .close =       snd_ca0106_pcm_close_capture,
1091     .prepare =     snd_ca0106_pcm_prepare_capture,
1092     .trigger =     snd_ca0106_pcm_trigger_capture,
1093     .pointer =     snd_ca0106_pcm_pointer_capture,
1094 };
1095 
1096 static const struct snd_pcm_ops snd_ca0106_capture_2_ops = {
1097     .open =        snd_ca0106_pcm_open_2_capture,
1098     .close =       snd_ca0106_pcm_close_capture,
1099     .prepare =     snd_ca0106_pcm_prepare_capture,
1100     .trigger =     snd_ca0106_pcm_trigger_capture,
1101     .pointer =     snd_ca0106_pcm_pointer_capture,
1102 };
1103 
1104 static const struct snd_pcm_ops snd_ca0106_capture_3_ops = {
1105     .open =        snd_ca0106_pcm_open_3_capture,
1106     .close =       snd_ca0106_pcm_close_capture,
1107     .prepare =     snd_ca0106_pcm_prepare_capture,
1108     .trigger =     snd_ca0106_pcm_trigger_capture,
1109     .pointer =     snd_ca0106_pcm_pointer_capture,
1110 };
1111 
1112 static const struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
1113         .open =         snd_ca0106_pcm_open_playback_center_lfe,
1114         .close =        snd_ca0106_pcm_close_playback,
1115         .prepare =      snd_ca0106_pcm_prepare_playback,     
1116         .trigger =      snd_ca0106_pcm_trigger_playback,  
1117         .pointer =      snd_ca0106_pcm_pointer_playback, 
1118 };
1119 
1120 static const struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
1121         .open =         snd_ca0106_pcm_open_playback_unknown,
1122         .close =        snd_ca0106_pcm_close_playback,
1123         .prepare =      snd_ca0106_pcm_prepare_playback,     
1124         .trigger =      snd_ca0106_pcm_trigger_playback,  
1125         .pointer =      snd_ca0106_pcm_pointer_playback, 
1126 };
1127 
1128 static const struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
1129         .open =         snd_ca0106_pcm_open_playback_rear,
1130         .close =        snd_ca0106_pcm_close_playback,
1131         .prepare =      snd_ca0106_pcm_prepare_playback,     
1132         .trigger =      snd_ca0106_pcm_trigger_playback,  
1133         .pointer =      snd_ca0106_pcm_pointer_playback, 
1134 };
1135 
1136 
1137 static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
1138                          unsigned short reg)
1139 {
1140     struct snd_ca0106 *emu = ac97->private_data;
1141     unsigned long flags;
1142     unsigned short val;
1143 
1144     spin_lock_irqsave(&emu->emu_lock, flags);
1145     outb(reg, emu->port + CA0106_AC97ADDRESS);
1146     val = inw(emu->port + CA0106_AC97DATA);
1147     spin_unlock_irqrestore(&emu->emu_lock, flags);
1148     return val;
1149 }
1150 
1151 static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
1152                     unsigned short reg, unsigned short val)
1153 {
1154     struct snd_ca0106 *emu = ac97->private_data;
1155     unsigned long flags;
1156   
1157     spin_lock_irqsave(&emu->emu_lock, flags);
1158     outb(reg, emu->port + CA0106_AC97ADDRESS);
1159     outw(val, emu->port + CA0106_AC97DATA);
1160     spin_unlock_irqrestore(&emu->emu_lock, flags);
1161 }
1162 
1163 static int snd_ca0106_ac97(struct snd_ca0106 *chip)
1164 {
1165     struct snd_ac97_bus *pbus;
1166     struct snd_ac97_template ac97;
1167     int err;
1168     static const struct snd_ac97_bus_ops ops = {
1169         .write = snd_ca0106_ac97_write,
1170         .read = snd_ca0106_ac97_read,
1171     };
1172   
1173     err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus);
1174     if (err < 0)
1175         return err;
1176     pbus->no_vra = 1; /* we don't need VRA */
1177 
1178     memset(&ac97, 0, sizeof(ac97));
1179     ac97.private_data = chip;
1180     ac97.scaps = AC97_SCAP_NO_SPDIF;
1181     return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1182 }
1183 
1184 static void ca0106_stop_chip(struct snd_ca0106 *chip);
1185 
1186 static void snd_ca0106_free(struct snd_card *card)
1187 {
1188     struct snd_ca0106 *chip = card->private_data;
1189 
1190     ca0106_stop_chip(chip);
1191 }
1192 
1193 static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
1194 {
1195     unsigned int status;
1196 
1197     struct snd_ca0106 *chip = dev_id;
1198     int i;
1199     int mask;
1200         unsigned int stat76;
1201     struct snd_ca0106_channel *pchannel;
1202 
1203     status = inl(chip->port + CA0106_IPR);
1204     if (! status)
1205         return IRQ_NONE;
1206 
1207         stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
1208     /*
1209     dev_dbg(emu->card->dev, "interrupt status = 0x%08x, stat76=0x%08x\n",
1210            status, stat76);
1211     dev_dbg(emu->card->dev, "ptr=0x%08x\n",
1212            snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
1213     */
1214         mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
1215     for(i = 0; i < 4; i++) {
1216         pchannel = &(chip->playback_channels[i]);
1217         if (stat76 & mask) {
1218 /* FIXME: Select the correct substream for period elapsed */
1219             if(pchannel->use) {
1220                 snd_pcm_period_elapsed(pchannel->epcm->substream);
1221                 /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
1222                         }
1223         }
1224         /*
1225         dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
1226         dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1227         */
1228         mask <<= 1;
1229     }
1230         mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */
1231     for(i = 0; i < 4; i++) {
1232         pchannel = &(chip->capture_channels[i]);
1233         if (stat76 & mask) {
1234 /* FIXME: Select the correct substream for period elapsed */
1235             if(pchannel->use) {
1236                 snd_pcm_period_elapsed(pchannel->epcm->substream);
1237                 /* dev_dbg(emu->card->dev, "interrupt [%d] used\n", i); */
1238                         }
1239         }
1240         /*
1241         dev_dbg(emu->card->dev, "channel=%p\n", pchannel);
1242         dev_dbg(emu->card->dev, "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
1243         */
1244         mask <<= 1;
1245     }
1246 
1247         snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
1248 
1249     if (chip->midi.dev_id &&
1250         (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
1251         if (chip->midi.interrupt)
1252             chip->midi.interrupt(&chip->midi, status);
1253         else
1254             chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
1255     }
1256 
1257     // acknowledge the interrupt if necessary
1258     outl(status, chip->port + CA0106_IPR);
1259 
1260     return IRQ_HANDLED;
1261 }
1262 
1263 static const struct snd_pcm_chmap_elem surround_map[] = {
1264     { .channels = 2,
1265       .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
1266     { }
1267 };
1268 
1269 static const struct snd_pcm_chmap_elem clfe_map[] = {
1270     { .channels = 2,
1271       .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
1272     { }
1273 };
1274 
1275 static const struct snd_pcm_chmap_elem side_map[] = {
1276     { .channels = 2,
1277       .map = { SNDRV_CHMAP_SL, SNDRV_CHMAP_SR } },
1278     { }
1279 };
1280 
1281 static int snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
1282 {
1283     struct snd_pcm *pcm;
1284     struct snd_pcm_substream *substream;
1285     const struct snd_pcm_chmap_elem *map = NULL;
1286     int err;
1287   
1288     err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
1289     if (err < 0)
1290         return err;
1291   
1292     pcm->private_data = emu;
1293 
1294     switch (device) {
1295     case 0:
1296       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
1297       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
1298       map = snd_pcm_std_chmaps;
1299           break;
1300     case 1:
1301       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
1302       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
1303       map = surround_map;
1304           break;
1305     case 2:
1306       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
1307       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
1308       map = clfe_map;
1309           break;
1310     case 3:
1311       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
1312       snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
1313       map = side_map;
1314           break;
1315         }
1316 
1317     pcm->info_flags = 0;
1318     strcpy(pcm->name, "CA0106");
1319 
1320     for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; 
1321         substream; 
1322         substream = substream->next) {
1323         snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
1324                        &emu->pci->dev,
1325                        64*1024, 64*1024);
1326     }
1327 
1328     for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream; 
1329           substream; 
1330           substream = substream->next) {
1331         snd_pcm_set_managed_buffer(substream, SNDRV_DMA_TYPE_DEV,
1332                        &emu->pci->dev,
1333                        64*1024, 64*1024);
1334     }
1335   
1336     err = snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
1337                      1 << 2, NULL);
1338     if (err < 0)
1339         return err;
1340 
1341     emu->pcm[device] = pcm;
1342   
1343     return 0;
1344 }
1345 
1346 #define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
1347 static const unsigned int spi_dac_init[] = {
1348     SPI_REG(SPI_LDA1_REG,   SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
1349     SPI_REG(SPI_RDA1_REG,   SPI_DA_BIT_0dB),
1350     SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
1351     SPI_REG(SPI_FMT_REG,    SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
1352     SPI_REG(SPI_LDA2_REG,   SPI_DA_BIT_0dB),
1353     SPI_REG(SPI_RDA2_REG,   SPI_DA_BIT_0dB),
1354     SPI_REG(SPI_LDA3_REG,   SPI_DA_BIT_0dB),
1355     SPI_REG(SPI_RDA3_REG,   SPI_DA_BIT_0dB),
1356     SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
1357     SPI_REG(9,      0x00),
1358     SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
1359     SPI_REG(12,     0x00),
1360     SPI_REG(SPI_LDA4_REG,   SPI_DA_BIT_0dB),
1361     SPI_REG(SPI_RDA4_REG,   SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
1362     SPI_REG(SPI_DACD4_REG,  SPI_DACD4_BIT),
1363 };
1364 
1365 static const unsigned int i2c_adc_init[][2] = {
1366     { 0x17, 0x00 }, /* Reset */
1367     { 0x07, 0x00 }, /* Timeout */
1368     { 0x0b, 0x22 },  /* Interface control */
1369     { 0x0c, 0x22 },  /* Master mode control */
1370     { 0x0d, 0x08 },  /* Powerdown control */
1371     { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
1372     { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
1373     { 0x10, 0x7b },  /* ALC Control 1 */
1374     { 0x11, 0x00 },  /* ALC Control 2 */
1375     { 0x12, 0x32 },  /* ALC Control 3 */
1376     { 0x13, 0x00 },  /* Noise gate control */
1377     { 0x14, 0xa6 },  /* Limiter control */
1378     { 0x15, ADC_MUX_LINEIN },  /* ADC Mixer control */
1379 };
1380 
1381 static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
1382 {
1383     int ch;
1384     unsigned int def_bits;
1385 
1386     outl(0, chip->port + CA0106_INTE);
1387 
1388     /*
1389      *  Init to 0x02109204 :
1390      *  Clock accuracy    = 0     (1000ppm)
1391      *  Sample Rate       = 2     (48kHz)
1392      *  Audio Channel     = 1     (Left of 2)
1393      *  Source Number     = 0     (Unspecified)
1394      *  Generation Status = 1     (Original for Cat Code 12)
1395      *  Cat Code          = 12    (Digital Signal Mixer)
1396      *  Mode              = 0     (Mode 0)
1397      *  Emphasis          = 0     (None)
1398      *  CP                = 1     (Copyright unasserted)
1399      *  AN                = 0     (Audio data)
1400      *  P                 = 0     (Consumer)
1401      */
1402     def_bits =
1403         SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1404         SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1405         SPCS_GENERATIONSTATUS | 0x00001200 |
1406         0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1407     if (!resume) {
1408         chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
1409         chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
1410         chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
1411         chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
1412     }
1413     /* Only SPCS1 has been tested */
1414     snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
1415     snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
1416     snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
1417     snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
1418 
1419         snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
1420         snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
1421 
1422         /* Write 0x8000 to AC97_REC_GAIN to mute it. */
1423         outb(AC97_REC_GAIN, chip->port + CA0106_AC97ADDRESS);
1424         outw(0x8000, chip->port + CA0106_AC97DATA);
1425 #if 0 /* FIXME: what are these? */
1426     snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
1427     snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
1428     snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
1429     snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
1430 #endif
1431 
1432     /* OSS drivers set this. */
1433     /* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */
1434 
1435     /* Analog or Digital output */
1436     snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
1437     /* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers.
1438      * Use 0x000f0000 for surround71
1439      */
1440     snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
1441 
1442     chip->spdif_enable = 0; /* Set digital SPDIF output off */
1443     /*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */
1444     /*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */
1445 
1446     /* goes to 0x40c80000 when doing SPDIF IN/OUT */
1447     snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
1448     /* (Mute) CAPTURE feedback into PLAYBACK volume.
1449      * Only lower 16 bits matter.
1450      */
1451     snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
1452     /* SPDIF IN Volume */
1453     snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
1454     /* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */
1455     snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
1456 
1457     snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
1458     snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
1459     snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
1460     snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
1461 
1462     for (ch = 0; ch < 4; ch++) {
1463         /* Only high 16 bits matter */
1464         snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
1465         snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
1466 #if 0 /* Mute */
1467         snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
1468         snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
1469         snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
1470         snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
1471 #endif
1472     }
1473     if (chip->details->i2c_adc == 1) {
1474             /* Select MIC, Line in, TAD in, AUX in */
1475             snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1476         /* Default to CAPTURE_SOURCE to i2s in */
1477         if (!resume)
1478             chip->capture_source = 3;
1479     } else if (chip->details->ac97 == 1) {
1480             /* Default to AC97 in */
1481             snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
1482         /* Default to CAPTURE_SOURCE to AC97 in */
1483         if (!resume)
1484             chip->capture_source = 4;
1485     } else {
1486             /* Select MIC, Line in, TAD in, AUX in */
1487             snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
1488         /* Default to Set CAPTURE_SOURCE to i2s in */
1489         if (!resume)
1490             chip->capture_source = 3;
1491     }
1492 
1493     if (chip->details->gpio_type == 2) {
1494         /* The SB0438 use GPIO differently. */
1495         /* FIXME: Still need to find out what the other GPIO bits do.
1496          * E.g. For digital spdif out.
1497          */
1498         outl(0x0, chip->port + CA0106_GPIO);
1499         /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
1500         outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
1501     } else if (chip->details->gpio_type == 1) {
1502         /* The SB0410 and SB0413 use GPIO differently. */
1503         /* FIXME: Still need to find out what the other GPIO bits do.
1504          * E.g. For digital spdif out.
1505          */
1506         outl(0x0, chip->port + CA0106_GPIO);
1507         /* outl(0x00f0e000, chip->port + CA0106_GPIO); */ /* Analog */
1508         outl(0x005f5301, chip->port + CA0106_GPIO); /* Analog */
1509     } else {
1510         outl(0x0, chip->port + CA0106_GPIO);
1511         outl(0x005f03a3, chip->port + CA0106_GPIO); /* Analog */
1512         /* outl(0x005f02a2, chip->port + CA0106_GPIO); */ /* SPDIF */
1513     }
1514     snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */
1515 
1516     /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
1517     /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
1518     /* outl(0x00001409, chip->port + CA0106_HCFG); */
1519     /* outl(0x00000009, chip->port + CA0106_HCFG); */
1520     /* AC97 2.0, Enable outputs. */
1521     outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port + CA0106_HCFG);
1522 
1523     if (chip->details->i2c_adc == 1) {
1524         /* The SB0410 and SB0413 use I2C to control ADC. */
1525         int size, n;
1526 
1527         size = ARRAY_SIZE(i2c_adc_init);
1528         /* dev_dbg(emu->card->dev, "I2C:array size=0x%x\n", size); */
1529         for (n = 0; n < size; n++)
1530             snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
1531                          i2c_adc_init[n][1]);
1532         for (n = 0; n < 4; n++) {
1533             chip->i2c_capture_volume[n][0] = 0xcf;
1534             chip->i2c_capture_volume[n][1] = 0xcf;
1535         }
1536         chip->i2c_capture_source = 2; /* Line in */
1537         /* Enable Line-in capture. MIC in currently untested. */
1538         /* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */
1539     }
1540 
1541     if (chip->details->spi_dac) {
1542         /* The SB0570 use SPI to control DAC. */
1543         int size, n;
1544 
1545         size = ARRAY_SIZE(spi_dac_init);
1546         for (n = 0; n < size; n++) {
1547             int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
1548 
1549             snd_ca0106_spi_write(chip, spi_dac_init[n]);
1550             if (reg < ARRAY_SIZE(chip->spi_dac_reg))
1551                 chip->spi_dac_reg[reg] = spi_dac_init[n];
1552         }
1553 
1554         /* Enable front dac only */
1555         snd_ca0106_pcm_power_dac(chip, PCM_FRONT_CHANNEL, 1);
1556     }
1557 }
1558 
1559 static void ca0106_stop_chip(struct snd_ca0106 *chip)
1560 {
1561     /* disable interrupts */
1562     snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
1563     outl(0, chip->port + CA0106_INTE);
1564     snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
1565     udelay(1000);
1566     /* disable audio */
1567     /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
1568     outl(0, chip->port + CA0106_HCFG);
1569     /* FIXME: We need to stop and DMA transfers here.
1570      *        But as I am not sure how yet, we cannot from the dma pages.
1571      * So we can fix: snd-malloc: Memory leak?  pages not freed = 8
1572      */
1573 }
1574 
1575 static int snd_ca0106_create(int dev, struct snd_card *card,
1576                  struct pci_dev *pci)
1577 {
1578     struct snd_ca0106 *chip = card->private_data;
1579     const struct snd_ca0106_details *c;
1580     int err;
1581 
1582     err = pcim_enable_device(pci);
1583     if (err < 0)
1584         return err;
1585     if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32))) {
1586         dev_err(card->dev, "error to set 32bit mask DMA\n");
1587         return -ENXIO;
1588     }
1589 
1590     chip->card = card;
1591     chip->pci = pci;
1592     chip->irq = -1;
1593 
1594     spin_lock_init(&chip->emu_lock);
1595 
1596     err = pci_request_regions(pci, "snd_ca0106");
1597     if (err < 0)
1598         return err;
1599     chip->port = pci_resource_start(pci, 0);
1600 
1601     if (devm_request_irq(&pci->dev, pci->irq, snd_ca0106_interrupt,
1602                  IRQF_SHARED, KBUILD_MODNAME, chip)) {
1603         dev_err(card->dev, "cannot grab irq\n");
1604         return -EBUSY;
1605     }
1606     chip->irq = pci->irq;
1607     card->sync_irq = chip->irq;
1608 
1609     /* This stores the periods table. */
1610     chip->buffer = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 1024);
1611     if (!chip->buffer)
1612         return -ENOMEM;
1613 
1614     pci_set_master(pci);
1615     /* read serial */
1616     pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
1617     pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
1618     dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n",
1619            chip->model, pci->revision, chip->serial);
1620     strcpy(card->driver, "CA0106");
1621     strcpy(card->shortname, "CA0106");
1622 
1623     for (c = ca0106_chip_details; c->serial; c++) {
1624         if (subsystem[dev]) {
1625             if (c->serial == subsystem[dev])
1626                 break;
1627         } else if (c->serial == chip->serial)
1628             break;
1629     }
1630     chip->details = c;
1631     if (subsystem[dev]) {
1632         dev_info(card->dev, "Sound card name=%s, "
1633                "subsystem=0x%x. Forced to subsystem=0x%x\n",
1634                c->name, chip->serial, subsystem[dev]);
1635     }
1636 
1637     sprintf(card->longname, "%s at 0x%lx irq %i",
1638         c->name, chip->port, chip->irq);
1639 
1640     ca0106_init_chip(chip, 0);
1641     return 0;
1642 }
1643 
1644 
1645 static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
1646 {
1647     snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
1648 }
1649 
1650 static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
1651 {
1652     snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
1653 }
1654 
1655 static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
1656 {
1657     return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
1658                           midi->port + idx, 0);
1659 }
1660 
1661 static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
1662 {
1663     snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
1664 }
1665 
1666 static struct snd_card *ca0106_dev_id_card(void *dev_id)
1667 {
1668     return ((struct snd_ca0106 *)dev_id)->card;
1669 }
1670 
1671 static int ca0106_dev_id_port(void *dev_id)
1672 {
1673     return ((struct snd_ca0106 *)dev_id)->port;
1674 }
1675 
1676 static int snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
1677 {
1678     struct snd_ca_midi *midi;
1679     char *name;
1680     int err;
1681 
1682     if (channel == CA0106_MIDI_CHAN_B) {
1683         name = "CA0106 MPU-401 (UART) B";
1684         midi =  &chip->midi2;
1685         midi->tx_enable = INTE_MIDI_TX_B;
1686         midi->rx_enable = INTE_MIDI_RX_B;
1687         midi->ipr_tx = IPR_MIDI_TX_B;
1688         midi->ipr_rx = IPR_MIDI_RX_B;
1689         midi->port = MIDI_UART_B_DATA;
1690     } else {
1691         name = "CA0106 MPU-401 (UART)";
1692         midi =  &chip->midi;
1693         midi->tx_enable = INTE_MIDI_TX_A;
1694         midi->rx_enable = INTE_MIDI_TX_B;
1695         midi->ipr_tx = IPR_MIDI_TX_A;
1696         midi->ipr_rx = IPR_MIDI_RX_A;
1697         midi->port = MIDI_UART_A_DATA;
1698     }
1699 
1700     midi->reset = CA0106_MPU401_RESET;
1701     midi->enter_uart = CA0106_MPU401_ENTER_UART;
1702     midi->ack = CA0106_MPU401_ACK;
1703 
1704     midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
1705     midi->output_ready = CA0106_MIDI_OUTPUT_READY;
1706 
1707     midi->channel = channel;
1708 
1709     midi->interrupt_enable = ca0106_midi_interrupt_enable;
1710     midi->interrupt_disable = ca0106_midi_interrupt_disable;
1711 
1712     midi->read = ca0106_midi_read;
1713     midi->write = ca0106_midi_write;
1714 
1715     midi->get_dev_id_card = ca0106_dev_id_card;
1716     midi->get_dev_id_port = ca0106_dev_id_port;
1717 
1718     midi->dev_id = chip;
1719     
1720     err = ca_midi_init(chip, midi, 0, name);
1721     if (err < 0)
1722         return err;
1723 
1724     return 0;
1725 }
1726 
1727 
1728 static int __snd_ca0106_probe(struct pci_dev *pci,
1729                   const struct pci_device_id *pci_id)
1730 {
1731     static int dev;
1732     struct snd_card *card;
1733     struct snd_ca0106 *chip;
1734     int i, err;
1735 
1736     if (dev >= SNDRV_CARDS)
1737         return -ENODEV;
1738     if (!enable[dev]) {
1739         dev++;
1740         return -ENOENT;
1741     }
1742 
1743     err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1744                 sizeof(*chip), &card);
1745     if (err < 0)
1746         return err;
1747     chip = card->private_data;
1748 
1749     err = snd_ca0106_create(dev, card, pci);
1750     if (err < 0)
1751         return err;
1752     card->private_free = snd_ca0106_free;
1753 
1754     for (i = 0; i < 4; i++) {
1755         err = snd_ca0106_pcm(chip, i);
1756         if (err < 0)
1757             return err;
1758     }
1759 
1760     if (chip->details->ac97 == 1) {
1761         /* The SB0410 and SB0413 do not have an AC97 chip. */
1762         err = snd_ca0106_ac97(chip);
1763         if (err < 0)
1764             return err;
1765     }
1766     err = snd_ca0106_mixer(chip);
1767     if (err < 0)
1768         return err;
1769 
1770     dev_dbg(card->dev, "probe for MIDI channel A ...");
1771     err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
1772     if (err < 0)
1773         return err;
1774     dev_dbg(card->dev, " done.\n");
1775 
1776 #ifdef CONFIG_SND_PROC_FS
1777     snd_ca0106_proc_init(chip);
1778 #endif
1779 
1780     err = snd_card_register(card);
1781     if (err < 0)
1782         return err;
1783 
1784     pci_set_drvdata(pci, card);
1785     dev++;
1786     return 0;
1787 }
1788 
1789 static int snd_ca0106_probe(struct pci_dev *pci,
1790                 const struct pci_device_id *pci_id)
1791 {
1792     return snd_card_free_on_error(&pci->dev, __snd_ca0106_probe(pci, pci_id));
1793 }
1794 
1795 #ifdef CONFIG_PM_SLEEP
1796 static int snd_ca0106_suspend(struct device *dev)
1797 {
1798     struct snd_card *card = dev_get_drvdata(dev);
1799     struct snd_ca0106 *chip = card->private_data;
1800 
1801     snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1802     if (chip->details->ac97)
1803         snd_ac97_suspend(chip->ac97);
1804     snd_ca0106_mixer_suspend(chip);
1805 
1806     ca0106_stop_chip(chip);
1807     return 0;
1808 }
1809 
1810 static int snd_ca0106_resume(struct device *dev)
1811 {
1812     struct snd_card *card = dev_get_drvdata(dev);
1813     struct snd_ca0106 *chip = card->private_data;
1814     int i;
1815 
1816     ca0106_init_chip(chip, 1);
1817 
1818     if (chip->details->ac97)
1819         snd_ac97_resume(chip->ac97);
1820     snd_ca0106_mixer_resume(chip);
1821     if (chip->details->spi_dac) {
1822         for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
1823             snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
1824     }
1825 
1826     snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1827     return 0;
1828 }
1829 
1830 static SIMPLE_DEV_PM_OPS(snd_ca0106_pm, snd_ca0106_suspend, snd_ca0106_resume);
1831 #define SND_CA0106_PM_OPS   &snd_ca0106_pm
1832 #else
1833 #define SND_CA0106_PM_OPS   NULL
1834 #endif
1835 
1836 // PCI IDs
1837 static const struct pci_device_id snd_ca0106_ids[] = {
1838     { PCI_VDEVICE(CREATIVE, 0x0007), 0 },   /* Audigy LS or Live 24bit */
1839     { 0, }
1840 };
1841 MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
1842 
1843 // pci_driver definition
1844 static struct pci_driver ca0106_driver = {
1845     .name = KBUILD_MODNAME,
1846     .id_table = snd_ca0106_ids,
1847     .probe = snd_ca0106_probe,
1848     .driver = {
1849         .pm = SND_CA0106_PM_OPS,
1850     },
1851 };
1852 
1853 module_pci_driver(ca0106_driver);
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