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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * bt87x.c - Brooktree Bt878/Bt879 driver for ALSA
0004  *
0005  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
0006  *
0007  * based on btaudio.c by Gerd Knorr <kraxel@bytesex.org>
0008  */
0009 
0010 #include <linux/init.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/pci.h>
0013 #include <linux/slab.h>
0014 #include <linux/module.h>
0015 #include <linux/bitops.h>
0016 #include <linux/io.h>
0017 #include <sound/core.h>
0018 #include <sound/pcm.h>
0019 #include <sound/pcm_params.h>
0020 #include <sound/control.h>
0021 #include <sound/initval.h>
0022 
0023 MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
0024 MODULE_DESCRIPTION("Brooktree Bt87x audio driver");
0025 MODULE_LICENSE("GPL");
0026 
0027 static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
0028 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;   /* ID for this card */
0029 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
0030 static int digital_rate[SNDRV_CARDS];   /* digital input rate */
0031 static bool load_all;   /* allow to load cards not the allowlist */
0032 
0033 module_param_array(index, int, NULL, 0444);
0034 MODULE_PARM_DESC(index, "Index value for Bt87x soundcard");
0035 module_param_array(id, charp, NULL, 0444);
0036 MODULE_PARM_DESC(id, "ID string for Bt87x soundcard");
0037 module_param_array(enable, bool, NULL, 0444);
0038 MODULE_PARM_DESC(enable, "Enable Bt87x soundcard");
0039 module_param_array(digital_rate, int, NULL, 0444);
0040 MODULE_PARM_DESC(digital_rate, "Digital input rate for Bt87x soundcard");
0041 module_param(load_all, bool, 0444);
0042 MODULE_PARM_DESC(load_all, "Allow to load cards not on the allowlist");
0043 
0044 
0045 /* register offsets */
0046 #define REG_INT_STAT        0x100   /* interrupt status */
0047 #define REG_INT_MASK        0x104   /* interrupt mask */
0048 #define REG_GPIO_DMA_CTL    0x10c   /* audio control */
0049 #define REG_PACKET_LEN      0x110   /* audio packet lengths */
0050 #define REG_RISC_STRT_ADD   0x114   /* RISC program start address */
0051 #define REG_RISC_COUNT      0x120   /* RISC program counter */
0052 
0053 /* interrupt bits */
0054 #define INT_OFLOW   (1 <<  3)   /* audio A/D overflow */
0055 #define INT_RISCI   (1 << 11)   /* RISC instruction IRQ bit set */
0056 #define INT_FBUS    (1 << 12)   /* FIFO overrun due to bus access latency */
0057 #define INT_FTRGT   (1 << 13)   /* FIFO overrun due to target latency */
0058 #define INT_FDSR    (1 << 14)   /* FIFO data stream resynchronization */
0059 #define INT_PPERR   (1 << 15)   /* PCI parity error */
0060 #define INT_RIPERR  (1 << 16)   /* RISC instruction parity error */
0061 #define INT_PABORT  (1 << 17)   /* PCI master or target abort */
0062 #define INT_OCERR   (1 << 18)   /* invalid opcode */
0063 #define INT_SCERR   (1 << 19)   /* sync counter overflow */
0064 #define INT_RISC_EN (1 << 27)   /* DMA controller running */
0065 #define INT_RISCS_SHIFT       28    /* RISC status bits */
0066 
0067 /* audio control bits */
0068 #define CTL_FIFO_ENABLE     (1 <<  0)   /* enable audio data FIFO */
0069 #define CTL_RISC_ENABLE     (1 <<  1)   /* enable audio DMA controller */
0070 #define CTL_PKTP_4      (0 <<  2)   /* packet mode FIFO trigger point - 4 DWORDs */
0071 #define CTL_PKTP_8      (1 <<  2)   /* 8 DWORDs */
0072 #define CTL_PKTP_16     (2 <<  2)   /* 16 DWORDs */
0073 #define CTL_ACAP_EN     (1 <<  4)   /* enable audio capture */
0074 #define CTL_DA_APP      (1 <<  5)   /* GPIO input */
0075 #define CTL_DA_IOM_AFE      (0 <<  6)   /* audio A/D input */
0076 #define CTL_DA_IOM_DA       (1 <<  6)   /* digital audio input */
0077 #define CTL_DA_SDR_SHIFT           8    /* DDF first stage decimation rate */
0078 #define CTL_DA_SDR_MASK     (0xf<< 8)
0079 #define CTL_DA_LMT      (1 << 12)   /* limit audio data values */
0080 #define CTL_DA_ES2      (1 << 13)   /* enable DDF stage 2 */
0081 #define CTL_DA_SBR      (1 << 14)   /* samples rounded to 8 bits */
0082 #define CTL_DA_DPM      (1 << 15)   /* data packet mode */
0083 #define CTL_DA_LRD_SHIFT          16    /* ALRCK delay */
0084 #define CTL_DA_MLB      (1 << 21)   /* MSB/LSB format */
0085 #define CTL_DA_LRI      (1 << 22)   /* left/right indication */
0086 #define CTL_DA_SCE      (1 << 23)   /* sample clock edge */
0087 #define CTL_A_SEL_STV       (0 << 24)   /* TV tuner audio input */
0088 #define CTL_A_SEL_SFM       (1 << 24)   /* FM audio input */
0089 #define CTL_A_SEL_SML       (2 << 24)   /* mic/line audio input */
0090 #define CTL_A_SEL_SMXC      (3 << 24)   /* MUX bypass */
0091 #define CTL_A_SEL_SHIFT           24
0092 #define CTL_A_SEL_MASK      (3 << 24)
0093 #define CTL_A_PWRDN     (1 << 26)   /* analog audio power-down */
0094 #define CTL_A_G2X       (1 << 27)   /* audio gain boost */
0095 #define CTL_A_GAIN_SHIFT          28    /* audio input gain */
0096 #define CTL_A_GAIN_MASK     (0xf<<28)
0097 
0098 /* RISC instruction opcodes */
0099 #define RISC_WRITE  (0x1 << 28) /* write FIFO data to memory at address */
0100 #define RISC_WRITEC (0x5 << 28) /* write FIFO data to memory at current address */
0101 #define RISC_SKIP   (0x2 << 28) /* skip FIFO data */
0102 #define RISC_JUMP   (0x7 << 28) /* jump to address */
0103 #define RISC_SYNC   (0x8 << 28) /* synchronize with FIFO */
0104 
0105 /* RISC instruction bits */
0106 #define RISC_BYTES_ENABLE   (0xf << 12) /* byte enable bits */
0107 #define RISC_RESYNC     (  1 << 15) /* disable FDSR errors */
0108 #define RISC_SET_STATUS_SHIFT           16  /* set status bits */
0109 #define RISC_RESET_STATUS_SHIFT         20  /* clear status bits */
0110 #define RISC_IRQ        (  1 << 24) /* interrupt */
0111 #define RISC_EOL        (  1 << 26) /* end of line */
0112 #define RISC_SOL        (  1 << 27) /* start of line */
0113 
0114 /* SYNC status bits values */
0115 #define RISC_SYNC_FM1   0x6
0116 #define RISC_SYNC_VRO   0xc
0117 
0118 #define ANALOG_CLOCK 1792000
0119 #ifdef CONFIG_SND_BT87X_OVERCLOCK
0120 #define CLOCK_DIV_MIN 1
0121 #else
0122 #define CLOCK_DIV_MIN 4
0123 #endif
0124 #define CLOCK_DIV_MAX 15
0125 
0126 #define ERROR_INTERRUPTS (INT_FBUS | INT_FTRGT | INT_PPERR | \
0127               INT_RIPERR | INT_PABORT | INT_OCERR)
0128 #define MY_INTERRUPTS (INT_RISCI | ERROR_INTERRUPTS)
0129 
0130 /* SYNC, one WRITE per line, one extra WRITE per page boundary, SYNC, JUMP */
0131 #define MAX_RISC_SIZE ((1 + 255 + (PAGE_ALIGN(255 * 4092) / PAGE_SIZE - 1) + 1 + 1) * 8)
0132 
0133 /* Cards with configuration information */
0134 enum snd_bt87x_boardid {
0135     SND_BT87X_BOARD_UNKNOWN,
0136     SND_BT87X_BOARD_GENERIC,    /* both an & dig interfaces, 32kHz */
0137     SND_BT87X_BOARD_ANALOG,     /* board with no external A/D */
0138     SND_BT87X_BOARD_OSPREY2x0,
0139     SND_BT87X_BOARD_OSPREY440,
0140     SND_BT87X_BOARD_AVPHONE98,
0141 };
0142 
0143 /* Card configuration */
0144 struct snd_bt87x_board {
0145     int dig_rate;       /* Digital input sampling rate */
0146     u32 digital_fmt;    /* Register settings for digital input */
0147     unsigned no_analog:1;   /* No analog input */
0148     unsigned no_digital:1;  /* No digital input */
0149 };
0150 
0151 static const struct snd_bt87x_board snd_bt87x_boards[] = {
0152     [SND_BT87X_BOARD_UNKNOWN] = {
0153         .dig_rate = 32000, /* just a guess */
0154     },
0155     [SND_BT87X_BOARD_GENERIC] = {
0156         .dig_rate = 32000,
0157     },
0158     [SND_BT87X_BOARD_ANALOG] = {
0159         .no_digital = 1,
0160     },
0161     [SND_BT87X_BOARD_OSPREY2x0] = {
0162         .dig_rate = 44100,
0163         .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
0164     },
0165     [SND_BT87X_BOARD_OSPREY440] = {
0166         .dig_rate = 32000,
0167         .digital_fmt = CTL_DA_LRI | (1 << CTL_DA_LRD_SHIFT),
0168         .no_analog = 1,
0169     },
0170     [SND_BT87X_BOARD_AVPHONE98] = {
0171         .dig_rate = 48000,
0172     },
0173 };
0174 
0175 struct snd_bt87x {
0176     struct snd_card *card;
0177     struct pci_dev *pci;
0178     struct snd_bt87x_board board;
0179 
0180     void __iomem *mmio;
0181     int irq;
0182 
0183     spinlock_t reg_lock;
0184     unsigned long opened;
0185     struct snd_pcm_substream *substream;
0186 
0187     struct snd_dma_buffer dma_risc;
0188     unsigned int line_bytes;
0189     unsigned int lines;
0190 
0191     u32 reg_control;
0192     u32 interrupt_mask;
0193 
0194     int current_line;
0195 
0196     int pci_parity_errors;
0197 };
0198 
0199 enum { DEVICE_DIGITAL, DEVICE_ANALOG };
0200 
0201 static inline u32 snd_bt87x_readl(struct snd_bt87x *chip, u32 reg)
0202 {
0203     return readl(chip->mmio + reg);
0204 }
0205 
0206 static inline void snd_bt87x_writel(struct snd_bt87x *chip, u32 reg, u32 value)
0207 {
0208     writel(value, chip->mmio + reg);
0209 }
0210 
0211 static int snd_bt87x_create_risc(struct snd_bt87x *chip, struct snd_pcm_substream *substream,
0212                      unsigned int periods, unsigned int period_bytes)
0213 {
0214     unsigned int i, offset;
0215     __le32 *risc;
0216 
0217     if (chip->dma_risc.area == NULL) {
0218         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &chip->pci->dev,
0219                     PAGE_ALIGN(MAX_RISC_SIZE), &chip->dma_risc) < 0)
0220             return -ENOMEM;
0221     }
0222     risc = (__le32 *)chip->dma_risc.area;
0223     offset = 0;
0224     *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_FM1);
0225     *risc++ = cpu_to_le32(0);
0226     for (i = 0; i < periods; ++i) {
0227         u32 rest;
0228 
0229         rest = period_bytes;
0230         do {
0231             u32 cmd, len;
0232             unsigned int addr;
0233 
0234             len = PAGE_SIZE - (offset % PAGE_SIZE);
0235             if (len > rest)
0236                 len = rest;
0237             cmd = RISC_WRITE | len;
0238             if (rest == period_bytes) {
0239                 u32 block = i * 16 / periods;
0240                 cmd |= RISC_SOL;
0241                 cmd |= block << RISC_SET_STATUS_SHIFT;
0242                 cmd |= (~block & 0xf) << RISC_RESET_STATUS_SHIFT;
0243             }
0244             if (len == rest)
0245                 cmd |= RISC_EOL | RISC_IRQ;
0246             *risc++ = cpu_to_le32(cmd);
0247             addr = snd_pcm_sgbuf_get_addr(substream, offset);
0248             *risc++ = cpu_to_le32(addr);
0249             offset += len;
0250             rest -= len;
0251         } while (rest > 0);
0252     }
0253     *risc++ = cpu_to_le32(RISC_SYNC | RISC_SYNC_VRO);
0254     *risc++ = cpu_to_le32(0);
0255     *risc++ = cpu_to_le32(RISC_JUMP);
0256     *risc++ = cpu_to_le32(chip->dma_risc.addr);
0257     chip->line_bytes = period_bytes;
0258     chip->lines = periods;
0259     return 0;
0260 }
0261 
0262 static void snd_bt87x_free_risc(struct snd_bt87x *chip)
0263 {
0264     if (chip->dma_risc.area) {
0265         snd_dma_free_pages(&chip->dma_risc);
0266         chip->dma_risc.area = NULL;
0267     }
0268 }
0269 
0270 static void snd_bt87x_pci_error(struct snd_bt87x *chip, unsigned int status)
0271 {
0272     int pci_status = pci_status_get_and_clear_errors(chip->pci);
0273 
0274     if (pci_status != PCI_STATUS_DETECTED_PARITY)
0275         dev_err(chip->card->dev,
0276             "Aieee - PCI error! status %#08x, PCI status %#04x\n",
0277                status & ERROR_INTERRUPTS, pci_status);
0278     else {
0279         dev_err(chip->card->dev,
0280             "Aieee - PCI parity error detected!\n");
0281         /* error 'handling' similar to aic7xxx_pci.c: */
0282         chip->pci_parity_errors++;
0283         if (chip->pci_parity_errors > 20) {
0284             dev_err(chip->card->dev,
0285                 "Too many PCI parity errors observed.\n");
0286             dev_err(chip->card->dev,
0287                 "Some device on this bus is generating bad parity.\n");
0288             dev_err(chip->card->dev,
0289                 "This is an error *observed by*, not *generated by*, this card.\n");
0290             dev_err(chip->card->dev,
0291                 "PCI parity error checking has been disabled.\n");
0292             chip->interrupt_mask &= ~(INT_PPERR | INT_RIPERR);
0293             snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
0294         }
0295     }
0296 }
0297 
0298 static irqreturn_t snd_bt87x_interrupt(int irq, void *dev_id)
0299 {
0300     struct snd_bt87x *chip = dev_id;
0301     unsigned int status, irq_status;
0302 
0303     status = snd_bt87x_readl(chip, REG_INT_STAT);
0304     irq_status = status & chip->interrupt_mask;
0305     if (!irq_status)
0306         return IRQ_NONE;
0307     snd_bt87x_writel(chip, REG_INT_STAT, irq_status);
0308 
0309     if (irq_status & ERROR_INTERRUPTS) {
0310         if (irq_status & (INT_FBUS | INT_FTRGT))
0311             dev_warn(chip->card->dev,
0312                  "FIFO overrun, status %#08x\n", status);
0313         if (irq_status & INT_OCERR)
0314             dev_err(chip->card->dev,
0315                 "internal RISC error, status %#08x\n", status);
0316         if (irq_status & (INT_PPERR | INT_RIPERR | INT_PABORT))
0317             snd_bt87x_pci_error(chip, irq_status);
0318     }
0319     if ((irq_status & INT_RISCI) && (chip->reg_control & CTL_ACAP_EN)) {
0320         int current_block, irq_block;
0321 
0322         /* assume that exactly one line has been recorded */
0323         chip->current_line = (chip->current_line + 1) % chip->lines;
0324         /* but check if some interrupts have been skipped */
0325         current_block = chip->current_line * 16 / chip->lines;
0326         irq_block = status >> INT_RISCS_SHIFT;
0327         if (current_block != irq_block)
0328             chip->current_line = DIV_ROUND_UP(irq_block * chip->lines,
0329                               16);
0330 
0331         snd_pcm_period_elapsed(chip->substream);
0332     }
0333     return IRQ_HANDLED;
0334 }
0335 
0336 static const struct snd_pcm_hardware snd_bt87x_digital_hw = {
0337     .info = SNDRV_PCM_INFO_MMAP |
0338         SNDRV_PCM_INFO_INTERLEAVED |
0339         SNDRV_PCM_INFO_BLOCK_TRANSFER |
0340         SNDRV_PCM_INFO_MMAP_VALID |
0341         SNDRV_PCM_INFO_BATCH,
0342     .formats = SNDRV_PCM_FMTBIT_S16_LE,
0343     .rates = 0, /* set at runtime */
0344     .channels_min = 2,
0345     .channels_max = 2,
0346     .buffer_bytes_max = 255 * 4092,
0347     .period_bytes_min = 32,
0348     .period_bytes_max = 4092,
0349     .periods_min = 2,
0350     .periods_max = 255,
0351 };
0352 
0353 static const struct snd_pcm_hardware snd_bt87x_analog_hw = {
0354     .info = SNDRV_PCM_INFO_MMAP |
0355         SNDRV_PCM_INFO_INTERLEAVED |
0356         SNDRV_PCM_INFO_BLOCK_TRANSFER |
0357         SNDRV_PCM_INFO_MMAP_VALID |
0358         SNDRV_PCM_INFO_BATCH,
0359     .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8,
0360     .rates = SNDRV_PCM_RATE_KNOT,
0361     .rate_min = ANALOG_CLOCK / CLOCK_DIV_MAX,
0362     .rate_max = ANALOG_CLOCK / CLOCK_DIV_MIN,
0363     .channels_min = 1,
0364     .channels_max = 1,
0365     .buffer_bytes_max = 255 * 4092,
0366     .period_bytes_min = 32,
0367     .period_bytes_max = 4092,
0368     .periods_min = 2,
0369     .periods_max = 255,
0370 };
0371 
0372 static int snd_bt87x_set_digital_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
0373 {
0374     chip->reg_control |= CTL_DA_IOM_DA | CTL_A_PWRDN;
0375     runtime->hw = snd_bt87x_digital_hw;
0376     runtime->hw.rates = snd_pcm_rate_to_rate_bit(chip->board.dig_rate);
0377     runtime->hw.rate_min = chip->board.dig_rate;
0378     runtime->hw.rate_max = chip->board.dig_rate;
0379     return 0;
0380 }
0381 
0382 static int snd_bt87x_set_analog_hw(struct snd_bt87x *chip, struct snd_pcm_runtime *runtime)
0383 {
0384     static const struct snd_ratnum analog_clock = {
0385         .num = ANALOG_CLOCK,
0386         .den_min = CLOCK_DIV_MIN,
0387         .den_max = CLOCK_DIV_MAX,
0388         .den_step = 1
0389     };
0390     static const struct snd_pcm_hw_constraint_ratnums constraint_rates = {
0391         .nrats = 1,
0392         .rats = &analog_clock
0393     };
0394 
0395     chip->reg_control &= ~(CTL_DA_IOM_DA | CTL_A_PWRDN);
0396     runtime->hw = snd_bt87x_analog_hw;
0397     return snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
0398                          &constraint_rates);
0399 }
0400 
0401 static int snd_bt87x_pcm_open(struct snd_pcm_substream *substream)
0402 {
0403     struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
0404     struct snd_pcm_runtime *runtime = substream->runtime;
0405     int err;
0406 
0407     if (test_and_set_bit(0, &chip->opened))
0408         return -EBUSY;
0409 
0410     if (substream->pcm->device == DEVICE_DIGITAL)
0411         err = snd_bt87x_set_digital_hw(chip, runtime);
0412     else
0413         err = snd_bt87x_set_analog_hw(chip, runtime);
0414     if (err < 0)
0415         goto _error;
0416 
0417     err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
0418     if (err < 0)
0419         goto _error;
0420 
0421     chip->substream = substream;
0422     return 0;
0423 
0424 _error:
0425     clear_bit(0, &chip->opened);
0426     smp_mb__after_atomic();
0427     return err;
0428 }
0429 
0430 static int snd_bt87x_close(struct snd_pcm_substream *substream)
0431 {
0432     struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
0433 
0434     spin_lock_irq(&chip->reg_lock);
0435     chip->reg_control |= CTL_A_PWRDN;
0436     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0437     spin_unlock_irq(&chip->reg_lock);
0438 
0439     chip->substream = NULL;
0440     clear_bit(0, &chip->opened);
0441     smp_mb__after_atomic();
0442     return 0;
0443 }
0444 
0445 static int snd_bt87x_hw_params(struct snd_pcm_substream *substream,
0446                    struct snd_pcm_hw_params *hw_params)
0447 {
0448     struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
0449 
0450     return snd_bt87x_create_risc(chip, substream,
0451                      params_periods(hw_params),
0452                      params_period_bytes(hw_params));
0453 }
0454 
0455 static int snd_bt87x_hw_free(struct snd_pcm_substream *substream)
0456 {
0457     struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
0458 
0459     snd_bt87x_free_risc(chip);
0460     return 0;
0461 }
0462 
0463 static int snd_bt87x_prepare(struct snd_pcm_substream *substream)
0464 {
0465     struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
0466     struct snd_pcm_runtime *runtime = substream->runtime;
0467     int decimation;
0468 
0469     spin_lock_irq(&chip->reg_lock);
0470     chip->reg_control &= ~(CTL_DA_SDR_MASK | CTL_DA_SBR);
0471     decimation = (ANALOG_CLOCK + runtime->rate / 4) / runtime->rate;
0472     chip->reg_control |= decimation << CTL_DA_SDR_SHIFT;
0473     if (runtime->format == SNDRV_PCM_FORMAT_S8)
0474         chip->reg_control |= CTL_DA_SBR;
0475     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0476     spin_unlock_irq(&chip->reg_lock);
0477     return 0;
0478 }
0479 
0480 static int snd_bt87x_start(struct snd_bt87x *chip)
0481 {
0482     spin_lock(&chip->reg_lock);
0483     chip->current_line = 0;
0484     chip->reg_control |= CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN;
0485     snd_bt87x_writel(chip, REG_RISC_STRT_ADD, chip->dma_risc.addr);
0486     snd_bt87x_writel(chip, REG_PACKET_LEN,
0487              chip->line_bytes | (chip->lines << 16));
0488     snd_bt87x_writel(chip, REG_INT_MASK, chip->interrupt_mask);
0489     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0490     spin_unlock(&chip->reg_lock);
0491     return 0;
0492 }
0493 
0494 static int snd_bt87x_stop(struct snd_bt87x *chip)
0495 {
0496     spin_lock(&chip->reg_lock);
0497     chip->reg_control &= ~(CTL_FIFO_ENABLE | CTL_RISC_ENABLE | CTL_ACAP_EN);
0498     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0499     snd_bt87x_writel(chip, REG_INT_MASK, 0);
0500     snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
0501     spin_unlock(&chip->reg_lock);
0502     return 0;
0503 }
0504 
0505 static int snd_bt87x_trigger(struct snd_pcm_substream *substream, int cmd)
0506 {
0507     struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
0508 
0509     switch (cmd) {
0510     case SNDRV_PCM_TRIGGER_START:
0511         return snd_bt87x_start(chip);
0512     case SNDRV_PCM_TRIGGER_STOP:
0513         return snd_bt87x_stop(chip);
0514     default:
0515         return -EINVAL;
0516     }
0517 }
0518 
0519 static snd_pcm_uframes_t snd_bt87x_pointer(struct snd_pcm_substream *substream)
0520 {
0521     struct snd_bt87x *chip = snd_pcm_substream_chip(substream);
0522     struct snd_pcm_runtime *runtime = substream->runtime;
0523 
0524     return (snd_pcm_uframes_t)bytes_to_frames(runtime, chip->current_line * chip->line_bytes);
0525 }
0526 
0527 static const struct snd_pcm_ops snd_bt87x_pcm_ops = {
0528     .open = snd_bt87x_pcm_open,
0529     .close = snd_bt87x_close,
0530     .hw_params = snd_bt87x_hw_params,
0531     .hw_free = snd_bt87x_hw_free,
0532     .prepare = snd_bt87x_prepare,
0533     .trigger = snd_bt87x_trigger,
0534     .pointer = snd_bt87x_pointer,
0535 };
0536 
0537 static int snd_bt87x_capture_volume_info(struct snd_kcontrol *kcontrol,
0538                      struct snd_ctl_elem_info *info)
0539 {
0540     info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0541     info->count = 1;
0542     info->value.integer.min = 0;
0543     info->value.integer.max = 15;
0544     return 0;
0545 }
0546 
0547 static int snd_bt87x_capture_volume_get(struct snd_kcontrol *kcontrol,
0548                     struct snd_ctl_elem_value *value)
0549 {
0550     struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
0551 
0552     value->value.integer.value[0] = (chip->reg_control & CTL_A_GAIN_MASK) >> CTL_A_GAIN_SHIFT;
0553     return 0;
0554 }
0555 
0556 static int snd_bt87x_capture_volume_put(struct snd_kcontrol *kcontrol,
0557                     struct snd_ctl_elem_value *value)
0558 {
0559     struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
0560     u32 old_control;
0561     int changed;
0562 
0563     spin_lock_irq(&chip->reg_lock);
0564     old_control = chip->reg_control;
0565     chip->reg_control = (chip->reg_control & ~CTL_A_GAIN_MASK)
0566         | (value->value.integer.value[0] << CTL_A_GAIN_SHIFT);
0567     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0568     changed = old_control != chip->reg_control;
0569     spin_unlock_irq(&chip->reg_lock);
0570     return changed;
0571 }
0572 
0573 static const struct snd_kcontrol_new snd_bt87x_capture_volume = {
0574     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0575     .name = "Capture Volume",
0576     .info = snd_bt87x_capture_volume_info,
0577     .get = snd_bt87x_capture_volume_get,
0578     .put = snd_bt87x_capture_volume_put,
0579 };
0580 
0581 #define snd_bt87x_capture_boost_info    snd_ctl_boolean_mono_info
0582 
0583 static int snd_bt87x_capture_boost_get(struct snd_kcontrol *kcontrol,
0584                        struct snd_ctl_elem_value *value)
0585 {
0586     struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
0587 
0588     value->value.integer.value[0] = !! (chip->reg_control & CTL_A_G2X);
0589     return 0;
0590 }
0591 
0592 static int snd_bt87x_capture_boost_put(struct snd_kcontrol *kcontrol,
0593                        struct snd_ctl_elem_value *value)
0594 {
0595     struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
0596     u32 old_control;
0597     int changed;
0598 
0599     spin_lock_irq(&chip->reg_lock);
0600     old_control = chip->reg_control;
0601     chip->reg_control = (chip->reg_control & ~CTL_A_G2X)
0602         | (value->value.integer.value[0] ? CTL_A_G2X : 0);
0603     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0604     changed = chip->reg_control != old_control;
0605     spin_unlock_irq(&chip->reg_lock);
0606     return changed;
0607 }
0608 
0609 static const struct snd_kcontrol_new snd_bt87x_capture_boost = {
0610     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0611     .name = "Capture Boost",
0612     .info = snd_bt87x_capture_boost_info,
0613     .get = snd_bt87x_capture_boost_get,
0614     .put = snd_bt87x_capture_boost_put,
0615 };
0616 
0617 static int snd_bt87x_capture_source_info(struct snd_kcontrol *kcontrol,
0618                      struct snd_ctl_elem_info *info)
0619 {
0620     static const char *const texts[3] = {"TV Tuner", "FM", "Mic/Line"};
0621 
0622     return snd_ctl_enum_info(info, 1, 3, texts);
0623 }
0624 
0625 static int snd_bt87x_capture_source_get(struct snd_kcontrol *kcontrol,
0626                     struct snd_ctl_elem_value *value)
0627 {
0628     struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
0629 
0630     value->value.enumerated.item[0] = (chip->reg_control & CTL_A_SEL_MASK) >> CTL_A_SEL_SHIFT;
0631     return 0;
0632 }
0633 
0634 static int snd_bt87x_capture_source_put(struct snd_kcontrol *kcontrol,
0635                     struct snd_ctl_elem_value *value)
0636 {
0637     struct snd_bt87x *chip = snd_kcontrol_chip(kcontrol);
0638     u32 old_control;
0639     int changed;
0640 
0641     spin_lock_irq(&chip->reg_lock);
0642     old_control = chip->reg_control;
0643     chip->reg_control = (chip->reg_control & ~CTL_A_SEL_MASK)
0644         | (value->value.enumerated.item[0] << CTL_A_SEL_SHIFT);
0645     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0646     changed = chip->reg_control != old_control;
0647     spin_unlock_irq(&chip->reg_lock);
0648     return changed;
0649 }
0650 
0651 static const struct snd_kcontrol_new snd_bt87x_capture_source = {
0652     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0653     .name = "Capture Source",
0654     .info = snd_bt87x_capture_source_info,
0655     .get = snd_bt87x_capture_source_get,
0656     .put = snd_bt87x_capture_source_put,
0657 };
0658 
0659 static void snd_bt87x_free(struct snd_card *card)
0660 {
0661     struct snd_bt87x *chip = card->private_data;
0662 
0663     snd_bt87x_stop(chip);
0664 }
0665 
0666 static int snd_bt87x_pcm(struct snd_bt87x *chip, int device, char *name)
0667 {
0668     int err;
0669     struct snd_pcm *pcm;
0670 
0671     err = snd_pcm_new(chip->card, name, device, 0, 1, &pcm);
0672     if (err < 0)
0673         return err;
0674     pcm->private_data = chip;
0675     strcpy(pcm->name, name);
0676     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_bt87x_pcm_ops);
0677     snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV_SG,
0678                        &chip->pci->dev,
0679                        128 * 1024,
0680                        ALIGN(255 * 4092, 1024));
0681     return 0;
0682 }
0683 
0684 static int snd_bt87x_create(struct snd_card *card,
0685                 struct pci_dev *pci)
0686 {
0687     struct snd_bt87x *chip = card->private_data;
0688     int err;
0689 
0690     err = pcim_enable_device(pci);
0691     if (err < 0)
0692         return err;
0693 
0694     chip->card = card;
0695     chip->pci = pci;
0696     chip->irq = -1;
0697     spin_lock_init(&chip->reg_lock);
0698 
0699     err = pcim_iomap_regions(pci, 1 << 0, "Bt87x audio");
0700     if (err < 0)
0701         return err;
0702     chip->mmio = pcim_iomap_table(pci)[0];
0703 
0704     chip->reg_control = CTL_A_PWRDN | CTL_DA_ES2 |
0705                 CTL_PKTP_16 | (15 << CTL_DA_SDR_SHIFT);
0706     chip->interrupt_mask = MY_INTERRUPTS;
0707     snd_bt87x_writel(chip, REG_GPIO_DMA_CTL, chip->reg_control);
0708     snd_bt87x_writel(chip, REG_INT_MASK, 0);
0709     snd_bt87x_writel(chip, REG_INT_STAT, MY_INTERRUPTS);
0710 
0711     err = devm_request_irq(&pci->dev, pci->irq, snd_bt87x_interrupt,
0712                    IRQF_SHARED, KBUILD_MODNAME, chip);
0713     if (err < 0) {
0714         dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
0715         return err;
0716     }
0717     chip->irq = pci->irq;
0718     card->sync_irq = chip->irq;
0719     card->private_free = snd_bt87x_free;
0720     pci_set_master(pci);
0721 
0722     return 0;
0723 }
0724 
0725 #define BT_DEVICE(chip, subvend, subdev, id) \
0726     { .vendor = PCI_VENDOR_ID_BROOKTREE, \
0727       .device = chip, \
0728       .subvendor = subvend, .subdevice = subdev, \
0729       .driver_data = SND_BT87X_BOARD_ ## id }
0730 /* driver_data is the card id for that device */
0731 
0732 static const struct pci_device_id snd_bt87x_ids[] = {
0733     /* Hauppauge WinTV series */
0734     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0x13eb, GENERIC),
0735     /* Hauppauge WinTV series */
0736     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, 0x0070, 0x13eb, GENERIC),
0737     /* Viewcast Osprey 200 */
0738     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff01, OSPREY2x0),
0739     /* Viewcast Osprey 440 (rate is configurable via gpio) */
0740     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x0070, 0xff07, OSPREY440),
0741     /* ATI TV-Wonder */
0742     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1002, 0x0001, GENERIC),
0743     /* Leadtek Winfast tv 2000xp delux */
0744     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x107d, 0x6606, GENERIC),
0745     /* Pinnacle PCTV */
0746     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x11bd, 0x0012, GENERIC),
0747     /* Voodoo TV 200 */
0748     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x121a, 0x3000, GENERIC),
0749     /* Askey Computer Corp. MagicTView'99 */
0750     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x144f, 0x3000, GENERIC),
0751     /* AVerMedia Studio No. 103, 203, ...? */
0752     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1461, 0x0003, AVPHONE98),
0753     /* Prolink PixelView PV-M4900 */
0754     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0x1554, 0x4011, GENERIC),
0755     /* Pinnacle  Studio PCTV rave */
0756     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, 0xbd11, 0x1200, GENERIC),
0757     { }
0758 };
0759 MODULE_DEVICE_TABLE(pci, snd_bt87x_ids);
0760 
0761 /* cards known not to have audio
0762  * (DVB cards use the audio function to transfer MPEG data) */
0763 static struct {
0764     unsigned short subvendor, subdevice;
0765 } denylist[] = {
0766     {0x0071, 0x0101}, /* Nebula Electronics DigiTV */
0767     {0x11bd, 0x001c}, /* Pinnacle PCTV Sat */
0768     {0x11bd, 0x0026}, /* Pinnacle PCTV SAT CI */
0769     {0x1461, 0x0761}, /* AVermedia AverTV DVB-T */
0770     {0x1461, 0x0771}, /* AVermedia DVB-T 771 */
0771     {0x1822, 0x0001}, /* Twinhan VisionPlus DVB-T */
0772     {0x18ac, 0xd500}, /* DVICO FusionHDTV 5 Lite */
0773     {0x18ac, 0xdb10}, /* DVICO FusionHDTV DVB-T Lite */
0774     {0x18ac, 0xdb11}, /* Ultraview DVB-T Lite */
0775     {0x270f, 0xfc00}, /* Chaintech Digitop DST-1000 DVB-S */
0776     {0x7063, 0x2000}, /* pcHDTV HD-2000 TV */
0777 };
0778 
0779 static struct pci_driver driver;
0780 
0781 /* return the id of the card, or a negative value if it's on the denylist */
0782 static int snd_bt87x_detect_card(struct pci_dev *pci)
0783 {
0784     int i;
0785     const struct pci_device_id *supported;
0786 
0787     supported = pci_match_id(snd_bt87x_ids, pci);
0788     if (supported && supported->driver_data > 0)
0789         return supported->driver_data;
0790 
0791     for (i = 0; i < ARRAY_SIZE(denylist); ++i)
0792         if (denylist[i].subvendor == pci->subsystem_vendor &&
0793             denylist[i].subdevice == pci->subsystem_device) {
0794             dev_dbg(&pci->dev,
0795                 "card %#04x-%#04x:%#04x has no audio\n",
0796                     pci->device, pci->subsystem_vendor, pci->subsystem_device);
0797             return -EBUSY;
0798         }
0799 
0800     dev_info(&pci->dev, "unknown card %#04x-%#04x:%#04x\n",
0801            pci->device, pci->subsystem_vendor, pci->subsystem_device);
0802     dev_info(&pci->dev, "please mail id, board name, and, "
0803            "if it works, the correct digital_rate option to "
0804            "<alsa-devel@alsa-project.org>\n");
0805     return SND_BT87X_BOARD_UNKNOWN;
0806 }
0807 
0808 static int __snd_bt87x_probe(struct pci_dev *pci,
0809                  const struct pci_device_id *pci_id)
0810 {
0811     static int dev;
0812     struct snd_card *card;
0813     struct snd_bt87x *chip;
0814     int err;
0815     enum snd_bt87x_boardid boardid;
0816 
0817     if (!pci_id->driver_data) {
0818         err = snd_bt87x_detect_card(pci);
0819         if (err < 0)
0820             return -ENODEV;
0821         boardid = err;
0822     } else
0823         boardid = pci_id->driver_data;
0824 
0825     if (dev >= SNDRV_CARDS)
0826         return -ENODEV;
0827     if (!enable[dev]) {
0828         ++dev;
0829         return -ENOENT;
0830     }
0831 
0832     err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
0833                 sizeof(*chip), &card);
0834     if (err < 0)
0835         return err;
0836     chip = card->private_data;
0837 
0838     err = snd_bt87x_create(card, pci);
0839     if (err < 0)
0840         return err;
0841 
0842     memcpy(&chip->board, &snd_bt87x_boards[boardid], sizeof(chip->board));
0843 
0844     if (!chip->board.no_digital) {
0845         if (digital_rate[dev] > 0)
0846             chip->board.dig_rate = digital_rate[dev];
0847 
0848         chip->reg_control |= chip->board.digital_fmt;
0849 
0850         err = snd_bt87x_pcm(chip, DEVICE_DIGITAL, "Bt87x Digital");
0851         if (err < 0)
0852             return err;
0853     }
0854     if (!chip->board.no_analog) {
0855         err = snd_bt87x_pcm(chip, DEVICE_ANALOG, "Bt87x Analog");
0856         if (err < 0)
0857             return err;
0858         err = snd_ctl_add(card, snd_ctl_new1(
0859                   &snd_bt87x_capture_volume, chip));
0860         if (err < 0)
0861             return err;
0862         err = snd_ctl_add(card, snd_ctl_new1(
0863                   &snd_bt87x_capture_boost, chip));
0864         if (err < 0)
0865             return err;
0866         err = snd_ctl_add(card, snd_ctl_new1(
0867                   &snd_bt87x_capture_source, chip));
0868         if (err < 0)
0869             return err;
0870     }
0871     dev_info(card->dev, "bt87x%d: Using board %d, %sanalog, %sdigital "
0872            "(rate %d Hz)\n", dev, boardid,
0873            chip->board.no_analog ? "no " : "",
0874            chip->board.no_digital ? "no " : "", chip->board.dig_rate);
0875 
0876     strcpy(card->driver, "Bt87x");
0877     sprintf(card->shortname, "Brooktree Bt%x", pci->device);
0878     sprintf(card->longname, "%s at %#llx, irq %i",
0879         card->shortname, (unsigned long long)pci_resource_start(pci, 0),
0880         chip->irq);
0881     strcpy(card->mixername, "Bt87x");
0882 
0883     err = snd_card_register(card);
0884     if (err < 0)
0885         return err;
0886 
0887     pci_set_drvdata(pci, card);
0888     ++dev;
0889     return 0;
0890 }
0891 
0892 static int snd_bt87x_probe(struct pci_dev *pci,
0893                const struct pci_device_id *pci_id)
0894 {
0895     return snd_card_free_on_error(&pci->dev, __snd_bt87x_probe(pci, pci_id));
0896 }
0897 
0898 /* default entries for all Bt87x cards - it's not exported */
0899 /* driver_data is set to 0 to call detection */
0900 static const struct pci_device_id snd_bt87x_default_ids[] = {
0901     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_878, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
0902     BT_DEVICE(PCI_DEVICE_ID_BROOKTREE_879, PCI_ANY_ID, PCI_ANY_ID, UNKNOWN),
0903     { }
0904 };
0905 
0906 static struct pci_driver driver = {
0907     .name = KBUILD_MODNAME,
0908     .id_table = snd_bt87x_ids,
0909     .probe = snd_bt87x_probe,
0910 };
0911 
0912 static int __init alsa_card_bt87x_init(void)
0913 {
0914     if (load_all)
0915         driver.id_table = snd_bt87x_default_ids;
0916     return pci_register_driver(&driver);
0917 }
0918 
0919 static void __exit alsa_card_bt87x_exit(void)
0920 {
0921     pci_unregister_driver(&driver);
0922 }
0923 
0924 module_init(alsa_card_bt87x_init)
0925 module_exit(alsa_card_bt87x_exit)
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