pci/asihpi/hpi6205.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*****************************************************************************
0003
0004     AudioScience HPI driver
0005     Copyright (C) 1997-2011  AudioScience Inc. <support@audioscience.com>
0006
0007
0008 Host Interface module for an ASI6205 based
0009 bus mastering PCI adapter.
0010
0011 Copyright AudioScience, Inc., 2003
0012 ******************************************************************************/
0013
0014 #ifndef _HPI6205_H_
0015 #define _HPI6205_H_
0016
0017 #include "hpi_internal.h"
0018
0019 /***********************************************************
0020     Defines used for basic messaging
0021 ************************************************************/
0022 #define H620_HIF_RESET          0
0023 #define H620_HIF_IDLE           1
0024 #define H620_HIF_GET_RESP       2
0025 #define H620_HIF_DATA_DONE      3
0026 #define H620_HIF_DATA_MASK      0x10
0027 #define H620_HIF_SEND_DATA      0x14
0028 #define H620_HIF_GET_DATA       0x15
0029 #define H620_HIF_UNKNOWN                0x0000ffff
0030
0031 /***********************************************************
0032     Types used for mixer control caching
0033 ************************************************************/
0034
0035 #define H620_MAX_ISTREAMS 32
0036 #define H620_MAX_OSTREAMS 32
0037 #define HPI_NMIXER_CONTROLS 2048
0038
0039 /*********************************************************************
0040 This is used for dynamic control cache allocation
0041 **********************************************************************/
0042 struct controlcache_6205 {
0043     u32 number_of_controls;
0044     u32 physical_address32;
0045     u32 size_in_bytes;
0046 };
0047
0048 /*********************************************************************
0049 This is used for dynamic allocation of async event array
0050 **********************************************************************/
0051 struct async_event_buffer_6205 {
0052     u32 physical_address32;
0053     u32 spare;
0054     struct hpi_fifo_buffer b;
0055 };
0056
0057 /***********************************************************
0058 The Host located memory buffer that the 6205 will bus master
0059 in and out of.
0060 ************************************************************/
0061 #define HPI6205_SIZEOF_DATA (16*1024)
0062
0063 struct message_buffer_6205 {
0064     struct hpi_message message;
0065     char data[256];
0066 };
0067
0068 struct response_buffer_6205 {
0069     struct hpi_response response;
0070     char data[256];
0071 };
0072
0073 union buffer_6205 {
0074     struct message_buffer_6205 message_buffer;
0075     struct response_buffer_6205 response_buffer;
0076     u8 b_data[HPI6205_SIZEOF_DATA];
0077 };
0078
0079 struct bus_master_interface {
0080     u32 host_cmd;
0081     u32 dsp_ack;
0082     u32 transfer_size_in_bytes;
0083     union buffer_6205 u;
0084     struct controlcache_6205 control_cache;
0085     struct async_event_buffer_6205 async_buffer;
0086     struct hpi_hostbuffer_status
0087      instream_host_buffer_status[H620_MAX_ISTREAMS];
0088     struct hpi_hostbuffer_status
0089      outstream_host_buffer_status[H620_MAX_OSTREAMS];
0090 };
0091
0092 #endif