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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
0004  *  Routines for control of 16-bit SoundBlaster cards and clones
0005  *  Note: This is very ugly hardware which uses one 8-bit DMA channel and
0006  *        second 16-bit DMA channel. Unfortunately 8-bit DMA channel can't
0007  *        transfer 16-bit samples and 16-bit DMA channels can't transfer
0008  *        8-bit samples. This make full duplex more complicated than
0009  *        can be... People, don't buy these soundcards for full 16-bit
0010  *        duplex!!!
0011  *  Note: 16-bit wide is assigned to first direction which made request.
0012  *        With full duplex - playback is preferred with abstract layer.
0013  *
0014  *  Note: Some chip revisions have hardware bug. Changing capture
0015  *        channel from full-duplex 8bit DMA to 16bit DMA will block
0016  *        16bit DMA transfers from DSP chip (capture) until 8bit transfer
0017  *        to DSP chip (playback) starts. This bug can be avoided with
0018  *        "16bit DMA Allocation" setting set to Playback or Capture.
0019  */
0020 
0021 #include <linux/io.h>
0022 #include <asm/dma.h>
0023 #include <linux/init.h>
0024 #include <linux/time.h>
0025 #include <linux/module.h>
0026 #include <sound/core.h>
0027 #include <sound/sb.h>
0028 #include <sound/sb16_csp.h>
0029 #include <sound/mpu401.h>
0030 #include <sound/control.h>
0031 #include <sound/info.h>
0032 
0033 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
0034 MODULE_DESCRIPTION("Routines for control of 16-bit SoundBlaster cards and clones");
0035 MODULE_LICENSE("GPL");
0036 
0037 #define runtime_format_bits(runtime) \
0038     ((unsigned int)pcm_format_to_bits((runtime)->format))
0039 
0040 #ifdef CONFIG_SND_SB16_CSP
0041 static void snd_sb16_csp_playback_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
0042 {
0043     if (chip->hardware == SB_HW_16CSP) {
0044         struct snd_sb_csp *csp = chip->csp;
0045 
0046         if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
0047             /* manually loaded codec */
0048             if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) &&
0049                 (runtime_format_bits(runtime) == csp->acc_format)) {
0050                 /* Supported runtime PCM format for playback */
0051                 if (csp->ops.csp_use(csp) == 0) {
0052                     /* If CSP was successfully acquired */
0053                     goto __start_CSP;
0054                 }
0055             } else if ((csp->mode & SNDRV_SB_CSP_MODE_QSOUND) && (csp->q_enabled)) {
0056                 /* QSound decoder is loaded and enabled */
0057                 if (runtime_format_bits(runtime) & (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
0058                                   SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE)) {
0059                     /* Only for simple PCM formats */
0060                     if (csp->ops.csp_use(csp) == 0) {
0061                         /* If CSP was successfully acquired */
0062                         goto __start_CSP;
0063                     }
0064                 }
0065             }
0066         } else if (csp->ops.csp_use(csp) == 0) {
0067             /* Acquire CSP and try to autoload hardware codec */
0068             if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_WRITE)) {
0069                 /* Unsupported format, release CSP */
0070                 csp->ops.csp_unuse(csp);
0071             } else {
0072               __start_CSP:
0073                 /* Try to start CSP */
0074                 if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_PLAYBACK_16) ?
0075                                SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
0076                                (runtime->channels > 1) ?
0077                                SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
0078                     /* Failed, release CSP */
0079                     csp->ops.csp_unuse(csp);
0080                 } else {
0081                     /* Success, CSP acquired and running */
0082                     chip->open = SNDRV_SB_CSP_MODE_DSP_WRITE;
0083                 }
0084             }
0085         }
0086     }
0087 }
0088 
0089 static void snd_sb16_csp_capture_prepare(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
0090 {
0091     if (chip->hardware == SB_HW_16CSP) {
0092         struct snd_sb_csp *csp = chip->csp;
0093 
0094         if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
0095             /* manually loaded codec */
0096             if ((csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) &&
0097                 (runtime_format_bits(runtime) == csp->acc_format)) {
0098                 /* Supported runtime PCM format for capture */
0099                 if (csp->ops.csp_use(csp) == 0) {
0100                     /* If CSP was successfully acquired */
0101                     goto __start_CSP;
0102                 }
0103             }
0104         } else if (csp->ops.csp_use(csp) == 0) {
0105             /* Acquire CSP and try to autoload hardware codec */
0106             if (csp->ops.csp_autoload(csp, runtime->format, SNDRV_SB_CSP_MODE_DSP_READ)) {
0107                 /* Unsupported format, release CSP */
0108                 csp->ops.csp_unuse(csp);
0109             } else {
0110               __start_CSP:
0111                 /* Try to start CSP */
0112                 if (csp->ops.csp_start(csp, (chip->mode & SB_MODE_CAPTURE_16) ?
0113                                SNDRV_SB_CSP_SAMPLE_16BIT : SNDRV_SB_CSP_SAMPLE_8BIT,
0114                                (runtime->channels > 1) ?
0115                                SNDRV_SB_CSP_STEREO : SNDRV_SB_CSP_MONO)) {
0116                     /* Failed, release CSP */
0117                     csp->ops.csp_unuse(csp);
0118                 } else {
0119                     /* Success, CSP acquired and running */
0120                     chip->open = SNDRV_SB_CSP_MODE_DSP_READ;
0121                 }
0122             }
0123         }
0124     }
0125 }
0126 
0127 static void snd_sb16_csp_update(struct snd_sb *chip)
0128 {
0129     if (chip->hardware == SB_HW_16CSP) {
0130         struct snd_sb_csp *csp = chip->csp;
0131 
0132         if (csp->qpos_changed) {
0133             spin_lock(&chip->reg_lock);
0134             csp->ops.csp_qsound_transfer (csp);
0135             spin_unlock(&chip->reg_lock);
0136         }
0137     }
0138 }
0139 
0140 static void snd_sb16_csp_playback_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
0141 {
0142     /* CSP decoders (QSound excluded) support only 16bit transfers */
0143     if (chip->hardware == SB_HW_16CSP) {
0144         struct snd_sb_csp *csp = chip->csp;
0145 
0146         if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
0147             /* manually loaded codec */
0148             if (csp->mode & SNDRV_SB_CSP_MODE_DSP_WRITE) {
0149                 runtime->hw.formats |= csp->acc_format;
0150             }
0151         } else {
0152             /* autoloaded codecs */
0153             runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
0154                            SNDRV_PCM_FMTBIT_IMA_ADPCM;
0155         }
0156     }
0157 }
0158 
0159 static void snd_sb16_csp_playback_close(struct snd_sb *chip)
0160 {
0161     if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_WRITE)) {
0162         struct snd_sb_csp *csp = chip->csp;
0163 
0164         if (csp->ops.csp_stop(csp) == 0) {
0165             csp->ops.csp_unuse(csp);
0166             chip->open = 0;
0167         }
0168     }
0169 }
0170 
0171 static void snd_sb16_csp_capture_open(struct snd_sb *chip, struct snd_pcm_runtime *runtime)
0172 {
0173     /* CSP coders support only 16bit transfers */
0174     if (chip->hardware == SB_HW_16CSP) {
0175         struct snd_sb_csp *csp = chip->csp;
0176 
0177         if (csp->running & SNDRV_SB_CSP_ST_LOADED) {
0178             /* manually loaded codec */
0179             if (csp->mode & SNDRV_SB_CSP_MODE_DSP_READ) {
0180                 runtime->hw.formats |= csp->acc_format;
0181             }
0182         } else {
0183             /* autoloaded codecs */
0184             runtime->hw.formats |= SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
0185                            SNDRV_PCM_FMTBIT_IMA_ADPCM;
0186         }
0187     }
0188 }
0189 
0190 static void snd_sb16_csp_capture_close(struct snd_sb *chip)
0191 {
0192     if ((chip->hardware == SB_HW_16CSP) && (chip->open == SNDRV_SB_CSP_MODE_DSP_READ)) {
0193         struct snd_sb_csp *csp = chip->csp;
0194 
0195         if (csp->ops.csp_stop(csp) == 0) {
0196             csp->ops.csp_unuse(csp);
0197             chip->open = 0;
0198         }
0199     }
0200 }
0201 #else
0202 #define snd_sb16_csp_playback_prepare(chip, runtime)    /*nop*/
0203 #define snd_sb16_csp_capture_prepare(chip, runtime) /*nop*/
0204 #define snd_sb16_csp_update(chip)           /*nop*/
0205 #define snd_sb16_csp_playback_open(chip, runtime)   /*nop*/
0206 #define snd_sb16_csp_playback_close(chip)       /*nop*/
0207 #define snd_sb16_csp_capture_open(chip, runtime)    /*nop*/
0208 #define snd_sb16_csp_capture_close(chip)            /*nop*/
0209 #endif
0210 
0211 
0212 static void snd_sb16_setup_rate(struct snd_sb *chip,
0213                 unsigned short rate,
0214                 int channel)
0215 {
0216     unsigned long flags;
0217 
0218     spin_lock_irqsave(&chip->reg_lock, flags);
0219     if (chip->mode & (channel == SNDRV_PCM_STREAM_PLAYBACK ? SB_MODE_PLAYBACK_16 : SB_MODE_CAPTURE_16))
0220         snd_sb_ack_16bit(chip);
0221     else
0222         snd_sb_ack_8bit(chip);
0223     if (!(chip->mode & SB_RATE_LOCK)) {
0224         chip->locked_rate = rate;
0225         snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_IN);
0226         snd_sbdsp_command(chip, rate >> 8);
0227         snd_sbdsp_command(chip, rate & 0xff);
0228         snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
0229         snd_sbdsp_command(chip, rate >> 8);
0230         snd_sbdsp_command(chip, rate & 0xff);
0231     }
0232     spin_unlock_irqrestore(&chip->reg_lock, flags);
0233 }
0234 
0235 static int snd_sb16_playback_prepare(struct snd_pcm_substream *substream)
0236 {
0237     unsigned long flags;
0238     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0239     struct snd_pcm_runtime *runtime = substream->runtime;
0240     unsigned char format;
0241     unsigned int size, count, dma;
0242 
0243     snd_sb16_csp_playback_prepare(chip, runtime);
0244     if (snd_pcm_format_unsigned(runtime->format) > 0) {
0245         format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
0246     } else {
0247         format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
0248     }
0249 
0250     snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_PLAYBACK);
0251     size = chip->p_dma_size = snd_pcm_lib_buffer_bytes(substream);
0252     dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
0253     snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
0254 
0255     count = snd_pcm_lib_period_bytes(substream);
0256     spin_lock_irqsave(&chip->reg_lock, flags);
0257     if (chip->mode & SB_MODE_PLAYBACK_16) {
0258         count >>= 1;
0259         count--;
0260         snd_sbdsp_command(chip, SB_DSP4_OUT16_AI);
0261         snd_sbdsp_command(chip, format);
0262         snd_sbdsp_command(chip, count & 0xff);
0263         snd_sbdsp_command(chip, count >> 8);
0264         snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
0265     } else {
0266         count--;
0267         snd_sbdsp_command(chip, SB_DSP4_OUT8_AI);
0268         snd_sbdsp_command(chip, format);
0269         snd_sbdsp_command(chip, count & 0xff);
0270         snd_sbdsp_command(chip, count >> 8);
0271         snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
0272     }
0273     spin_unlock_irqrestore(&chip->reg_lock, flags);
0274     return 0;
0275 }
0276 
0277 static int snd_sb16_playback_trigger(struct snd_pcm_substream *substream,
0278                      int cmd)
0279 {
0280     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0281     int result = 0;
0282 
0283     spin_lock(&chip->reg_lock);
0284     switch (cmd) {
0285     case SNDRV_PCM_TRIGGER_START:
0286     case SNDRV_PCM_TRIGGER_RESUME:
0287         chip->mode |= SB_RATE_LOCK_PLAYBACK;
0288         snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
0289         break;
0290     case SNDRV_PCM_TRIGGER_STOP:
0291     case SNDRV_PCM_TRIGGER_SUSPEND:
0292         snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
0293         /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
0294         if (chip->mode & SB_RATE_LOCK_CAPTURE)
0295             snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
0296         chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
0297         break;
0298     default:
0299         result = -EINVAL;
0300     }
0301     spin_unlock(&chip->reg_lock);
0302     return result;
0303 }
0304 
0305 static int snd_sb16_capture_prepare(struct snd_pcm_substream *substream)
0306 {
0307     unsigned long flags;
0308     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0309     struct snd_pcm_runtime *runtime = substream->runtime;
0310     unsigned char format;
0311     unsigned int size, count, dma;
0312 
0313     snd_sb16_csp_capture_prepare(chip, runtime);
0314     if (snd_pcm_format_unsigned(runtime->format) > 0) {
0315         format = runtime->channels > 1 ? SB_DSP4_MODE_UNS_STEREO : SB_DSP4_MODE_UNS_MONO;
0316     } else {
0317         format = runtime->channels > 1 ? SB_DSP4_MODE_SIGN_STEREO : SB_DSP4_MODE_SIGN_MONO;
0318     }
0319     snd_sb16_setup_rate(chip, runtime->rate, SNDRV_PCM_STREAM_CAPTURE);
0320     size = chip->c_dma_size = snd_pcm_lib_buffer_bytes(substream);
0321     dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
0322     snd_dma_program(dma, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
0323 
0324     count = snd_pcm_lib_period_bytes(substream);
0325     spin_lock_irqsave(&chip->reg_lock, flags);
0326     if (chip->mode & SB_MODE_CAPTURE_16) {
0327         count >>= 1;
0328         count--;
0329         snd_sbdsp_command(chip, SB_DSP4_IN16_AI);
0330         snd_sbdsp_command(chip, format);
0331         snd_sbdsp_command(chip, count & 0xff);
0332         snd_sbdsp_command(chip, count >> 8);
0333         snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
0334     } else {
0335         count--;
0336         snd_sbdsp_command(chip, SB_DSP4_IN8_AI);
0337         snd_sbdsp_command(chip, format);
0338         snd_sbdsp_command(chip, count & 0xff);
0339         snd_sbdsp_command(chip, count >> 8);
0340         snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
0341     }
0342     spin_unlock_irqrestore(&chip->reg_lock, flags);
0343     return 0;
0344 }
0345 
0346 static int snd_sb16_capture_trigger(struct snd_pcm_substream *substream,
0347                     int cmd)
0348 {
0349     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0350     int result = 0;
0351 
0352     spin_lock(&chip->reg_lock);
0353     switch (cmd) {
0354     case SNDRV_PCM_TRIGGER_START:
0355     case SNDRV_PCM_TRIGGER_RESUME:
0356         chip->mode |= SB_RATE_LOCK_CAPTURE;
0357         snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
0358         break;
0359     case SNDRV_PCM_TRIGGER_STOP:
0360     case SNDRV_PCM_TRIGGER_SUSPEND:
0361         snd_sbdsp_command(chip, chip->mode & SB_MODE_CAPTURE_16 ? SB_DSP_DMA16_OFF : SB_DSP_DMA8_OFF);
0362         /* next two lines are needed for some types of DSP4 (SB AWE 32 - 4.13) */
0363         if (chip->mode & SB_RATE_LOCK_PLAYBACK)
0364             snd_sbdsp_command(chip, chip->mode & SB_MODE_PLAYBACK_16 ? SB_DSP_DMA16_ON : SB_DSP_DMA8_ON);
0365         chip->mode &= ~SB_RATE_LOCK_CAPTURE;
0366         break;
0367     default:
0368         result = -EINVAL;
0369     }
0370     spin_unlock(&chip->reg_lock);
0371     return result;
0372 }
0373 
0374 irqreturn_t snd_sb16dsp_interrupt(int irq, void *dev_id)
0375 {
0376     struct snd_sb *chip = dev_id;
0377     unsigned char status;
0378     int ok;
0379 
0380     spin_lock(&chip->mixer_lock);
0381     status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
0382     spin_unlock(&chip->mixer_lock);
0383     if ((status & SB_IRQTYPE_MPUIN) && chip->rmidi_callback)
0384         chip->rmidi_callback(irq, chip->rmidi->private_data);
0385     if (status & SB_IRQTYPE_8BIT) {
0386         ok = 0;
0387         if (chip->mode & SB_MODE_PLAYBACK_8) {
0388             snd_pcm_period_elapsed(chip->playback_substream);
0389             snd_sb16_csp_update(chip);
0390             ok++;
0391         }
0392         if (chip->mode & SB_MODE_CAPTURE_8) {
0393             snd_pcm_period_elapsed(chip->capture_substream);
0394             ok++;
0395         }
0396         spin_lock(&chip->reg_lock);
0397         if (!ok)
0398             snd_sbdsp_command(chip, SB_DSP_DMA8_OFF);
0399         snd_sb_ack_8bit(chip);
0400         spin_unlock(&chip->reg_lock);
0401     }
0402     if (status & SB_IRQTYPE_16BIT) {
0403         ok = 0;
0404         if (chip->mode & SB_MODE_PLAYBACK_16) {
0405             snd_pcm_period_elapsed(chip->playback_substream);
0406             snd_sb16_csp_update(chip);
0407             ok++;
0408         }
0409         if (chip->mode & SB_MODE_CAPTURE_16) {
0410             snd_pcm_period_elapsed(chip->capture_substream);
0411             ok++;
0412         }
0413         spin_lock(&chip->reg_lock);
0414         if (!ok)
0415             snd_sbdsp_command(chip, SB_DSP_DMA16_OFF);
0416         snd_sb_ack_16bit(chip);
0417         spin_unlock(&chip->reg_lock);
0418     }
0419     return IRQ_HANDLED;
0420 }
0421 
0422 /*
0423 
0424  */
0425 
0426 static snd_pcm_uframes_t snd_sb16_playback_pointer(struct snd_pcm_substream *substream)
0427 {
0428     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0429     unsigned int dma;
0430     size_t ptr;
0431 
0432     dma = (chip->mode & SB_MODE_PLAYBACK_8) ? chip->dma8 : chip->dma16;
0433     ptr = snd_dma_pointer(dma, chip->p_dma_size);
0434     return bytes_to_frames(substream->runtime, ptr);
0435 }
0436 
0437 static snd_pcm_uframes_t snd_sb16_capture_pointer(struct snd_pcm_substream *substream)
0438 {
0439     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0440     unsigned int dma;
0441     size_t ptr;
0442 
0443     dma = (chip->mode & SB_MODE_CAPTURE_8) ? chip->dma8 : chip->dma16;
0444     ptr = snd_dma_pointer(dma, chip->c_dma_size);
0445     return bytes_to_frames(substream->runtime, ptr);
0446 }
0447 
0448 /*
0449 
0450  */
0451 
0452 static const struct snd_pcm_hardware snd_sb16_playback =
0453 {
0454     .info =         (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
0455                  SNDRV_PCM_INFO_MMAP_VALID),
0456     .formats =      0,
0457     .rates =        SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
0458     .rate_min =     4000,
0459     .rate_max =     44100,
0460     .channels_min =     1,
0461     .channels_max =     2,
0462     .buffer_bytes_max = (128*1024),
0463     .period_bytes_min = 64,
0464     .period_bytes_max = (128*1024),
0465     .periods_min =      1,
0466     .periods_max =      1024,
0467     .fifo_size =        0,
0468 };
0469 
0470 static const struct snd_pcm_hardware snd_sb16_capture =
0471 {
0472     .info =         (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
0473                  SNDRV_PCM_INFO_MMAP_VALID),
0474     .formats =      0,
0475     .rates =        SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_44100,
0476     .rate_min =     4000,
0477     .rate_max =     44100,
0478     .channels_min =     1,
0479     .channels_max =     2,
0480     .buffer_bytes_max = (128*1024),
0481     .period_bytes_min = 64,
0482     .period_bytes_max = (128*1024),
0483     .periods_min =      1,
0484     .periods_max =      1024,
0485     .fifo_size =        0,
0486 };
0487 
0488 /*
0489  *  open/close
0490  */
0491 
0492 static int snd_sb16_playback_open(struct snd_pcm_substream *substream)
0493 {
0494     unsigned long flags;
0495     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0496     struct snd_pcm_runtime *runtime = substream->runtime;
0497 
0498     spin_lock_irqsave(&chip->open_lock, flags);
0499     if (chip->mode & SB_MODE_PLAYBACK) {
0500         spin_unlock_irqrestore(&chip->open_lock, flags);
0501         return -EAGAIN;
0502     }
0503     runtime->hw = snd_sb16_playback;
0504 
0505     /* skip if 16 bit DMA was reserved for capture */
0506     if (chip->force_mode16 & SB_MODE_CAPTURE_16)
0507         goto __skip_16bit;
0508 
0509     if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_CAPTURE_16)) {
0510         chip->mode |= SB_MODE_PLAYBACK_16;
0511         runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
0512         /* Vibra16X hack */
0513         if (chip->dma16 <= 3) {
0514             runtime->hw.buffer_bytes_max =
0515             runtime->hw.period_bytes_max = 64 * 1024;
0516         } else {
0517             snd_sb16_csp_playback_open(chip, runtime);
0518         }
0519         goto __open_ok;
0520     }
0521 
0522       __skip_16bit:
0523     if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_CAPTURE_8)) {
0524         chip->mode |= SB_MODE_PLAYBACK_8;
0525         /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
0526         if (chip->dma16 < 0) {
0527             runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
0528             chip->mode |= SB_MODE_PLAYBACK_16;
0529         } else {
0530             runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
0531         }
0532         runtime->hw.buffer_bytes_max =
0533         runtime->hw.period_bytes_max = 64 * 1024;
0534         goto __open_ok;
0535     }
0536     spin_unlock_irqrestore(&chip->open_lock, flags);
0537     return -EAGAIN;
0538 
0539       __open_ok:
0540     if (chip->hardware == SB_HW_ALS100)
0541         runtime->hw.rate_max = 48000;
0542     if (chip->hardware == SB_HW_CS5530) {
0543         runtime->hw.buffer_bytes_max = 32 * 1024;
0544         runtime->hw.periods_min = 2;
0545         runtime->hw.rate_min = 44100;
0546     }
0547     if (chip->mode & SB_RATE_LOCK)
0548         runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
0549     chip->playback_substream = substream;
0550     spin_unlock_irqrestore(&chip->open_lock, flags);
0551     return 0;
0552 }
0553 
0554 static int snd_sb16_playback_close(struct snd_pcm_substream *substream)
0555 {
0556     unsigned long flags;
0557     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0558 
0559     snd_sb16_csp_playback_close(chip);
0560     spin_lock_irqsave(&chip->open_lock, flags);
0561     chip->playback_substream = NULL;
0562     chip->mode &= ~SB_MODE_PLAYBACK;
0563     spin_unlock_irqrestore(&chip->open_lock, flags);
0564     return 0;
0565 }
0566 
0567 static int snd_sb16_capture_open(struct snd_pcm_substream *substream)
0568 {
0569     unsigned long flags;
0570     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0571     struct snd_pcm_runtime *runtime = substream->runtime;
0572 
0573     spin_lock_irqsave(&chip->open_lock, flags);
0574     if (chip->mode & SB_MODE_CAPTURE) {
0575         spin_unlock_irqrestore(&chip->open_lock, flags);
0576         return -EAGAIN;
0577     }
0578     runtime->hw = snd_sb16_capture;
0579 
0580     /* skip if 16 bit DMA was reserved for playback */
0581     if (chip->force_mode16 & SB_MODE_PLAYBACK_16)
0582         goto __skip_16bit;
0583 
0584     if (chip->dma16 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_16)) {
0585         chip->mode |= SB_MODE_CAPTURE_16;
0586         runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
0587         /* Vibra16X hack */
0588         if (chip->dma16 <= 3) {
0589             runtime->hw.buffer_bytes_max =
0590             runtime->hw.period_bytes_max = 64 * 1024;
0591         } else {
0592             snd_sb16_csp_capture_open(chip, runtime);
0593         }
0594         goto __open_ok;
0595     }
0596 
0597       __skip_16bit:
0598     if (chip->dma8 >= 0 && !(chip->mode & SB_MODE_PLAYBACK_8)) {
0599         chip->mode |= SB_MODE_CAPTURE_8;
0600         /* DSP v 4.xx can transfer 16bit data through 8bit DMA channel, SBHWPG 2-7 */
0601         if (chip->dma16 < 0) {
0602             runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE;
0603             chip->mode |= SB_MODE_CAPTURE_16;
0604         } else {
0605             runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S8;
0606         }
0607         runtime->hw.buffer_bytes_max =
0608         runtime->hw.period_bytes_max = 64 * 1024;
0609         goto __open_ok;
0610     }
0611     spin_unlock_irqrestore(&chip->open_lock, flags);
0612     return -EAGAIN;
0613 
0614       __open_ok:
0615     if (chip->hardware == SB_HW_ALS100)
0616         runtime->hw.rate_max = 48000;
0617     if (chip->hardware == SB_HW_CS5530) {
0618         runtime->hw.buffer_bytes_max = 32 * 1024;
0619         runtime->hw.periods_min = 2;
0620         runtime->hw.rate_min = 44100;
0621     }
0622     if (chip->mode & SB_RATE_LOCK)
0623         runtime->hw.rate_min = runtime->hw.rate_max = chip->locked_rate;
0624     chip->capture_substream = substream;
0625     spin_unlock_irqrestore(&chip->open_lock, flags);
0626     return 0;
0627 }
0628 
0629 static int snd_sb16_capture_close(struct snd_pcm_substream *substream)
0630 {
0631     unsigned long flags;
0632     struct snd_sb *chip = snd_pcm_substream_chip(substream);
0633 
0634     snd_sb16_csp_capture_close(chip);
0635     spin_lock_irqsave(&chip->open_lock, flags);
0636     chip->capture_substream = NULL;
0637     chip->mode &= ~SB_MODE_CAPTURE;
0638     spin_unlock_irqrestore(&chip->open_lock, flags);
0639     return 0;
0640 }
0641 
0642 /*
0643  *  DMA control interface
0644  */
0645 
0646 static int snd_sb16_set_dma_mode(struct snd_sb *chip, int what)
0647 {
0648     if (chip->dma8 < 0 || chip->dma16 < 0) {
0649         if (snd_BUG_ON(what))
0650             return -EINVAL;
0651         return 0;
0652     }
0653     if (what == 0) {
0654         chip->force_mode16 = 0;
0655     } else if (what == 1) {
0656         chip->force_mode16 = SB_MODE_PLAYBACK_16;
0657     } else if (what == 2) {
0658         chip->force_mode16 = SB_MODE_CAPTURE_16;
0659     } else {
0660         return -EINVAL;
0661     }
0662     return 0;
0663 }
0664 
0665 static int snd_sb16_get_dma_mode(struct snd_sb *chip)
0666 {
0667     if (chip->dma8 < 0 || chip->dma16 < 0)
0668         return 0;
0669     switch (chip->force_mode16) {
0670     case SB_MODE_PLAYBACK_16:
0671         return 1;
0672     case SB_MODE_CAPTURE_16:
0673         return 2;
0674     default:
0675         return 0;
0676     }
0677 }
0678 
0679 static int snd_sb16_dma_control_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0680 {
0681     static const char * const texts[3] = {
0682         "Auto", "Playback", "Capture"
0683     };
0684 
0685     return snd_ctl_enum_info(uinfo, 1, 3, texts);
0686 }
0687 
0688 static int snd_sb16_dma_control_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0689 {
0690     struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
0691     unsigned long flags;
0692     
0693     spin_lock_irqsave(&chip->reg_lock, flags);
0694     ucontrol->value.enumerated.item[0] = snd_sb16_get_dma_mode(chip);
0695     spin_unlock_irqrestore(&chip->reg_lock, flags);
0696     return 0;
0697 }
0698 
0699 static int snd_sb16_dma_control_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0700 {
0701     struct snd_sb *chip = snd_kcontrol_chip(kcontrol);
0702     unsigned long flags;
0703     unsigned char nval, oval;
0704     int change;
0705     
0706     nval = ucontrol->value.enumerated.item[0];
0707     if (nval > 2)
0708         return -EINVAL;
0709     spin_lock_irqsave(&chip->reg_lock, flags);
0710     oval = snd_sb16_get_dma_mode(chip);
0711     change = nval != oval;
0712     snd_sb16_set_dma_mode(chip, nval);
0713     spin_unlock_irqrestore(&chip->reg_lock, flags);
0714     return change;
0715 }
0716 
0717 static const struct snd_kcontrol_new snd_sb16_dma_control = {
0718     .iface = SNDRV_CTL_ELEM_IFACE_CARD,
0719     .name = "16-bit DMA Allocation",
0720     .info = snd_sb16_dma_control_info,
0721     .get = snd_sb16_dma_control_get,
0722     .put = snd_sb16_dma_control_put
0723 };
0724 
0725 /*
0726  *  Initialization part
0727  */
0728  
0729 int snd_sb16dsp_configure(struct snd_sb * chip)
0730 {
0731     unsigned long flags;
0732     unsigned char irqreg = 0, dmareg = 0, mpureg;
0733     unsigned char realirq, realdma, realmpureg;
0734     /* note: mpu register should be present only on SB16 Vibra soundcards */
0735 
0736     // printk(KERN_DEBUG "codec->irq=%i, codec->dma8=%i, codec->dma16=%i\n", chip->irq, chip->dma8, chip->dma16);
0737     spin_lock_irqsave(&chip->mixer_lock, flags);
0738     mpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP) & ~0x06;
0739     spin_unlock_irqrestore(&chip->mixer_lock, flags);
0740     switch (chip->irq) {
0741     case 2:
0742     case 9:
0743         irqreg |= SB_IRQSETUP_IRQ9;
0744         break;
0745     case 5:
0746         irqreg |= SB_IRQSETUP_IRQ5;
0747         break;
0748     case 7:
0749         irqreg |= SB_IRQSETUP_IRQ7;
0750         break;
0751     case 10:
0752         irqreg |= SB_IRQSETUP_IRQ10;
0753         break;
0754     default:
0755         return -EINVAL;
0756     }
0757     if (chip->dma8 >= 0) {
0758         switch (chip->dma8) {
0759         case 0:
0760             dmareg |= SB_DMASETUP_DMA0;
0761             break;
0762         case 1:
0763             dmareg |= SB_DMASETUP_DMA1;
0764             break;
0765         case 3:
0766             dmareg |= SB_DMASETUP_DMA3;
0767             break;
0768         default:
0769             return -EINVAL;
0770         }
0771     }
0772     if (chip->dma16 >= 0 && chip->dma16 != chip->dma8) {
0773         switch (chip->dma16) {
0774         case 5:
0775             dmareg |= SB_DMASETUP_DMA5;
0776             break;
0777         case 6:
0778             dmareg |= SB_DMASETUP_DMA6;
0779             break;
0780         case 7:
0781             dmareg |= SB_DMASETUP_DMA7;
0782             break;
0783         default:
0784             return -EINVAL;
0785         }
0786     }
0787     switch (chip->mpu_port) {
0788     case 0x300:
0789         mpureg |= 0x04;
0790         break;
0791     case 0x330:
0792         mpureg |= 0x00;
0793         break;
0794     default:
0795         mpureg |= 0x02; /* disable MPU */
0796     }
0797     spin_lock_irqsave(&chip->mixer_lock, flags);
0798 
0799     snd_sbmixer_write(chip, SB_DSP4_IRQSETUP, irqreg);
0800     realirq = snd_sbmixer_read(chip, SB_DSP4_IRQSETUP);
0801 
0802     snd_sbmixer_write(chip, SB_DSP4_DMASETUP, dmareg);
0803     realdma = snd_sbmixer_read(chip, SB_DSP4_DMASETUP);
0804 
0805     snd_sbmixer_write(chip, SB_DSP4_MPUSETUP, mpureg);
0806     realmpureg = snd_sbmixer_read(chip, SB_DSP4_MPUSETUP);
0807 
0808     spin_unlock_irqrestore(&chip->mixer_lock, flags);
0809     if ((~realirq) & irqreg || (~realdma) & dmareg) {
0810         snd_printk(KERN_ERR "SB16 [0x%lx]: unable to set DMA & IRQ (PnP device?)\n", chip->port);
0811         snd_printk(KERN_ERR "SB16 [0x%lx]: wanted: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, realirq, realdma, realmpureg);
0812         snd_printk(KERN_ERR "SB16 [0x%lx]:    got: irqreg=0x%x, dmareg=0x%x, mpureg = 0x%x\n", chip->port, irqreg, dmareg, mpureg);
0813         return -ENODEV;
0814     }
0815     return 0;
0816 }
0817 
0818 static const struct snd_pcm_ops snd_sb16_playback_ops = {
0819     .open =     snd_sb16_playback_open,
0820     .close =    snd_sb16_playback_close,
0821     .prepare =  snd_sb16_playback_prepare,
0822     .trigger =  snd_sb16_playback_trigger,
0823     .pointer =  snd_sb16_playback_pointer,
0824 };
0825 
0826 static const struct snd_pcm_ops snd_sb16_capture_ops = {
0827     .open =     snd_sb16_capture_open,
0828     .close =    snd_sb16_capture_close,
0829     .prepare =  snd_sb16_capture_prepare,
0830     .trigger =  snd_sb16_capture_trigger,
0831     .pointer =  snd_sb16_capture_pointer,
0832 };
0833 
0834 int snd_sb16dsp_pcm(struct snd_sb *chip, int device)
0835 {
0836     struct snd_card *card = chip->card;
0837     struct snd_pcm *pcm;
0838     int err;
0839 
0840     err = snd_pcm_new(card, "SB16 DSP", device, 1, 1, &pcm);
0841     if (err < 0)
0842         return err;
0843     sprintf(pcm->name, "DSP v%i.%i", chip->version >> 8, chip->version & 0xff);
0844     pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
0845     pcm->private_data = chip;
0846     chip->pcm = pcm;
0847 
0848     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_sb16_playback_ops);
0849     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_sb16_capture_ops);
0850 
0851     if (chip->dma16 >= 0 && chip->dma8 != chip->dma16)
0852         snd_ctl_add(card, snd_ctl_new1(&snd_sb16_dma_control, chip));
0853     else
0854         pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
0855 
0856     snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
0857                        card->dev, 64*1024, 128*1024);
0858     return 0;
0859 }
0860 
0861 const struct snd_pcm_ops *snd_sb16dsp_get_pcm_ops(int direction)
0862 {
0863     return direction == SNDRV_PCM_STREAM_PLAYBACK ?
0864         &snd_sb16_playback_ops : &snd_sb16_capture_ops;
0865 }
0866 
0867 EXPORT_SYMBOL(snd_sb16dsp_pcm);
0868 EXPORT_SYMBOL(snd_sb16dsp_get_pcm_ops);
0869 EXPORT_SYMBOL(snd_sb16dsp_configure);
0870 EXPORT_SYMBOL(snd_sb16dsp_interrupt);
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