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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Routines for GF1 DMA control
0004  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
0005  */
0006 
0007 #include <asm/dma.h>
0008 #include <linux/slab.h>
0009 #include <sound/core.h>
0010 #include <sound/gus.h>
0011 
0012 static void snd_gf1_dma_ack(struct snd_gus_card * gus)
0013 {
0014     unsigned long flags;
0015 
0016     spin_lock_irqsave(&gus->reg_lock, flags);
0017     snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, 0x00);
0018     snd_gf1_look8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL);
0019     spin_unlock_irqrestore(&gus->reg_lock, flags);
0020 }
0021 
0022 static void snd_gf1_dma_program(struct snd_gus_card * gus,
0023                 unsigned int addr,
0024                 unsigned long buf_addr,
0025                 unsigned int count,
0026                 unsigned int cmd)
0027 {
0028     unsigned long flags;
0029     unsigned int address;
0030     unsigned char dma_cmd;
0031     unsigned int address_high;
0032 
0033     snd_printdd("dma_transfer: addr=0x%x, buf=0x%lx, count=0x%x\n",
0034             addr, buf_addr, count);
0035 
0036     if (gus->gf1.dma1 > 3) {
0037         if (gus->gf1.enh_mode) {
0038             address = addr >> 1;
0039         } else {
0040             if (addr & 0x1f) {
0041                 snd_printd("snd_gf1_dma_transfer: unaligned address (0x%x)?\n", addr);
0042                 return;
0043             }
0044             address = (addr & 0x000c0000) | ((addr & 0x0003ffff) >> 1);
0045         }
0046     } else {
0047         address = addr;
0048     }
0049 
0050     dma_cmd = SNDRV_GF1_DMA_ENABLE | (unsigned short) cmd;
0051 #if 0
0052     dma_cmd |= 0x08;
0053 #endif
0054     if (dma_cmd & SNDRV_GF1_DMA_16BIT) {
0055         count++;
0056         count &= ~1;    /* align */
0057     }
0058     if (gus->gf1.dma1 > 3) {
0059         dma_cmd |= SNDRV_GF1_DMA_WIDTH16;
0060         count++;
0061         count &= ~1;    /* align */
0062     }
0063     snd_gf1_dma_ack(gus);
0064     snd_dma_program(gus->gf1.dma1, buf_addr, count, dma_cmd & SNDRV_GF1_DMA_READ ? DMA_MODE_READ : DMA_MODE_WRITE);
0065 #if 0
0066     snd_printk(KERN_DEBUG "address = 0x%x, count = 0x%x, dma_cmd = 0x%x\n",
0067            address << 1, count, dma_cmd);
0068 #endif
0069     spin_lock_irqsave(&gus->reg_lock, flags);
0070     if (gus->gf1.enh_mode) {
0071         address_high = ((address >> 16) & 0x000000f0) | (address & 0x0000000f);
0072         snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
0073         snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_HIGH, (unsigned char) address_high);
0074     } else
0075         snd_gf1_write16(gus, SNDRV_GF1_GW_DRAM_DMA_LOW, (unsigned short) (address >> 4));
0076     snd_gf1_write8(gus, SNDRV_GF1_GB_DRAM_DMA_CONTROL, dma_cmd);
0077     spin_unlock_irqrestore(&gus->reg_lock, flags);
0078 }
0079 
0080 static struct snd_gf1_dma_block *snd_gf1_dma_next_block(struct snd_gus_card * gus)
0081 {
0082     struct snd_gf1_dma_block *block;
0083 
0084     /* PCM block have bigger priority than synthesizer one */
0085     if (gus->gf1.dma_data_pcm) {
0086         block = gus->gf1.dma_data_pcm;
0087         if (gus->gf1.dma_data_pcm_last == block) {
0088             gus->gf1.dma_data_pcm =
0089             gus->gf1.dma_data_pcm_last = NULL;
0090         } else {
0091             gus->gf1.dma_data_pcm = block->next;
0092         }
0093     } else if (gus->gf1.dma_data_synth) {
0094         block = gus->gf1.dma_data_synth;
0095         if (gus->gf1.dma_data_synth_last == block) {
0096             gus->gf1.dma_data_synth =
0097             gus->gf1.dma_data_synth_last = NULL;
0098         } else {
0099             gus->gf1.dma_data_synth = block->next;
0100         }
0101     } else {
0102         block = NULL;
0103     }
0104     if (block) {
0105         gus->gf1.dma_ack = block->ack;
0106         gus->gf1.dma_private_data = block->private_data;
0107     }
0108     return block;
0109 }
0110 
0111 
0112 static void snd_gf1_dma_interrupt(struct snd_gus_card * gus)
0113 {
0114     struct snd_gf1_dma_block *block;
0115 
0116     snd_gf1_dma_ack(gus);
0117     if (gus->gf1.dma_ack)
0118         gus->gf1.dma_ack(gus, gus->gf1.dma_private_data);
0119     spin_lock(&gus->dma_lock);
0120     if (gus->gf1.dma_data_pcm == NULL &&
0121         gus->gf1.dma_data_synth == NULL) {
0122             gus->gf1.dma_ack = NULL;
0123         gus->gf1.dma_flags &= ~SNDRV_GF1_DMA_TRIGGER;
0124         spin_unlock(&gus->dma_lock);
0125         return;
0126     }
0127     block = snd_gf1_dma_next_block(gus);
0128     spin_unlock(&gus->dma_lock);
0129     if (!block)
0130         return;
0131     snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
0132     kfree(block);
0133 #if 0
0134     snd_printd(KERN_DEBUG "program dma (IRQ) - "
0135            "addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n",
0136            block->addr, block->buf_addr, block->count, block->cmd);
0137 #endif
0138 }
0139 
0140 int snd_gf1_dma_init(struct snd_gus_card * gus)
0141 {
0142     mutex_lock(&gus->dma_mutex);
0143     gus->gf1.dma_shared++;
0144     if (gus->gf1.dma_shared > 1) {
0145         mutex_unlock(&gus->dma_mutex);
0146         return 0;
0147     }
0148     gus->gf1.interrupt_handler_dma_write = snd_gf1_dma_interrupt;
0149     gus->gf1.dma_data_pcm = 
0150     gus->gf1.dma_data_pcm_last =
0151     gus->gf1.dma_data_synth = 
0152     gus->gf1.dma_data_synth_last = NULL;
0153     mutex_unlock(&gus->dma_mutex);
0154     return 0;
0155 }
0156 
0157 int snd_gf1_dma_done(struct snd_gus_card * gus)
0158 {
0159     struct snd_gf1_dma_block *block;
0160 
0161     mutex_lock(&gus->dma_mutex);
0162     gus->gf1.dma_shared--;
0163     if (!gus->gf1.dma_shared) {
0164         snd_dma_disable(gus->gf1.dma1);
0165         snd_gf1_set_default_handlers(gus, SNDRV_GF1_HANDLER_DMA_WRITE);
0166         snd_gf1_dma_ack(gus);
0167         while ((block = gus->gf1.dma_data_pcm)) {
0168             gus->gf1.dma_data_pcm = block->next;
0169             kfree(block);
0170         }
0171         while ((block = gus->gf1.dma_data_synth)) {
0172             gus->gf1.dma_data_synth = block->next;
0173             kfree(block);
0174         }
0175         gus->gf1.dma_data_pcm_last =
0176         gus->gf1.dma_data_synth_last = NULL;
0177     }
0178     mutex_unlock(&gus->dma_mutex);
0179     return 0;
0180 }
0181 
0182 int snd_gf1_dma_transfer_block(struct snd_gus_card * gus,
0183                    struct snd_gf1_dma_block * __block,
0184                    int atomic,
0185                    int synth)
0186 {
0187     unsigned long flags;
0188     struct snd_gf1_dma_block *block;
0189 
0190     block = kmalloc(sizeof(*block), atomic ? GFP_ATOMIC : GFP_KERNEL);
0191     if (!block)
0192         return -ENOMEM;
0193 
0194     *block = *__block;
0195     block->next = NULL;
0196 
0197     snd_printdd("addr = 0x%x, buffer = 0x%lx, count = 0x%x, cmd = 0x%x\n",
0198             block->addr, (long) block->buffer, block->count,
0199             block->cmd);
0200 
0201     snd_printdd("gus->gf1.dma_data_pcm_last = 0x%lx\n",
0202             (long)gus->gf1.dma_data_pcm_last);
0203     snd_printdd("gus->gf1.dma_data_pcm = 0x%lx\n",
0204             (long)gus->gf1.dma_data_pcm);
0205 
0206     spin_lock_irqsave(&gus->dma_lock, flags);
0207     if (synth) {
0208         if (gus->gf1.dma_data_synth_last) {
0209             gus->gf1.dma_data_synth_last->next = block;
0210             gus->gf1.dma_data_synth_last = block;
0211         } else {
0212             gus->gf1.dma_data_synth = 
0213             gus->gf1.dma_data_synth_last = block;
0214         }
0215     } else {
0216         if (gus->gf1.dma_data_pcm_last) {
0217             gus->gf1.dma_data_pcm_last->next = block;
0218             gus->gf1.dma_data_pcm_last = block;
0219         } else {
0220             gus->gf1.dma_data_pcm = 
0221             gus->gf1.dma_data_pcm_last = block;
0222         }
0223     }
0224     if (!(gus->gf1.dma_flags & SNDRV_GF1_DMA_TRIGGER)) {
0225         gus->gf1.dma_flags |= SNDRV_GF1_DMA_TRIGGER;
0226         block = snd_gf1_dma_next_block(gus);
0227         spin_unlock_irqrestore(&gus->dma_lock, flags);
0228         if (block == NULL)
0229             return 0;
0230         snd_gf1_dma_program(gus, block->addr, block->buf_addr, block->count, (unsigned short) block->cmd);
0231         kfree(block);
0232         return 0;
0233     }
0234     spin_unlock_irqrestore(&gus->dma_lock, flags);
0235     return 0;
0236 }
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