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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     ad1816a.c - lowlevel code for Analog Devices AD1816A chip.
0004     Copyright (C) 1999-2000 by Massimo Piccioni <dafastidio@libero.it>
0005 
0006 */
0007 
0008 #include <linux/delay.h>
0009 #include <linux/init.h>
0010 #include <linux/interrupt.h>
0011 #include <linux/slab.h>
0012 #include <linux/ioport.h>
0013 #include <linux/io.h>
0014 #include <sound/core.h>
0015 #include <sound/tlv.h>
0016 #include <sound/ad1816a.h>
0017 
0018 #include <asm/dma.h>
0019 
0020 static inline int snd_ad1816a_busy_wait(struct snd_ad1816a *chip)
0021 {
0022     int timeout;
0023 
0024     for (timeout = 1000; timeout-- > 0; udelay(10))
0025         if (inb(AD1816A_REG(AD1816A_CHIP_STATUS)) & AD1816A_READY)
0026             return 0;
0027 
0028     snd_printk(KERN_WARNING "chip busy.\n");
0029     return -EBUSY;
0030 }
0031 
0032 static inline unsigned char snd_ad1816a_in(struct snd_ad1816a *chip, unsigned char reg)
0033 {
0034     snd_ad1816a_busy_wait(chip);
0035     return inb(AD1816A_REG(reg));
0036 }
0037 
0038 static inline void snd_ad1816a_out(struct snd_ad1816a *chip, unsigned char reg,
0039                 unsigned char value)
0040 {
0041     snd_ad1816a_busy_wait(chip);
0042     outb(value, AD1816A_REG(reg));
0043 }
0044 
0045 static inline void snd_ad1816a_out_mask(struct snd_ad1816a *chip, unsigned char reg,
0046                  unsigned char mask, unsigned char value)
0047 {
0048     snd_ad1816a_out(chip, reg,
0049         (value & mask) | (snd_ad1816a_in(chip, reg) & ~mask));
0050 }
0051 
0052 static unsigned short snd_ad1816a_read(struct snd_ad1816a *chip, unsigned char reg)
0053 {
0054     snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
0055     return snd_ad1816a_in(chip, AD1816A_INDIR_DATA_LOW) |
0056         (snd_ad1816a_in(chip, AD1816A_INDIR_DATA_HIGH) << 8);
0057 }
0058 
0059 static void snd_ad1816a_write(struct snd_ad1816a *chip, unsigned char reg,
0060                   unsigned short value)
0061 {
0062     snd_ad1816a_out(chip, AD1816A_INDIR_ADDR, reg & 0x3f);
0063     snd_ad1816a_out(chip, AD1816A_INDIR_DATA_LOW, value & 0xff);
0064     snd_ad1816a_out(chip, AD1816A_INDIR_DATA_HIGH, (value >> 8) & 0xff);
0065 }
0066 
0067 static void snd_ad1816a_write_mask(struct snd_ad1816a *chip, unsigned char reg,
0068                    unsigned short mask, unsigned short value)
0069 {
0070     snd_ad1816a_write(chip, reg,
0071         (value & mask) | (snd_ad1816a_read(chip, reg) & ~mask));
0072 }
0073 
0074 
0075 static unsigned char snd_ad1816a_get_format(struct snd_ad1816a *chip,
0076                         snd_pcm_format_t format,
0077                         int channels)
0078 {
0079     unsigned char retval = AD1816A_FMT_LINEAR_8;
0080 
0081     switch (format) {
0082     case SNDRV_PCM_FORMAT_MU_LAW:
0083         retval = AD1816A_FMT_ULAW_8;
0084         break;
0085     case SNDRV_PCM_FORMAT_A_LAW:
0086         retval = AD1816A_FMT_ALAW_8;
0087         break;
0088     case SNDRV_PCM_FORMAT_S16_LE:
0089         retval = AD1816A_FMT_LINEAR_16_LIT;
0090         break;
0091     case SNDRV_PCM_FORMAT_S16_BE:
0092         retval = AD1816A_FMT_LINEAR_16_BIG;
0093     }
0094     return (channels > 1) ? (retval | AD1816A_FMT_STEREO) : retval;
0095 }
0096 
0097 static int snd_ad1816a_open(struct snd_ad1816a *chip, unsigned int mode)
0098 {
0099     unsigned long flags;
0100 
0101     spin_lock_irqsave(&chip->lock, flags);
0102 
0103     if (chip->mode & mode) {
0104         spin_unlock_irqrestore(&chip->lock, flags);
0105         return -EAGAIN;
0106     }
0107 
0108     switch ((mode &= AD1816A_MODE_OPEN)) {
0109     case AD1816A_MODE_PLAYBACK:
0110         snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
0111             AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
0112         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0113             AD1816A_PLAYBACK_IRQ_ENABLE, 0xffff);
0114         break;
0115     case AD1816A_MODE_CAPTURE:
0116         snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
0117             AD1816A_CAPTURE_IRQ_PENDING, 0x00);
0118         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0119             AD1816A_CAPTURE_IRQ_ENABLE, 0xffff);
0120         break;
0121     case AD1816A_MODE_TIMER:
0122         snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
0123             AD1816A_TIMER_IRQ_PENDING, 0x00);
0124         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0125             AD1816A_TIMER_IRQ_ENABLE, 0xffff);
0126     }
0127     chip->mode |= mode;
0128 
0129     spin_unlock_irqrestore(&chip->lock, flags);
0130     return 0;
0131 }
0132 
0133 static void snd_ad1816a_close(struct snd_ad1816a *chip, unsigned int mode)
0134 {
0135     unsigned long flags;
0136 
0137     spin_lock_irqsave(&chip->lock, flags);
0138 
0139     switch ((mode &= AD1816A_MODE_OPEN)) {
0140     case AD1816A_MODE_PLAYBACK:
0141         snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
0142             AD1816A_PLAYBACK_IRQ_PENDING, 0x00);
0143         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0144             AD1816A_PLAYBACK_IRQ_ENABLE, 0x0000);
0145         break;
0146     case AD1816A_MODE_CAPTURE:
0147         snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
0148             AD1816A_CAPTURE_IRQ_PENDING, 0x00);
0149         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0150             AD1816A_CAPTURE_IRQ_ENABLE, 0x0000);
0151         break;
0152     case AD1816A_MODE_TIMER:
0153         snd_ad1816a_out_mask(chip, AD1816A_INTERRUPT_STATUS,
0154             AD1816A_TIMER_IRQ_PENDING, 0x00);
0155         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0156             AD1816A_TIMER_IRQ_ENABLE, 0x0000);
0157     }
0158     chip->mode &= ~mode;
0159     if (!(chip->mode & AD1816A_MODE_OPEN))
0160         chip->mode = 0;
0161 
0162     spin_unlock_irqrestore(&chip->lock, flags);
0163 }
0164 
0165 
0166 static int snd_ad1816a_trigger(struct snd_ad1816a *chip, unsigned char what,
0167                    int channel, int cmd, int iscapture)
0168 {
0169     int error = 0;
0170 
0171     switch (cmd) {
0172     case SNDRV_PCM_TRIGGER_START:
0173     case SNDRV_PCM_TRIGGER_STOP:
0174         spin_lock(&chip->lock);
0175         cmd = (cmd == SNDRV_PCM_TRIGGER_START) ? 0xff: 0x00;
0176         /* if (what & AD1816A_PLAYBACK_ENABLE) */
0177         /* That is not valid, because playback and capture enable
0178          * are the same bit pattern, just to different addresses
0179          */
0180         if (! iscapture)
0181             snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
0182                 AD1816A_PLAYBACK_ENABLE, cmd);
0183         else
0184             snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
0185                 AD1816A_CAPTURE_ENABLE, cmd);
0186         spin_unlock(&chip->lock);
0187         break;
0188     default:
0189         snd_printk(KERN_WARNING "invalid trigger mode 0x%x.\n", what);
0190         error = -EINVAL;
0191     }
0192 
0193     return error;
0194 }
0195 
0196 static int snd_ad1816a_playback_trigger(struct snd_pcm_substream *substream, int cmd)
0197 {
0198     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0199     return snd_ad1816a_trigger(chip, AD1816A_PLAYBACK_ENABLE,
0200                    SNDRV_PCM_STREAM_PLAYBACK, cmd, 0);
0201 }
0202 
0203 static int snd_ad1816a_capture_trigger(struct snd_pcm_substream *substream, int cmd)
0204 {
0205     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0206     return snd_ad1816a_trigger(chip, AD1816A_CAPTURE_ENABLE,
0207                    SNDRV_PCM_STREAM_CAPTURE, cmd, 1);
0208 }
0209 
0210 static int snd_ad1816a_playback_prepare(struct snd_pcm_substream *substream)
0211 {
0212     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0213     unsigned long flags;
0214     struct snd_pcm_runtime *runtime = substream->runtime;
0215     unsigned int size, rate;
0216 
0217     spin_lock_irqsave(&chip->lock, flags);
0218 
0219     chip->p_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
0220     snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
0221         AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
0222 
0223     snd_dma_program(chip->dma1, runtime->dma_addr, size,
0224             DMA_MODE_WRITE | DMA_AUTOINIT);
0225 
0226     rate = runtime->rate;
0227     if (chip->clock_freq)
0228         rate = (rate * 33000) / chip->clock_freq;
0229     snd_ad1816a_write(chip, AD1816A_PLAYBACK_SAMPLE_RATE, rate);
0230     snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
0231         AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
0232         snd_ad1816a_get_format(chip, runtime->format,
0233             runtime->channels));
0234 
0235     snd_ad1816a_write(chip, AD1816A_PLAYBACK_BASE_COUNT,
0236         snd_pcm_lib_period_bytes(substream) / 4 - 1);
0237 
0238     spin_unlock_irqrestore(&chip->lock, flags);
0239     return 0;
0240 }
0241 
0242 static int snd_ad1816a_capture_prepare(struct snd_pcm_substream *substream)
0243 {
0244     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0245     unsigned long flags;
0246     struct snd_pcm_runtime *runtime = substream->runtime;
0247     unsigned int size, rate;
0248 
0249     spin_lock_irqsave(&chip->lock, flags);
0250 
0251     chip->c_dma_size = size = snd_pcm_lib_buffer_bytes(substream);
0252     snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
0253         AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
0254 
0255     snd_dma_program(chip->dma2, runtime->dma_addr, size,
0256             DMA_MODE_READ | DMA_AUTOINIT);
0257 
0258     rate = runtime->rate;
0259     if (chip->clock_freq)
0260         rate = (rate * 33000) / chip->clock_freq;
0261     snd_ad1816a_write(chip, AD1816A_CAPTURE_SAMPLE_RATE, rate);
0262     snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
0263         AD1816A_FMT_ALL | AD1816A_FMT_STEREO,
0264         snd_ad1816a_get_format(chip, runtime->format,
0265             runtime->channels));
0266 
0267     snd_ad1816a_write(chip, AD1816A_CAPTURE_BASE_COUNT,
0268         snd_pcm_lib_period_bytes(substream) / 4 - 1);
0269 
0270     spin_unlock_irqrestore(&chip->lock, flags);
0271     return 0;
0272 }
0273 
0274 
0275 static snd_pcm_uframes_t snd_ad1816a_playback_pointer(struct snd_pcm_substream *substream)
0276 {
0277     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0278     size_t ptr;
0279     if (!(chip->mode & AD1816A_MODE_PLAYBACK))
0280         return 0;
0281     ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
0282     return bytes_to_frames(substream->runtime, ptr);
0283 }
0284 
0285 static snd_pcm_uframes_t snd_ad1816a_capture_pointer(struct snd_pcm_substream *substream)
0286 {
0287     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0288     size_t ptr;
0289     if (!(chip->mode & AD1816A_MODE_CAPTURE))
0290         return 0;
0291     ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
0292     return bytes_to_frames(substream->runtime, ptr);
0293 }
0294 
0295 
0296 static irqreturn_t snd_ad1816a_interrupt(int irq, void *dev_id)
0297 {
0298     struct snd_ad1816a *chip = dev_id;
0299     unsigned char status;
0300 
0301     spin_lock(&chip->lock);
0302     status = snd_ad1816a_in(chip, AD1816A_INTERRUPT_STATUS);
0303     spin_unlock(&chip->lock);
0304 
0305     if ((status & AD1816A_PLAYBACK_IRQ_PENDING) && chip->playback_substream)
0306         snd_pcm_period_elapsed(chip->playback_substream);
0307 
0308     if ((status & AD1816A_CAPTURE_IRQ_PENDING) && chip->capture_substream)
0309         snd_pcm_period_elapsed(chip->capture_substream);
0310 
0311     if ((status & AD1816A_TIMER_IRQ_PENDING) && chip->timer)
0312         snd_timer_interrupt(chip->timer, chip->timer->sticks);
0313 
0314     spin_lock(&chip->lock);
0315     snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
0316     spin_unlock(&chip->lock);
0317     return IRQ_HANDLED;
0318 }
0319 
0320 
0321 static const struct snd_pcm_hardware snd_ad1816a_playback = {
0322     .info =         (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
0323                  SNDRV_PCM_INFO_MMAP_VALID),
0324     .formats =      (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
0325                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
0326                  SNDRV_PCM_FMTBIT_S16_BE),
0327     .rates =        SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
0328     .rate_min =     4000,
0329     .rate_max =     55200,
0330     .channels_min =     1,
0331     .channels_max =     2,
0332     .buffer_bytes_max = (128*1024),
0333     .period_bytes_min = 64,
0334     .period_bytes_max = (128*1024),
0335     .periods_min =      1,
0336     .periods_max =      1024,
0337     .fifo_size =        0,
0338 };
0339 
0340 static const struct snd_pcm_hardware snd_ad1816a_capture = {
0341     .info =         (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
0342                  SNDRV_PCM_INFO_MMAP_VALID),
0343     .formats =      (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW |
0344                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
0345                  SNDRV_PCM_FMTBIT_S16_BE),
0346     .rates =        SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
0347     .rate_min =     4000,
0348     .rate_max =     55200,
0349     .channels_min =     1,
0350     .channels_max =     2,
0351     .buffer_bytes_max = (128*1024),
0352     .period_bytes_min = 64,
0353     .period_bytes_max = (128*1024),
0354     .periods_min =      1,
0355     .periods_max =      1024,
0356     .fifo_size =        0,
0357 };
0358 
0359 static int snd_ad1816a_timer_close(struct snd_timer *timer)
0360 {
0361     struct snd_ad1816a *chip = snd_timer_chip(timer);
0362     snd_ad1816a_close(chip, AD1816A_MODE_TIMER);
0363     return 0;
0364 }
0365 
0366 static int snd_ad1816a_timer_open(struct snd_timer *timer)
0367 {
0368     struct snd_ad1816a *chip = snd_timer_chip(timer);
0369     snd_ad1816a_open(chip, AD1816A_MODE_TIMER);
0370     return 0;
0371 }
0372 
0373 static unsigned long snd_ad1816a_timer_resolution(struct snd_timer *timer)
0374 {
0375     if (snd_BUG_ON(!timer))
0376         return 0;
0377 
0378     return 10000;
0379 }
0380 
0381 static int snd_ad1816a_timer_start(struct snd_timer *timer)
0382 {
0383     unsigned short bits;
0384     unsigned long flags;
0385     struct snd_ad1816a *chip = snd_timer_chip(timer);
0386     spin_lock_irqsave(&chip->lock, flags);
0387     bits = snd_ad1816a_read(chip, AD1816A_INTERRUPT_ENABLE);
0388 
0389     if (!(bits & AD1816A_TIMER_ENABLE)) {
0390         snd_ad1816a_write(chip, AD1816A_TIMER_BASE_COUNT,
0391             timer->sticks & 0xffff);
0392 
0393         snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0394             AD1816A_TIMER_ENABLE, 0xffff);
0395     }
0396     spin_unlock_irqrestore(&chip->lock, flags);
0397     return 0;
0398 }
0399 
0400 static int snd_ad1816a_timer_stop(struct snd_timer *timer)
0401 {
0402     unsigned long flags;
0403     struct snd_ad1816a *chip = snd_timer_chip(timer);
0404     spin_lock_irqsave(&chip->lock, flags);
0405 
0406     snd_ad1816a_write_mask(chip, AD1816A_INTERRUPT_ENABLE,
0407         AD1816A_TIMER_ENABLE, 0x0000);
0408 
0409     spin_unlock_irqrestore(&chip->lock, flags);
0410     return 0;
0411 }
0412 
0413 static const struct snd_timer_hardware snd_ad1816a_timer_table = {
0414     .flags =    SNDRV_TIMER_HW_AUTO,
0415     .resolution =   10000,
0416     .ticks =    65535,
0417     .open =     snd_ad1816a_timer_open,
0418     .close =    snd_ad1816a_timer_close,
0419     .c_resolution = snd_ad1816a_timer_resolution,
0420     .start =    snd_ad1816a_timer_start,
0421     .stop =     snd_ad1816a_timer_stop,
0422 };
0423 
0424 static int snd_ad1816a_playback_open(struct snd_pcm_substream *substream)
0425 {
0426     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0427     struct snd_pcm_runtime *runtime = substream->runtime;
0428     int error;
0429 
0430     error = snd_ad1816a_open(chip, AD1816A_MODE_PLAYBACK);
0431     if (error < 0)
0432         return error;
0433     runtime->hw = snd_ad1816a_playback;
0434     snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
0435     snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
0436     chip->playback_substream = substream;
0437     return 0;
0438 }
0439 
0440 static int snd_ad1816a_capture_open(struct snd_pcm_substream *substream)
0441 {
0442     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0443     struct snd_pcm_runtime *runtime = substream->runtime;
0444     int error;
0445 
0446     error = snd_ad1816a_open(chip, AD1816A_MODE_CAPTURE);
0447     if (error < 0)
0448         return error;
0449     runtime->hw = snd_ad1816a_capture;
0450     snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
0451     snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
0452     chip->capture_substream = substream;
0453     return 0;
0454 }
0455 
0456 static int snd_ad1816a_playback_close(struct snd_pcm_substream *substream)
0457 {
0458     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0459 
0460     chip->playback_substream = NULL;
0461     snd_ad1816a_close(chip, AD1816A_MODE_PLAYBACK);
0462     return 0;
0463 }
0464 
0465 static int snd_ad1816a_capture_close(struct snd_pcm_substream *substream)
0466 {
0467     struct snd_ad1816a *chip = snd_pcm_substream_chip(substream);
0468 
0469     chip->capture_substream = NULL;
0470     snd_ad1816a_close(chip, AD1816A_MODE_CAPTURE);
0471     return 0;
0472 }
0473 
0474 
0475 static void snd_ad1816a_init(struct snd_ad1816a *chip)
0476 {
0477     unsigned long flags;
0478 
0479     spin_lock_irqsave(&chip->lock, flags);
0480 
0481     snd_ad1816a_out(chip, AD1816A_INTERRUPT_STATUS, 0x00);
0482     snd_ad1816a_out_mask(chip, AD1816A_PLAYBACK_CONFIG,
0483         AD1816A_PLAYBACK_ENABLE | AD1816A_PLAYBACK_PIO, 0x00);
0484     snd_ad1816a_out_mask(chip, AD1816A_CAPTURE_CONFIG,
0485         AD1816A_CAPTURE_ENABLE | AD1816A_CAPTURE_PIO, 0x00);
0486     snd_ad1816a_write(chip, AD1816A_INTERRUPT_ENABLE, 0x0000);
0487     snd_ad1816a_write_mask(chip, AD1816A_CHIP_CONFIG,
0488         AD1816A_CAPTURE_NOT_EQUAL | AD1816A_WSS_ENABLE, 0xffff);
0489     snd_ad1816a_write(chip, AD1816A_DSP_CONFIG, 0x0000);
0490     snd_ad1816a_write(chip, AD1816A_POWERDOWN_CTRL, 0x0000);
0491 
0492     spin_unlock_irqrestore(&chip->lock, flags);
0493 }
0494 
0495 #ifdef CONFIG_PM
0496 void snd_ad1816a_suspend(struct snd_ad1816a *chip)
0497 {
0498     int reg;
0499     unsigned long flags;
0500 
0501     spin_lock_irqsave(&chip->lock, flags);
0502     for (reg = 0; reg < 48; reg++)
0503         chip->image[reg] = snd_ad1816a_read(chip, reg);
0504     spin_unlock_irqrestore(&chip->lock, flags);
0505 }
0506 
0507 void snd_ad1816a_resume(struct snd_ad1816a *chip)
0508 {
0509     int reg;
0510     unsigned long flags;
0511 
0512     snd_ad1816a_init(chip);
0513     spin_lock_irqsave(&chip->lock, flags);
0514     for (reg = 0; reg < 48; reg++)
0515         snd_ad1816a_write(chip, reg, chip->image[reg]);
0516     spin_unlock_irqrestore(&chip->lock, flags);
0517 }
0518 #endif
0519 
0520 static int snd_ad1816a_probe(struct snd_ad1816a *chip)
0521 {
0522     unsigned long flags;
0523 
0524     spin_lock_irqsave(&chip->lock, flags);
0525 
0526     switch (chip->version = snd_ad1816a_read(chip, AD1816A_VERSION_ID)) {
0527     case 0:
0528         chip->hardware = AD1816A_HW_AD1815;
0529         break;
0530     case 1:
0531         chip->hardware = AD1816A_HW_AD18MAX10;
0532         break;
0533     case 3:
0534         chip->hardware = AD1816A_HW_AD1816A;
0535         break;
0536     default:
0537         chip->hardware = AD1816A_HW_AUTO;
0538     }
0539 
0540     spin_unlock_irqrestore(&chip->lock, flags);
0541     return 0;
0542 }
0543 
0544 static const char *snd_ad1816a_chip_id(struct snd_ad1816a *chip)
0545 {
0546     switch (chip->hardware) {
0547     case AD1816A_HW_AD1816A: return "AD1816A";
0548     case AD1816A_HW_AD1815: return "AD1815";
0549     case AD1816A_HW_AD18MAX10: return "AD18max10";
0550     default:
0551         snd_printk(KERN_WARNING "Unknown chip version %d:%d.\n",
0552             chip->version, chip->hardware);
0553         return "AD1816A - unknown";
0554     }
0555 }
0556 
0557 int snd_ad1816a_create(struct snd_card *card,
0558                unsigned long port, int irq, int dma1, int dma2,
0559                struct snd_ad1816a *chip)
0560 {
0561     int error;
0562 
0563     chip->irq = -1;
0564     chip->dma1 = -1;
0565     chip->dma2 = -1;
0566 
0567     chip->res_port = devm_request_region(card->dev, port, 16, "AD1816A");
0568     if (!chip->res_port) {
0569         snd_printk(KERN_ERR "ad1816a: can't grab port 0x%lx\n", port);
0570         return -EBUSY;
0571     }
0572     if (devm_request_irq(card->dev, irq, snd_ad1816a_interrupt, 0,
0573                  "AD1816A", (void *) chip)) {
0574         snd_printk(KERN_ERR "ad1816a: can't grab IRQ %d\n", irq);
0575         return -EBUSY;
0576     }
0577     chip->irq = irq;
0578     card->sync_irq = chip->irq;
0579     if (snd_devm_request_dma(card->dev, dma1, "AD1816A - 1")) {
0580         snd_printk(KERN_ERR "ad1816a: can't grab DMA1 %d\n", dma1);
0581         return -EBUSY;
0582     }
0583     chip->dma1 = dma1;
0584     if (snd_devm_request_dma(card->dev, dma2, "AD1816A - 2")) {
0585         snd_printk(KERN_ERR "ad1816a: can't grab DMA2 %d\n", dma2);
0586         return -EBUSY;
0587     }
0588     chip->dma2 = dma2;
0589 
0590     chip->card = card;
0591     chip->port = port;
0592     spin_lock_init(&chip->lock);
0593 
0594     error = snd_ad1816a_probe(chip);
0595     if (error)
0596         return error;
0597 
0598     snd_ad1816a_init(chip);
0599 
0600     return 0;
0601 }
0602 
0603 static const struct snd_pcm_ops snd_ad1816a_playback_ops = {
0604     .open =     snd_ad1816a_playback_open,
0605     .close =    snd_ad1816a_playback_close,
0606     .prepare =  snd_ad1816a_playback_prepare,
0607     .trigger =  snd_ad1816a_playback_trigger,
0608     .pointer =  snd_ad1816a_playback_pointer,
0609 };
0610 
0611 static const struct snd_pcm_ops snd_ad1816a_capture_ops = {
0612     .open =     snd_ad1816a_capture_open,
0613     .close =    snd_ad1816a_capture_close,
0614     .prepare =  snd_ad1816a_capture_prepare,
0615     .trigger =  snd_ad1816a_capture_trigger,
0616     .pointer =  snd_ad1816a_capture_pointer,
0617 };
0618 
0619 int snd_ad1816a_pcm(struct snd_ad1816a *chip, int device)
0620 {
0621     int error;
0622     struct snd_pcm *pcm;
0623 
0624     error = snd_pcm_new(chip->card, "AD1816A", device, 1, 1, &pcm);
0625     if (error)
0626         return error;
0627 
0628     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ad1816a_playback_ops);
0629     snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ad1816a_capture_ops);
0630 
0631     pcm->private_data = chip;
0632     pcm->info_flags = (chip->dma1 == chip->dma2 ) ? SNDRV_PCM_INFO_JOINT_DUPLEX : 0;
0633 
0634     strcpy(pcm->name, snd_ad1816a_chip_id(chip));
0635     snd_ad1816a_init(chip);
0636 
0637     snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, chip->card->dev,
0638                        64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
0639 
0640     chip->pcm = pcm;
0641     return 0;
0642 }
0643 
0644 int snd_ad1816a_timer(struct snd_ad1816a *chip, int device)
0645 {
0646     struct snd_timer *timer;
0647     struct snd_timer_id tid;
0648     int error;
0649 
0650     tid.dev_class = SNDRV_TIMER_CLASS_CARD;
0651     tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
0652     tid.card = chip->card->number;
0653     tid.device = device;
0654     tid.subdevice = 0;
0655     error = snd_timer_new(chip->card, "AD1816A", &tid, &timer);
0656     if (error < 0)
0657         return error;
0658     strcpy(timer->name, snd_ad1816a_chip_id(chip));
0659     timer->private_data = chip;
0660     chip->timer = timer;
0661     timer->hw = snd_ad1816a_timer_table;
0662     return 0;
0663 }
0664 
0665 /*
0666  *
0667  */
0668 
0669 static int snd_ad1816a_info_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0670 {
0671     static const char * const texts[8] = {
0672         "Line", "Mix", "CD", "Synth", "Video",
0673         "Mic", "Phone",
0674     };
0675 
0676     return snd_ctl_enum_info(uinfo, 2, 7, texts);
0677 }
0678 
0679 static int snd_ad1816a_get_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0680 {
0681     struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
0682     unsigned long flags;
0683     unsigned short val;
0684     
0685     spin_lock_irqsave(&chip->lock, flags);
0686     val = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL);
0687     spin_unlock_irqrestore(&chip->lock, flags);
0688     ucontrol->value.enumerated.item[0] = (val >> 12) & 7;
0689     ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
0690     return 0;
0691 }
0692 
0693 static int snd_ad1816a_put_mux(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0694 {
0695     struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
0696     unsigned long flags;
0697     unsigned short val;
0698     int change;
0699     
0700     if (ucontrol->value.enumerated.item[0] > 6 ||
0701         ucontrol->value.enumerated.item[1] > 6)
0702         return -EINVAL;
0703     val = (ucontrol->value.enumerated.item[0] << 12) |
0704           (ucontrol->value.enumerated.item[1] << 4);
0705     spin_lock_irqsave(&chip->lock, flags);
0706     change = snd_ad1816a_read(chip, AD1816A_ADC_SOURCE_SEL) != val;
0707     snd_ad1816a_write(chip, AD1816A_ADC_SOURCE_SEL, val);
0708     spin_unlock_irqrestore(&chip->lock, flags);
0709     return change;
0710 }
0711 
0712 #define AD1816A_SINGLE_TLV(xname, reg, shift, mask, invert, xtlv)   \
0713 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
0714   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
0715   .name = xname, .info = snd_ad1816a_info_single, \
0716   .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
0717   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
0718   .tlv = { .p = (xtlv) } }
0719 #define AD1816A_SINGLE(xname, reg, shift, mask, invert) \
0720 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_single, \
0721   .get = snd_ad1816a_get_single, .put = snd_ad1816a_put_single, \
0722   .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
0723 
0724 static int snd_ad1816a_info_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0725 {
0726     int mask = (kcontrol->private_value >> 16) & 0xff;
0727 
0728     uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
0729     uinfo->count = 1;
0730     uinfo->value.integer.min = 0;
0731     uinfo->value.integer.max = mask;
0732     return 0;
0733 }
0734 
0735 static int snd_ad1816a_get_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0736 {
0737     struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
0738     unsigned long flags;
0739     int reg = kcontrol->private_value & 0xff;
0740     int shift = (kcontrol->private_value >> 8) & 0xff;
0741     int mask = (kcontrol->private_value >> 16) & 0xff;
0742     int invert = (kcontrol->private_value >> 24) & 0xff;
0743     
0744     spin_lock_irqsave(&chip->lock, flags);
0745     ucontrol->value.integer.value[0] = (snd_ad1816a_read(chip, reg) >> shift) & mask;
0746     spin_unlock_irqrestore(&chip->lock, flags);
0747     if (invert)
0748         ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
0749     return 0;
0750 }
0751 
0752 static int snd_ad1816a_put_single(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0753 {
0754     struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
0755     unsigned long flags;
0756     int reg = kcontrol->private_value & 0xff;
0757     int shift = (kcontrol->private_value >> 8) & 0xff;
0758     int mask = (kcontrol->private_value >> 16) & 0xff;
0759     int invert = (kcontrol->private_value >> 24) & 0xff;
0760     int change;
0761     unsigned short old_val, val;
0762     
0763     val = (ucontrol->value.integer.value[0] & mask);
0764     if (invert)
0765         val = mask - val;
0766     val <<= shift;
0767     spin_lock_irqsave(&chip->lock, flags);
0768     old_val = snd_ad1816a_read(chip, reg);
0769     val = (old_val & ~(mask << shift)) | val;
0770     change = val != old_val;
0771     snd_ad1816a_write(chip, reg, val);
0772     spin_unlock_irqrestore(&chip->lock, flags);
0773     return change;
0774 }
0775 
0776 #define AD1816A_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
0777 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
0778   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
0779   .name = xname, .info = snd_ad1816a_info_double,       \
0780   .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
0781   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
0782   .tlv = { .p = (xtlv) } }
0783 
0784 #define AD1816A_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
0785 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ad1816a_info_double, \
0786   .get = snd_ad1816a_get_double, .put = snd_ad1816a_put_double, \
0787   .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
0788 
0789 static int snd_ad1816a_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0790 {
0791     int mask = (kcontrol->private_value >> 16) & 0xff;
0792 
0793     uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
0794     uinfo->count = 2;
0795     uinfo->value.integer.min = 0;
0796     uinfo->value.integer.max = mask;
0797     return 0;
0798 }
0799 
0800 static int snd_ad1816a_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0801 {
0802     struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
0803     unsigned long flags;
0804     int reg = kcontrol->private_value & 0xff;
0805     int shift_left = (kcontrol->private_value >> 8) & 0x0f;
0806     int shift_right = (kcontrol->private_value >> 12) & 0x0f;
0807     int mask = (kcontrol->private_value >> 16) & 0xff;
0808     int invert = (kcontrol->private_value >> 24) & 0xff;
0809     unsigned short val;
0810     
0811     spin_lock_irqsave(&chip->lock, flags);
0812     val = snd_ad1816a_read(chip, reg);
0813     ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
0814     ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
0815     spin_unlock_irqrestore(&chip->lock, flags);
0816     if (invert) {
0817         ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
0818         ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
0819     }
0820     return 0;
0821 }
0822 
0823 static int snd_ad1816a_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
0824 {
0825     struct snd_ad1816a *chip = snd_kcontrol_chip(kcontrol);
0826     unsigned long flags;
0827     int reg = kcontrol->private_value & 0xff;
0828     int shift_left = (kcontrol->private_value >> 8) & 0x0f;
0829     int shift_right = (kcontrol->private_value >> 12) & 0x0f;
0830     int mask = (kcontrol->private_value >> 16) & 0xff;
0831     int invert = (kcontrol->private_value >> 24) & 0xff;
0832     int change;
0833     unsigned short old_val, val1, val2;
0834     
0835     val1 = ucontrol->value.integer.value[0] & mask;
0836     val2 = ucontrol->value.integer.value[1] & mask;
0837     if (invert) {
0838         val1 = mask - val1;
0839         val2 = mask - val2;
0840     }
0841     val1 <<= shift_left;
0842     val2 <<= shift_right;
0843     spin_lock_irqsave(&chip->lock, flags);
0844     old_val = snd_ad1816a_read(chip, reg);
0845     val1 = (old_val & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
0846     change = val1 != old_val;
0847     snd_ad1816a_write(chip, reg, val1);
0848     spin_unlock_irqrestore(&chip->lock, flags);
0849     return change;
0850 }
0851 
0852 static const DECLARE_TLV_DB_SCALE(db_scale_4bit, -4500, 300, 0);
0853 static const DECLARE_TLV_DB_SCALE(db_scale_5bit, -4650, 150, 0);
0854 static const DECLARE_TLV_DB_SCALE(db_scale_6bit, -9450, 150, 0);
0855 static const DECLARE_TLV_DB_SCALE(db_scale_5bit_12db_max, -3450, 150, 0);
0856 static const DECLARE_TLV_DB_SCALE(db_scale_rec_gain, 0, 150, 0);
0857 
0858 static const struct snd_kcontrol_new snd_ad1816a_controls[] = {
0859 AD1816A_DOUBLE("Master Playback Switch", AD1816A_MASTER_ATT, 15, 7, 1, 1),
0860 AD1816A_DOUBLE_TLV("Master Playback Volume", AD1816A_MASTER_ATT, 8, 0, 31, 1,
0861            db_scale_5bit),
0862 AD1816A_DOUBLE("PCM Playback Switch", AD1816A_VOICE_ATT, 15, 7, 1, 1),
0863 AD1816A_DOUBLE_TLV("PCM Playback Volume", AD1816A_VOICE_ATT, 8, 0, 63, 1,
0864            db_scale_6bit),
0865 AD1816A_DOUBLE("Line Playback Switch", AD1816A_LINE_GAIN_ATT, 15, 7, 1, 1),
0866 AD1816A_DOUBLE_TLV("Line Playback Volume", AD1816A_LINE_GAIN_ATT, 8, 0, 31, 1,
0867            db_scale_5bit_12db_max),
0868 AD1816A_DOUBLE("CD Playback Switch", AD1816A_CD_GAIN_ATT, 15, 7, 1, 1),
0869 AD1816A_DOUBLE_TLV("CD Playback Volume", AD1816A_CD_GAIN_ATT, 8, 0, 31, 1,
0870            db_scale_5bit_12db_max),
0871 AD1816A_DOUBLE("Synth Playback Switch", AD1816A_SYNTH_GAIN_ATT, 15, 7, 1, 1),
0872 AD1816A_DOUBLE_TLV("Synth Playback Volume", AD1816A_SYNTH_GAIN_ATT, 8, 0, 31, 1,
0873            db_scale_5bit_12db_max),
0874 AD1816A_DOUBLE("FM Playback Switch", AD1816A_FM_ATT, 15, 7, 1, 1),
0875 AD1816A_DOUBLE_TLV("FM Playback Volume", AD1816A_FM_ATT, 8, 0, 63, 1,
0876            db_scale_6bit),
0877 AD1816A_SINGLE("Mic Playback Switch", AD1816A_MIC_GAIN_ATT, 15, 1, 1),
0878 AD1816A_SINGLE_TLV("Mic Playback Volume", AD1816A_MIC_GAIN_ATT, 8, 31, 1,
0879            db_scale_5bit_12db_max),
0880 AD1816A_SINGLE("Mic Boost", AD1816A_MIC_GAIN_ATT, 14, 1, 0),
0881 AD1816A_DOUBLE("Video Playback Switch", AD1816A_VID_GAIN_ATT, 15, 7, 1, 1),
0882 AD1816A_DOUBLE_TLV("Video Playback Volume", AD1816A_VID_GAIN_ATT, 8, 0, 31, 1,
0883            db_scale_5bit_12db_max),
0884 AD1816A_SINGLE("Phone Capture Switch", AD1816A_PHONE_IN_GAIN_ATT, 15, 1, 1),
0885 AD1816A_SINGLE_TLV("Phone Capture Volume", AD1816A_PHONE_IN_GAIN_ATT, 0, 15, 1,
0886            db_scale_4bit),
0887 AD1816A_SINGLE("Phone Playback Switch", AD1816A_PHONE_OUT_ATT, 7, 1, 1),
0888 AD1816A_SINGLE_TLV("Phone Playback Volume", AD1816A_PHONE_OUT_ATT, 0, 31, 1,
0889            db_scale_5bit),
0890 {
0891     .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
0892     .name = "Capture Source",
0893     .info = snd_ad1816a_info_mux,
0894     .get = snd_ad1816a_get_mux,
0895     .put = snd_ad1816a_put_mux,
0896 },
0897 AD1816A_DOUBLE("Capture Switch", AD1816A_ADC_PGA, 15, 7, 1, 1),
0898 AD1816A_DOUBLE_TLV("Capture Volume", AD1816A_ADC_PGA, 8, 0, 15, 0,
0899            db_scale_rec_gain),
0900 AD1816A_SINGLE("3D Control - Switch", AD1816A_3D_PHAT_CTRL, 15, 1, 1),
0901 AD1816A_SINGLE("3D Control - Level", AD1816A_3D_PHAT_CTRL, 0, 15, 0),
0902 };
0903                                         
0904 int snd_ad1816a_mixer(struct snd_ad1816a *chip)
0905 {
0906     struct snd_card *card;
0907     unsigned int idx;
0908     int err;
0909 
0910     if (snd_BUG_ON(!chip || !chip->card))
0911         return -EINVAL;
0912 
0913     card = chip->card;
0914 
0915     strcpy(card->mixername, snd_ad1816a_chip_id(chip));
0916 
0917     for (idx = 0; idx < ARRAY_SIZE(snd_ad1816a_controls); idx++) {
0918         err = snd_ctl_add(card, snd_ctl_new1(&snd_ad1816a_controls[idx], chip));
0919         if (err < 0)
0920             return err;
0921     }
0922     return 0;
0923 }
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