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0008 #include <linux/slab.h>
0009 #include <linux/delay.h>
0010 #include <linux/module.h>
0011 #include <sound/core.h>
0012 #include <sound/control.h>
0013 #include <sound/pcm.h>
0014 #include <sound/ak4114.h>
0015 #include <sound/asoundef.h>
0016 #include <sound/info.h>
0017
0018 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
0019 MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei");
0020 MODULE_LICENSE("GPL");
0021
0022 #define AK4114_ADDR 0x00
0023
0024 static void ak4114_stats(struct work_struct *work);
0025 static void ak4114_init_regs(struct ak4114 *chip);
0026
0027 static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val)
0028 {
0029 ak4114->write(ak4114->private_data, reg, val);
0030 if (reg <= AK4114_REG_INT1_MASK)
0031 ak4114->regmap[reg] = val;
0032 else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
0033 ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val;
0034 }
0035
0036 static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg)
0037 {
0038 return ak4114->read(ak4114->private_data, reg);
0039 }
0040
0041 #if 0
0042 static void reg_dump(struct ak4114 *ak4114)
0043 {
0044 int i;
0045
0046 printk(KERN_DEBUG "AK4114 REG DUMP:\n");
0047 for (i = 0; i < 0x20; i++)
0048 printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < ARRAY_SIZE(ak4114->regmap) ? ak4114->regmap[i] : 0);
0049 }
0050 #endif
0051
0052 static void snd_ak4114_free(struct ak4114 *chip)
0053 {
0054 atomic_inc(&chip->wq_processing);
0055 cancel_delayed_work_sync(&chip->work);
0056 kfree(chip);
0057 }
0058
0059 static int snd_ak4114_dev_free(struct snd_device *device)
0060 {
0061 struct ak4114 *chip = device->device_data;
0062 snd_ak4114_free(chip);
0063 return 0;
0064 }
0065
0066 int snd_ak4114_create(struct snd_card *card,
0067 ak4114_read_t *read, ak4114_write_t *write,
0068 const unsigned char pgm[6], const unsigned char txcsb[5],
0069 void *private_data, struct ak4114 **r_ak4114)
0070 {
0071 struct ak4114 *chip;
0072 int err = 0;
0073 unsigned char reg;
0074 static const struct snd_device_ops ops = {
0075 .dev_free = snd_ak4114_dev_free,
0076 };
0077
0078 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
0079 if (chip == NULL)
0080 return -ENOMEM;
0081 spin_lock_init(&chip->lock);
0082 chip->card = card;
0083 chip->read = read;
0084 chip->write = write;
0085 chip->private_data = private_data;
0086 INIT_DELAYED_WORK(&chip->work, ak4114_stats);
0087 atomic_set(&chip->wq_processing, 0);
0088 mutex_init(&chip->reinit_mutex);
0089
0090 for (reg = 0; reg < 6; reg++)
0091 chip->regmap[reg] = pgm[reg];
0092 for (reg = 0; reg < 5; reg++)
0093 chip->txcsb[reg] = txcsb[reg];
0094
0095 ak4114_init_regs(chip);
0096
0097 chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT);
0098 chip->rcs1 = reg_read(chip, AK4114_REG_RCS1);
0099
0100 err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
0101 if (err < 0)
0102 goto __fail;
0103
0104 if (r_ak4114)
0105 *r_ak4114 = chip;
0106 return 0;
0107
0108 __fail:
0109 snd_ak4114_free(chip);
0110 return err;
0111 }
0112 EXPORT_SYMBOL(snd_ak4114_create);
0113
0114 void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val)
0115 {
0116 if (reg <= AK4114_REG_INT1_MASK)
0117 reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
0118 else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
0119 reg_write(chip, reg,
0120 (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val);
0121 }
0122 EXPORT_SYMBOL(snd_ak4114_reg_write);
0123
0124 static void ak4114_init_regs(struct ak4114 *chip)
0125 {
0126 unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg;
0127
0128
0129 reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN));
0130 udelay(200);
0131
0132 reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN);
0133 udelay(200);
0134 for (reg = 1; reg < 6; reg++)
0135 reg_write(chip, reg, chip->regmap[reg]);
0136 for (reg = 0; reg < 5; reg++)
0137 reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]);
0138
0139 reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN);
0140 }
0141
0142 void snd_ak4114_reinit(struct ak4114 *chip)
0143 {
0144 if (atomic_inc_return(&chip->wq_processing) == 1)
0145 cancel_delayed_work_sync(&chip->work);
0146 mutex_lock(&chip->reinit_mutex);
0147 ak4114_init_regs(chip);
0148 mutex_unlock(&chip->reinit_mutex);
0149
0150 if (atomic_dec_and_test(&chip->wq_processing))
0151 schedule_delayed_work(&chip->work, HZ / 10);
0152 }
0153 EXPORT_SYMBOL(snd_ak4114_reinit);
0154
0155 static unsigned int external_rate(unsigned char rcs1)
0156 {
0157 switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) {
0158 case AK4114_FS_32000HZ: return 32000;
0159 case AK4114_FS_44100HZ: return 44100;
0160 case AK4114_FS_48000HZ: return 48000;
0161 case AK4114_FS_88200HZ: return 88200;
0162 case AK4114_FS_96000HZ: return 96000;
0163 case AK4114_FS_176400HZ: return 176400;
0164 case AK4114_FS_192000HZ: return 192000;
0165 default: return 0;
0166 }
0167 }
0168
0169 static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol,
0170 struct snd_ctl_elem_info *uinfo)
0171 {
0172 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0173 uinfo->count = 1;
0174 uinfo->value.integer.min = 0;
0175 uinfo->value.integer.max = LONG_MAX;
0176 return 0;
0177 }
0178
0179 static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol,
0180 struct snd_ctl_elem_value *ucontrol)
0181 {
0182 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0183
0184 spin_lock_irq(&chip->lock);
0185 ucontrol->value.integer.value[0] =
0186 chip->errors[kcontrol->private_value];
0187 chip->errors[kcontrol->private_value] = 0;
0188 spin_unlock_irq(&chip->lock);
0189 return 0;
0190 }
0191
0192 #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info
0193
0194 static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol,
0195 struct snd_ctl_elem_value *ucontrol)
0196 {
0197 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0198 unsigned char reg = kcontrol->private_value & 0xff;
0199 unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
0200 unsigned char inv = (kcontrol->private_value >> 31) & 1;
0201
0202 ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
0203 return 0;
0204 }
0205
0206 static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol,
0207 struct snd_ctl_elem_info *uinfo)
0208 {
0209 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0210 uinfo->count = 1;
0211 uinfo->value.integer.min = 0;
0212 uinfo->value.integer.max = 192000;
0213 return 0;
0214 }
0215
0216 static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol,
0217 struct snd_ctl_elem_value *ucontrol)
0218 {
0219 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0220
0221 ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1));
0222 return 0;
0223 }
0224
0225 static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0226 {
0227 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
0228 uinfo->count = 1;
0229 return 0;
0230 }
0231
0232 static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol,
0233 struct snd_ctl_elem_value *ucontrol)
0234 {
0235 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0236 unsigned i;
0237
0238 for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++)
0239 ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i);
0240 return 0;
0241 }
0242
0243 static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol,
0244 struct snd_ctl_elem_value *ucontrol)
0245 {
0246 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0247 unsigned i;
0248
0249 for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
0250 ucontrol->value.iec958.status[i] = chip->txcsb[i];
0251 return 0;
0252 }
0253
0254 static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol,
0255 struct snd_ctl_elem_value *ucontrol)
0256 {
0257 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0258 unsigned i;
0259
0260 for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
0261 reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]);
0262 return 0;
0263 }
0264
0265 static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0266 {
0267 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
0268 uinfo->count = 1;
0269 return 0;
0270 }
0271
0272 static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol,
0273 struct snd_ctl_elem_value *ucontrol)
0274 {
0275 memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE);
0276 return 0;
0277 }
0278
0279 static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0280 {
0281 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0282 uinfo->value.integer.min = 0;
0283 uinfo->value.integer.max = 0xffff;
0284 uinfo->count = 4;
0285 return 0;
0286 }
0287
0288 static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol,
0289 struct snd_ctl_elem_value *ucontrol)
0290 {
0291 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0292 unsigned short tmp;
0293
0294 ucontrol->value.integer.value[0] = 0xf8f2;
0295 ucontrol->value.integer.value[1] = 0x4e1f;
0296 tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8);
0297 ucontrol->value.integer.value[2] = tmp;
0298 tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8);
0299 ucontrol->value.integer.value[3] = tmp;
0300 return 0;
0301 }
0302
0303 static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
0304 {
0305 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
0306 uinfo->count = AK4114_REG_QSUB_SIZE;
0307 return 0;
0308 }
0309
0310 static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol,
0311 struct snd_ctl_elem_value *ucontrol)
0312 {
0313 struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
0314 unsigned i;
0315
0316 for (i = 0; i < AK4114_REG_QSUB_SIZE; i++)
0317 ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i);
0318 return 0;
0319 }
0320
0321
0322 static const struct snd_kcontrol_new snd_ak4114_iec958_controls[] = {
0323 {
0324 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0325 .name = "IEC958 Parity Errors",
0326 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0327 .info = snd_ak4114_in_error_info,
0328 .get = snd_ak4114_in_error_get,
0329 .private_value = AK4114_PARITY_ERRORS,
0330 },
0331 {
0332 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0333 .name = "IEC958 V-Bit Errors",
0334 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0335 .info = snd_ak4114_in_error_info,
0336 .get = snd_ak4114_in_error_get,
0337 .private_value = AK4114_V_BIT_ERRORS,
0338 },
0339 {
0340 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0341 .name = "IEC958 C-CRC Errors",
0342 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0343 .info = snd_ak4114_in_error_info,
0344 .get = snd_ak4114_in_error_get,
0345 .private_value = AK4114_CCRC_ERRORS,
0346 },
0347 {
0348 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0349 .name = "IEC958 Q-CRC Errors",
0350 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0351 .info = snd_ak4114_in_error_info,
0352 .get = snd_ak4114_in_error_get,
0353 .private_value = AK4114_QCRC_ERRORS,
0354 },
0355 {
0356 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0357 .name = "IEC958 External Rate",
0358 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0359 .info = snd_ak4114_rate_info,
0360 .get = snd_ak4114_rate_get,
0361 },
0362 {
0363 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0364 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
0365 .access = SNDRV_CTL_ELEM_ACCESS_READ,
0366 .info = snd_ak4114_spdif_mask_info,
0367 .get = snd_ak4114_spdif_mask_get,
0368 },
0369 {
0370 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0371 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
0372 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0373 .info = snd_ak4114_spdif_info,
0374 .get = snd_ak4114_spdif_playback_get,
0375 .put = snd_ak4114_spdif_playback_put,
0376 },
0377 {
0378 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0379 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
0380 .access = SNDRV_CTL_ELEM_ACCESS_READ,
0381 .info = snd_ak4114_spdif_mask_info,
0382 .get = snd_ak4114_spdif_mask_get,
0383 },
0384 {
0385 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0386 .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
0387 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0388 .info = snd_ak4114_spdif_info,
0389 .get = snd_ak4114_spdif_get,
0390 },
0391 {
0392 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0393 .name = "IEC958 Preamble Capture Default",
0394 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0395 .info = snd_ak4114_spdif_pinfo,
0396 .get = snd_ak4114_spdif_pget,
0397 },
0398 {
0399 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0400 .name = "IEC958 Q-subcode Capture Default",
0401 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0402 .info = snd_ak4114_spdif_qinfo,
0403 .get = snd_ak4114_spdif_qget,
0404 },
0405 {
0406 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0407 .name = "IEC958 Audio",
0408 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0409 .info = snd_ak4114_in_bit_info,
0410 .get = snd_ak4114_in_bit_get,
0411 .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0,
0412 },
0413 {
0414 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0415 .name = "IEC958 Non-PCM Bitstream",
0416 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0417 .info = snd_ak4114_in_bit_info,
0418 .get = snd_ak4114_in_bit_get,
0419 .private_value = (6<<8) | AK4114_REG_RCS0,
0420 },
0421 {
0422 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0423 .name = "IEC958 DTS Bitstream",
0424 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0425 .info = snd_ak4114_in_bit_info,
0426 .get = snd_ak4114_in_bit_get,
0427 .private_value = (3<<8) | AK4114_REG_RCS0,
0428 },
0429 {
0430 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
0431 .name = "IEC958 PPL Lock Status",
0432 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0433 .info = snd_ak4114_in_bit_info,
0434 .get = snd_ak4114_in_bit_get,
0435 .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0,
0436 }
0437 };
0438
0439
0440 static void snd_ak4114_proc_regs_read(struct snd_info_entry *entry,
0441 struct snd_info_buffer *buffer)
0442 {
0443 struct ak4114 *ak4114 = entry->private_data;
0444 int reg, val;
0445
0446 for (reg = 0; reg < 0x20; reg++) {
0447 val = reg_read(ak4114, reg);
0448 snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
0449 }
0450 }
0451
0452 static void snd_ak4114_proc_init(struct ak4114 *ak4114)
0453 {
0454 snd_card_ro_proc_new(ak4114->card, "ak4114", ak4114,
0455 snd_ak4114_proc_regs_read);
0456 }
0457
0458 int snd_ak4114_build(struct ak4114 *ak4114,
0459 struct snd_pcm_substream *ply_substream,
0460 struct snd_pcm_substream *cap_substream)
0461 {
0462 struct snd_kcontrol *kctl;
0463 unsigned int idx;
0464 int err;
0465
0466 if (snd_BUG_ON(!cap_substream))
0467 return -EINVAL;
0468 ak4114->playback_substream = ply_substream;
0469 ak4114->capture_substream = cap_substream;
0470 for (idx = 0; idx < AK4114_CONTROLS; idx++) {
0471 kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114);
0472 if (kctl == NULL)
0473 return -ENOMEM;
0474 if (strstr(kctl->id.name, "Playback")) {
0475 if (ply_substream == NULL) {
0476 snd_ctl_free_one(kctl);
0477 ak4114->kctls[idx] = NULL;
0478 continue;
0479 }
0480 kctl->id.device = ply_substream->pcm->device;
0481 kctl->id.subdevice = ply_substream->number;
0482 } else {
0483 kctl->id.device = cap_substream->pcm->device;
0484 kctl->id.subdevice = cap_substream->number;
0485 }
0486 err = snd_ctl_add(ak4114->card, kctl);
0487 if (err < 0)
0488 return err;
0489 ak4114->kctls[idx] = kctl;
0490 }
0491 snd_ak4114_proc_init(ak4114);
0492
0493 schedule_delayed_work(&ak4114->work, HZ / 10);
0494 return 0;
0495 }
0496 EXPORT_SYMBOL(snd_ak4114_build);
0497
0498
0499 static void ak4114_notify(struct ak4114 *ak4114,
0500 unsigned char rcs0, unsigned char rcs1,
0501 unsigned char c0, unsigned char c1)
0502 {
0503 if (!ak4114->kctls[0])
0504 return;
0505
0506 if (rcs0 & AK4114_PAR)
0507 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0508 &ak4114->kctls[0]->id);
0509 if (rcs0 & AK4114_V)
0510 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0511 &ak4114->kctls[1]->id);
0512 if (rcs1 & AK4114_CCRC)
0513 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0514 &ak4114->kctls[2]->id);
0515 if (rcs1 & AK4114_QCRC)
0516 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0517 &ak4114->kctls[3]->id);
0518
0519
0520 if (c1 & 0xf0)
0521 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0522 &ak4114->kctls[4]->id);
0523
0524 if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT))
0525 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0526 &ak4114->kctls[9]->id);
0527 if (c0 & AK4114_QINT)
0528 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0529 &ak4114->kctls[10]->id);
0530
0531 if (c0 & AK4114_AUDION)
0532 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0533 &ak4114->kctls[11]->id);
0534 if (c0 & AK4114_AUTO)
0535 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0536 &ak4114->kctls[12]->id);
0537 if (c0 & AK4114_DTSCD)
0538 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0539 &ak4114->kctls[13]->id);
0540 if (c0 & AK4114_UNLCK)
0541 snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
0542 &ak4114->kctls[14]->id);
0543 }
0544
0545 int snd_ak4114_external_rate(struct ak4114 *ak4114)
0546 {
0547 unsigned char rcs1;
0548
0549 rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
0550 return external_rate(rcs1);
0551 }
0552 EXPORT_SYMBOL(snd_ak4114_external_rate);
0553
0554 int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags)
0555 {
0556 struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL;
0557 unsigned long _flags;
0558 int res = 0;
0559 unsigned char rcs0, rcs1;
0560 unsigned char c0, c1;
0561
0562 rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
0563 if (flags & AK4114_CHECK_NO_STAT)
0564 goto __rate;
0565 rcs0 = reg_read(ak4114, AK4114_REG_RCS0);
0566 spin_lock_irqsave(&ak4114->lock, _flags);
0567 if (rcs0 & AK4114_PAR)
0568 ak4114->errors[AK4114_PARITY_ERRORS]++;
0569 if (rcs1 & AK4114_V)
0570 ak4114->errors[AK4114_V_BIT_ERRORS]++;
0571 if (rcs1 & AK4114_CCRC)
0572 ak4114->errors[AK4114_CCRC_ERRORS]++;
0573 if (rcs1 & AK4114_QCRC)
0574 ak4114->errors[AK4114_QCRC_ERRORS]++;
0575 c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^
0576 (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK));
0577 c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0);
0578 ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT);
0579 ak4114->rcs1 = rcs1;
0580 spin_unlock_irqrestore(&ak4114->lock, _flags);
0581
0582 ak4114_notify(ak4114, rcs0, rcs1, c0, c1);
0583 if (ak4114->change_callback && (c0 | c1) != 0)
0584 ak4114->change_callback(ak4114, c0, c1);
0585
0586 __rate:
0587
0588 res = external_rate(rcs1);
0589 if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) {
0590 snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags);
0591 if (snd_pcm_running(ak4114->capture_substream)) {
0592
0593 snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING);
0594 res = 1;
0595 }
0596 snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags);
0597 }
0598 return res;
0599 }
0600 EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors);
0601
0602 static void ak4114_stats(struct work_struct *work)
0603 {
0604 struct ak4114 *chip = container_of(work, struct ak4114, work.work);
0605
0606 if (atomic_inc_return(&chip->wq_processing) == 1)
0607 snd_ak4114_check_rate_and_errors(chip, chip->check_flags);
0608 if (atomic_dec_and_test(&chip->wq_processing))
0609 schedule_delayed_work(&chip->work, HZ / 10);
0610 }
0611
0612 #ifdef CONFIG_PM
0613 void snd_ak4114_suspend(struct ak4114 *chip)
0614 {
0615 atomic_inc(&chip->wq_processing);
0616 cancel_delayed_work_sync(&chip->work);
0617 }
0618 EXPORT_SYMBOL(snd_ak4114_suspend);
0619
0620 void snd_ak4114_resume(struct ak4114 *chip)
0621 {
0622 atomic_dec(&chip->wq_processing);
0623 snd_ak4114_reinit(chip);
0624 }
0625 EXPORT_SYMBOL(snd_ak4114_resume);
0626 #endif