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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  Routines for control of the AK4113 via I2C/4-wire serial interface
0004  *  IEC958 (S/PDIF) receiver by Asahi Kasei
0005  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
0006  *  Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>
0007  */
0008 
0009 #include <linux/slab.h>
0010 #include <linux/delay.h>
0011 #include <linux/module.h>
0012 #include <sound/core.h>
0013 #include <sound/control.h>
0014 #include <sound/pcm.h>
0015 #include <sound/ak4113.h>
0016 #include <sound/asoundef.h>
0017 #include <sound/info.h>
0018 
0019 MODULE_AUTHOR("Pavel Hofman <pavel.hofman@ivitera.com>");
0020 MODULE_DESCRIPTION("AK4113 IEC958 (S/PDIF) receiver by Asahi Kasei");
0021 MODULE_LICENSE("GPL");
0022 
0023 #define AK4113_ADDR         0x00 /* fixed address */
0024 
0025 static void ak4113_stats(struct work_struct *work);
0026 static void ak4113_init_regs(struct ak4113 *chip);
0027 
0028 
0029 static void reg_write(struct ak4113 *ak4113, unsigned char reg,
0030         unsigned char val)
0031 {
0032     ak4113->write(ak4113->private_data, reg, val);
0033     if (reg < sizeof(ak4113->regmap))
0034         ak4113->regmap[reg] = val;
0035 }
0036 
0037 static inline unsigned char reg_read(struct ak4113 *ak4113, unsigned char reg)
0038 {
0039     return ak4113->read(ak4113->private_data, reg);
0040 }
0041 
0042 static void snd_ak4113_free(struct ak4113 *chip)
0043 {
0044     atomic_inc(&chip->wq_processing);   /* don't schedule new work */
0045     cancel_delayed_work_sync(&chip->work);
0046     kfree(chip);
0047 }
0048 
0049 static int snd_ak4113_dev_free(struct snd_device *device)
0050 {
0051     struct ak4113 *chip = device->device_data;
0052     snd_ak4113_free(chip);
0053     return 0;
0054 }
0055 
0056 int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read,
0057         ak4113_write_t *write, const unsigned char *pgm,
0058         void *private_data, struct ak4113 **r_ak4113)
0059 {
0060     struct ak4113 *chip;
0061     int err;
0062     unsigned char reg;
0063     static const struct snd_device_ops ops = {
0064         .dev_free =     snd_ak4113_dev_free,
0065     };
0066 
0067     chip = kzalloc(sizeof(*chip), GFP_KERNEL);
0068     if (chip == NULL)
0069         return -ENOMEM;
0070     spin_lock_init(&chip->lock);
0071     chip->card = card;
0072     chip->read = read;
0073     chip->write = write;
0074     chip->private_data = private_data;
0075     INIT_DELAYED_WORK(&chip->work, ak4113_stats);
0076     atomic_set(&chip->wq_processing, 0);
0077     mutex_init(&chip->reinit_mutex);
0078 
0079     for (reg = 0; reg < AK4113_WRITABLE_REGS ; reg++)
0080         chip->regmap[reg] = pgm[reg];
0081     ak4113_init_regs(chip);
0082 
0083     chip->rcs0 = reg_read(chip, AK4113_REG_RCS0) & ~(AK4113_QINT |
0084             AK4113_CINT | AK4113_STC);
0085     chip->rcs1 = reg_read(chip, AK4113_REG_RCS1);
0086     chip->rcs2 = reg_read(chip, AK4113_REG_RCS2);
0087     err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops);
0088     if (err < 0)
0089         goto __fail;
0090 
0091     if (r_ak4113)
0092         *r_ak4113 = chip;
0093     return 0;
0094 
0095 __fail:
0096     snd_ak4113_free(chip);
0097     return err;
0098 }
0099 EXPORT_SYMBOL_GPL(snd_ak4113_create);
0100 
0101 void snd_ak4113_reg_write(struct ak4113 *chip, unsigned char reg,
0102         unsigned char mask, unsigned char val)
0103 {
0104     if (reg >= AK4113_WRITABLE_REGS)
0105         return;
0106     reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
0107 }
0108 EXPORT_SYMBOL_GPL(snd_ak4113_reg_write);
0109 
0110 static void ak4113_init_regs(struct ak4113 *chip)
0111 {
0112     unsigned char old = chip->regmap[AK4113_REG_PWRDN], reg;
0113 
0114     /* bring the chip to reset state and powerdown state */
0115     reg_write(chip, AK4113_REG_PWRDN, old & ~(AK4113_RST|AK4113_PWN));
0116     udelay(200);
0117     /* release reset, but leave powerdown */
0118     reg_write(chip, AK4113_REG_PWRDN, (old | AK4113_RST) & ~AK4113_PWN);
0119     udelay(200);
0120     for (reg = 1; reg < AK4113_WRITABLE_REGS; reg++)
0121         reg_write(chip, reg, chip->regmap[reg]);
0122     /* release powerdown, everything is initialized now */
0123     reg_write(chip, AK4113_REG_PWRDN, old | AK4113_RST | AK4113_PWN);
0124 }
0125 
0126 void snd_ak4113_reinit(struct ak4113 *chip)
0127 {
0128     if (atomic_inc_return(&chip->wq_processing) == 1)
0129         cancel_delayed_work_sync(&chip->work);
0130     mutex_lock(&chip->reinit_mutex);
0131     ak4113_init_regs(chip);
0132     mutex_unlock(&chip->reinit_mutex);
0133     /* bring up statistics / event queing */
0134     if (atomic_dec_and_test(&chip->wq_processing))
0135         schedule_delayed_work(&chip->work, HZ / 10);
0136 }
0137 EXPORT_SYMBOL_GPL(snd_ak4113_reinit);
0138 
0139 static unsigned int external_rate(unsigned char rcs1)
0140 {
0141     switch (rcs1 & (AK4113_FS0|AK4113_FS1|AK4113_FS2|AK4113_FS3)) {
0142     case AK4113_FS_8000HZ:
0143         return 8000;
0144     case AK4113_FS_11025HZ:
0145         return 11025;
0146     case AK4113_FS_16000HZ:
0147         return 16000;
0148     case AK4113_FS_22050HZ:
0149         return 22050;
0150     case AK4113_FS_24000HZ:
0151         return 24000;
0152     case AK4113_FS_32000HZ:
0153         return 32000;
0154     case AK4113_FS_44100HZ:
0155         return 44100;
0156     case AK4113_FS_48000HZ:
0157         return 48000;
0158     case AK4113_FS_64000HZ:
0159         return 64000;
0160     case AK4113_FS_88200HZ:
0161         return 88200;
0162     case AK4113_FS_96000HZ:
0163         return 96000;
0164     case AK4113_FS_176400HZ:
0165         return 176400;
0166     case AK4113_FS_192000HZ:
0167         return 192000;
0168     default:
0169         return 0;
0170     }
0171 }
0172 
0173 static int snd_ak4113_in_error_info(struct snd_kcontrol *kcontrol,
0174                     struct snd_ctl_elem_info *uinfo)
0175 {
0176     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0177     uinfo->count = 1;
0178     uinfo->value.integer.min = 0;
0179     uinfo->value.integer.max = LONG_MAX;
0180     return 0;
0181 }
0182 
0183 static int snd_ak4113_in_error_get(struct snd_kcontrol *kcontrol,
0184                    struct snd_ctl_elem_value *ucontrol)
0185 {
0186     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0187 
0188     spin_lock_irq(&chip->lock);
0189     ucontrol->value.integer.value[0] =
0190         chip->errors[kcontrol->private_value];
0191     chip->errors[kcontrol->private_value] = 0;
0192     spin_unlock_irq(&chip->lock);
0193     return 0;
0194 }
0195 
0196 #define snd_ak4113_in_bit_info      snd_ctl_boolean_mono_info
0197 
0198 static int snd_ak4113_in_bit_get(struct snd_kcontrol *kcontrol,
0199                  struct snd_ctl_elem_value *ucontrol)
0200 {
0201     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0202     unsigned char reg = kcontrol->private_value & 0xff;
0203     unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
0204     unsigned char inv = (kcontrol->private_value >> 31) & 1;
0205 
0206     ucontrol->value.integer.value[0] =
0207         ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
0208     return 0;
0209 }
0210 
0211 static int snd_ak4113_rx_info(struct snd_kcontrol *kcontrol,
0212                   struct snd_ctl_elem_info *uinfo)
0213 {
0214     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0215     uinfo->count = 1;
0216     uinfo->value.integer.min = 0;
0217     uinfo->value.integer.max = 5;
0218     return 0;
0219 }
0220 
0221 static int snd_ak4113_rx_get(struct snd_kcontrol *kcontrol,
0222                  struct snd_ctl_elem_value *ucontrol)
0223 {
0224     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0225 
0226     ucontrol->value.integer.value[0] =
0227         (AK4113_IPS(chip->regmap[AK4113_REG_IO1]));
0228     return 0;
0229 }
0230 
0231 static int snd_ak4113_rx_put(struct snd_kcontrol *kcontrol,
0232                  struct snd_ctl_elem_value *ucontrol)
0233 {
0234     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0235     int change;
0236     u8 old_val;
0237 
0238     spin_lock_irq(&chip->lock);
0239     old_val = chip->regmap[AK4113_REG_IO1];
0240     change = ucontrol->value.integer.value[0] != AK4113_IPS(old_val);
0241     if (change)
0242         reg_write(chip, AK4113_REG_IO1,
0243                 (old_val & (~AK4113_IPS(0xff))) |
0244                 (AK4113_IPS(ucontrol->value.integer.value[0])));
0245     spin_unlock_irq(&chip->lock);
0246     return change;
0247 }
0248 
0249 static int snd_ak4113_rate_info(struct snd_kcontrol *kcontrol,
0250                 struct snd_ctl_elem_info *uinfo)
0251 {
0252     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0253     uinfo->count = 1;
0254     uinfo->value.integer.min = 0;
0255     uinfo->value.integer.max = 192000;
0256     return 0;
0257 }
0258 
0259 static int snd_ak4113_rate_get(struct snd_kcontrol *kcontrol,
0260                    struct snd_ctl_elem_value *ucontrol)
0261 {
0262     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0263 
0264     ucontrol->value.integer.value[0] = external_rate(reg_read(chip,
0265                 AK4113_REG_RCS1));
0266     return 0;
0267 }
0268 
0269 static int snd_ak4113_spdif_info(struct snd_kcontrol *kcontrol,
0270         struct snd_ctl_elem_info *uinfo)
0271 {
0272     uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
0273     uinfo->count = 1;
0274     return 0;
0275 }
0276 
0277 static int snd_ak4113_spdif_get(struct snd_kcontrol *kcontrol,
0278                 struct snd_ctl_elem_value *ucontrol)
0279 {
0280     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0281     unsigned i;
0282 
0283     for (i = 0; i < AK4113_REG_RXCSB_SIZE; i++)
0284         ucontrol->value.iec958.status[i] = reg_read(chip,
0285                 AK4113_REG_RXCSB0 + i);
0286     return 0;
0287 }
0288 
0289 static int snd_ak4113_spdif_mask_info(struct snd_kcontrol *kcontrol,
0290         struct snd_ctl_elem_info *uinfo)
0291 {
0292     uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
0293     uinfo->count = 1;
0294     return 0;
0295 }
0296 
0297 static int snd_ak4113_spdif_mask_get(struct snd_kcontrol *kcontrol,
0298                       struct snd_ctl_elem_value *ucontrol)
0299 {
0300     memset(ucontrol->value.iec958.status, 0xff, AK4113_REG_RXCSB_SIZE);
0301     return 0;
0302 }
0303 
0304 static int snd_ak4113_spdif_pinfo(struct snd_kcontrol *kcontrol,
0305         struct snd_ctl_elem_info *uinfo)
0306 {
0307     uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
0308     uinfo->value.integer.min = 0;
0309     uinfo->value.integer.max = 0xffff;
0310     uinfo->count = 4;
0311     return 0;
0312 }
0313 
0314 static int snd_ak4113_spdif_pget(struct snd_kcontrol *kcontrol,
0315                  struct snd_ctl_elem_value *ucontrol)
0316 {
0317     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0318     unsigned short tmp;
0319 
0320     ucontrol->value.integer.value[0] = 0xf8f2;
0321     ucontrol->value.integer.value[1] = 0x4e1f;
0322     tmp = reg_read(chip, AK4113_REG_Pc0) |
0323         (reg_read(chip, AK4113_REG_Pc1) << 8);
0324     ucontrol->value.integer.value[2] = tmp;
0325     tmp = reg_read(chip, AK4113_REG_Pd0) |
0326         (reg_read(chip, AK4113_REG_Pd1) << 8);
0327     ucontrol->value.integer.value[3] = tmp;
0328     return 0;
0329 }
0330 
0331 static int snd_ak4113_spdif_qinfo(struct snd_kcontrol *kcontrol,
0332         struct snd_ctl_elem_info *uinfo)
0333 {
0334     uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
0335     uinfo->count = AK4113_REG_QSUB_SIZE;
0336     return 0;
0337 }
0338 
0339 static int snd_ak4113_spdif_qget(struct snd_kcontrol *kcontrol,
0340                  struct snd_ctl_elem_value *ucontrol)
0341 {
0342     struct ak4113 *chip = snd_kcontrol_chip(kcontrol);
0343     unsigned i;
0344 
0345     for (i = 0; i < AK4113_REG_QSUB_SIZE; i++)
0346         ucontrol->value.bytes.data[i] = reg_read(chip,
0347                 AK4113_REG_QSUB_ADDR + i);
0348     return 0;
0349 }
0350 
0351 /* Don't forget to change AK4113_CONTROLS define!!! */
0352 static const struct snd_kcontrol_new snd_ak4113_iec958_controls[] = {
0353 {
0354     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0355     .name =     "IEC958 Parity Errors",
0356     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0357         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0358     .info =     snd_ak4113_in_error_info,
0359     .get =      snd_ak4113_in_error_get,
0360     .private_value = AK4113_PARITY_ERRORS,
0361 },
0362 {
0363     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0364     .name =     "IEC958 V-Bit Errors",
0365     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0366         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0367     .info =     snd_ak4113_in_error_info,
0368     .get =      snd_ak4113_in_error_get,
0369     .private_value = AK4113_V_BIT_ERRORS,
0370 },
0371 {
0372     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0373     .name =     "IEC958 C-CRC Errors",
0374     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0375         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0376     .info =     snd_ak4113_in_error_info,
0377     .get =      snd_ak4113_in_error_get,
0378     .private_value = AK4113_CCRC_ERRORS,
0379 },
0380 {
0381     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0382     .name =     "IEC958 Q-CRC Errors",
0383     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0384         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0385     .info =     snd_ak4113_in_error_info,
0386     .get =      snd_ak4113_in_error_get,
0387     .private_value = AK4113_QCRC_ERRORS,
0388 },
0389 {
0390     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0391     .name =     "IEC958 External Rate",
0392     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0393         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0394     .info =     snd_ak4113_rate_info,
0395     .get =      snd_ak4113_rate_get,
0396 },
0397 {
0398     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0399     .name =     SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
0400     .access =   SNDRV_CTL_ELEM_ACCESS_READ,
0401     .info =     snd_ak4113_spdif_mask_info,
0402     .get =      snd_ak4113_spdif_mask_get,
0403 },
0404 {
0405     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0406     .name =     SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
0407     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0408         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0409     .info =     snd_ak4113_spdif_info,
0410     .get =      snd_ak4113_spdif_get,
0411 },
0412 {
0413     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0414     .name =     "IEC958 Preamble Capture Default",
0415     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0416         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0417     .info =     snd_ak4113_spdif_pinfo,
0418     .get =      snd_ak4113_spdif_pget,
0419 },
0420 {
0421     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0422     .name =     "IEC958 Q-subcode Capture Default",
0423     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0424         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0425     .info =     snd_ak4113_spdif_qinfo,
0426     .get =      snd_ak4113_spdif_qget,
0427 },
0428 {
0429     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0430     .name =     "IEC958 Audio",
0431     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0432         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0433     .info =     snd_ak4113_in_bit_info,
0434     .get =      snd_ak4113_in_bit_get,
0435     .private_value = (1<<31) | (1<<8) | AK4113_REG_RCS0,
0436 },
0437 {
0438     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0439     .name =     "IEC958 Non-PCM Bitstream",
0440     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0441         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0442     .info =     snd_ak4113_in_bit_info,
0443     .get =      snd_ak4113_in_bit_get,
0444     .private_value = (0<<8) | AK4113_REG_RCS1,
0445 },
0446 {
0447     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0448     .name =     "IEC958 DTS Bitstream",
0449     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0450         SNDRV_CTL_ELEM_ACCESS_VOLATILE,
0451     .info =     snd_ak4113_in_bit_info,
0452     .get =      snd_ak4113_in_bit_get,
0453     .private_value = (1<<8) | AK4113_REG_RCS1,
0454 },
0455 {
0456     .iface =    SNDRV_CTL_ELEM_IFACE_PCM,
0457     .name =     "AK4113 Input Select",
0458     .access =   SNDRV_CTL_ELEM_ACCESS_READ |
0459         SNDRV_CTL_ELEM_ACCESS_WRITE,
0460     .info =     snd_ak4113_rx_info,
0461     .get =      snd_ak4113_rx_get,
0462     .put =      snd_ak4113_rx_put,
0463 }
0464 };
0465 
0466 static void snd_ak4113_proc_regs_read(struct snd_info_entry *entry,
0467         struct snd_info_buffer *buffer)
0468 {
0469     struct ak4113 *ak4113 = entry->private_data;
0470     int reg, val;
0471     /* all ak4113 registers 0x00 - 0x1c */
0472     for (reg = 0; reg < 0x1d; reg++) {
0473         val = reg_read(ak4113, reg);
0474         snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
0475     }
0476 }
0477 
0478 static void snd_ak4113_proc_init(struct ak4113 *ak4113)
0479 {
0480     snd_card_ro_proc_new(ak4113->card, "ak4113", ak4113,
0481                  snd_ak4113_proc_regs_read);
0482 }
0483 
0484 int snd_ak4113_build(struct ak4113 *ak4113,
0485         struct snd_pcm_substream *cap_substream)
0486 {
0487     struct snd_kcontrol *kctl;
0488     unsigned int idx;
0489     int err;
0490 
0491     if (snd_BUG_ON(!cap_substream))
0492         return -EINVAL;
0493     ak4113->substream = cap_substream;
0494     for (idx = 0; idx < AK4113_CONTROLS; idx++) {
0495         kctl = snd_ctl_new1(&snd_ak4113_iec958_controls[idx], ak4113);
0496         if (kctl == NULL)
0497             return -ENOMEM;
0498         kctl->id.device = cap_substream->pcm->device;
0499         kctl->id.subdevice = cap_substream->number;
0500         err = snd_ctl_add(ak4113->card, kctl);
0501         if (err < 0)
0502             return err;
0503         ak4113->kctls[idx] = kctl;
0504     }
0505     snd_ak4113_proc_init(ak4113);
0506     /* trigger workq */
0507     schedule_delayed_work(&ak4113->work, HZ / 10);
0508     return 0;
0509 }
0510 EXPORT_SYMBOL_GPL(snd_ak4113_build);
0511 
0512 int snd_ak4113_external_rate(struct ak4113 *ak4113)
0513 {
0514     unsigned char rcs1;
0515 
0516     rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
0517     return external_rate(rcs1);
0518 }
0519 EXPORT_SYMBOL_GPL(snd_ak4113_external_rate);
0520 
0521 int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags)
0522 {
0523     struct snd_pcm_runtime *runtime =
0524         ak4113->substream ? ak4113->substream->runtime : NULL;
0525     unsigned long _flags;
0526     int res = 0;
0527     unsigned char rcs0, rcs1, rcs2;
0528     unsigned char c0, c1;
0529 
0530     rcs1 = reg_read(ak4113, AK4113_REG_RCS1);
0531     if (flags & AK4113_CHECK_NO_STAT)
0532         goto __rate;
0533     rcs0 = reg_read(ak4113, AK4113_REG_RCS0);
0534     rcs2 = reg_read(ak4113, AK4113_REG_RCS2);
0535     spin_lock_irqsave(&ak4113->lock, _flags);
0536     if (rcs0 & AK4113_PAR)
0537         ak4113->errors[AK4113_PARITY_ERRORS]++;
0538     if (rcs0 & AK4113_V)
0539         ak4113->errors[AK4113_V_BIT_ERRORS]++;
0540     if (rcs2 & AK4113_CCRC)
0541         ak4113->errors[AK4113_CCRC_ERRORS]++;
0542     if (rcs2 & AK4113_QCRC)
0543         ak4113->errors[AK4113_QCRC_ERRORS]++;
0544     c0 = (ak4113->rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
0545                 AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK)) ^
0546         (rcs0 & (AK4113_QINT | AK4113_CINT | AK4113_STC |
0547              AK4113_AUDION | AK4113_AUTO | AK4113_UNLCK));
0548     c1 = (ak4113->rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
0549                 AK4113_DAT | 0xf0)) ^
0550         (rcs1 & (AK4113_DTSCD | AK4113_NPCM | AK4113_PEM |
0551              AK4113_DAT | 0xf0));
0552     ak4113->rcs0 = rcs0 & ~(AK4113_QINT | AK4113_CINT | AK4113_STC);
0553     ak4113->rcs1 = rcs1;
0554     ak4113->rcs2 = rcs2;
0555     spin_unlock_irqrestore(&ak4113->lock, _flags);
0556 
0557     if (rcs0 & AK4113_PAR)
0558         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0559                 &ak4113->kctls[0]->id);
0560     if (rcs0 & AK4113_V)
0561         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0562                 &ak4113->kctls[1]->id);
0563     if (rcs2 & AK4113_CCRC)
0564         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0565                 &ak4113->kctls[2]->id);
0566     if (rcs2 & AK4113_QCRC)
0567         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0568                 &ak4113->kctls[3]->id);
0569 
0570     /* rate change */
0571     if (c1 & 0xf0)
0572         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0573                 &ak4113->kctls[4]->id);
0574 
0575     if ((c1 & AK4113_PEM) | (c0 & AK4113_CINT))
0576         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0577                 &ak4113->kctls[6]->id);
0578     if (c0 & AK4113_QINT)
0579         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0580                 &ak4113->kctls[8]->id);
0581 
0582     if (c0 & AK4113_AUDION)
0583         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0584                 &ak4113->kctls[9]->id);
0585     if (c1 & AK4113_NPCM)
0586         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0587                 &ak4113->kctls[10]->id);
0588     if (c1 & AK4113_DTSCD)
0589         snd_ctl_notify(ak4113->card, SNDRV_CTL_EVENT_MASK_VALUE,
0590                 &ak4113->kctls[11]->id);
0591 
0592     if (ak4113->change_callback && (c0 | c1) != 0)
0593         ak4113->change_callback(ak4113, c0, c1);
0594 
0595 __rate:
0596     /* compare rate */
0597     res = external_rate(rcs1);
0598     if (!(flags & AK4113_CHECK_NO_RATE) && runtime &&
0599             (runtime->rate != res)) {
0600         snd_pcm_stream_lock_irqsave(ak4113->substream, _flags);
0601         if (snd_pcm_running(ak4113->substream)) {
0602             /*printk(KERN_DEBUG "rate changed (%i <- %i)\n",
0603              * runtime->rate, res); */
0604             snd_pcm_stop(ak4113->substream,
0605                     SNDRV_PCM_STATE_DRAINING);
0606             wake_up(&runtime->sleep);
0607             res = 1;
0608         }
0609         snd_pcm_stream_unlock_irqrestore(ak4113->substream, _flags);
0610     }
0611     return res;
0612 }
0613 EXPORT_SYMBOL_GPL(snd_ak4113_check_rate_and_errors);
0614 
0615 static void ak4113_stats(struct work_struct *work)
0616 {
0617     struct ak4113 *chip = container_of(work, struct ak4113, work.work);
0618 
0619     if (atomic_inc_return(&chip->wq_processing) == 1)
0620         snd_ak4113_check_rate_and_errors(chip, chip->check_flags);
0621 
0622     if (atomic_dec_and_test(&chip->wq_processing))
0623         schedule_delayed_work(&chip->work, HZ / 10);
0624 }
0625 
0626 #ifdef CONFIG_PM
0627 void snd_ak4113_suspend(struct ak4113 *chip)
0628 {
0629     atomic_inc(&chip->wq_processing); /* don't schedule new work */
0630     cancel_delayed_work_sync(&chip->work);
0631 }
0632 EXPORT_SYMBOL(snd_ak4113_suspend);
0633 
0634 void snd_ak4113_resume(struct ak4113 *chip)
0635 {
0636     atomic_dec(&chip->wq_processing);
0637     snd_ak4113_reinit(chip);
0638 }
0639 EXPORT_SYMBOL(snd_ak4113_resume);
0640 #endif
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