sound/hda/hdac_i915.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  *  hdac_i915.c - routines for sync between HD-A core and i915 display driver
0004  */
0005
0006 #include <linux/init.h>
0007 #include <linux/module.h>
0008 #include <linux/pci.h>
0009 #include <sound/core.h>
0010 #include <sound/hdaudio.h>
0011 #include <sound/hda_i915.h>
0012 #include <sound/hda_register.h>
0013
0014 #define IS_HSW_CONTROLLER(pci) (((pci)->device == 0x0a0c) || \
0015                 ((pci)->device == 0x0c0c) || \
0016                 ((pci)->device == 0x0d0c) || \
0017                 ((pci)->device == 0x160c))
0018
0019 /**
0020  * snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
0021  * @bus: HDA core bus
0022  *
0023  * Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
0024  * depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
0025  * are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
0026  * BCLK = CDCLK * M / N
0027  * The values will be lost when the display power well is disabled and need to
0028  * be restored to avoid abnormal playback speed.
0029  *
0030  * Call this function at initializing and changing power well, as well as
0031  * at ELD notifier for the hotplug.
0032  */
0033 void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
0034 {
0035     struct drm_audio_component *acomp = bus->audio_component;
0036     struct pci_dev *pci = to_pci_dev(bus->dev);
0037     int cdclk_freq;
0038     unsigned int bclk_m, bclk_n;
0039
0040     if (!acomp || !acomp->ops || !acomp->ops->get_cdclk_freq)
0041         return; /* only for i915 binding */
0042     if (!IS_HSW_CONTROLLER(pci))
0043         return; /* only HSW/BDW */
0044
0045     cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev);
0046     switch (cdclk_freq) {
0047     case 337500:
0048         bclk_m = 16;
0049         bclk_n = 225;
0050         break;
0051
0052     case 450000:
0053     default: /* default CDCLK 450MHz */
0054         bclk_m = 4;
0055         bclk_n = 75;
0056         break;
0057
0058     case 540000:
0059         bclk_m = 4;
0060         bclk_n = 90;
0061         break;
0062
0063     case 675000:
0064         bclk_m = 8;
0065         bclk_n = 225;
0066         break;
0067     }
0068
0069     snd_hdac_chip_writew(bus, HSW_EM4, bclk_m);
0070     snd_hdac_chip_writew(bus, HSW_EM5, bclk_n);
0071 }
0072 EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk);
0073
0074 /* returns true if the devices can be connected for audio */
0075 static bool connectivity_check(struct pci_dev *i915, struct pci_dev *hdac)
0076 {
0077     struct pci_bus *bus_a = i915->bus, *bus_b = hdac->bus;
0078
0079     /* directly connected on the same bus */
0080     if (bus_a == bus_b)
0081         return true;
0082
0083     /*
0084      * on i915 discrete GPUs with embedded HDA audio, the two
0085      * devices are connected via 2nd level PCI bridge
0086      */
0087     bus_a = bus_a->parent;
0088     bus_b = bus_b->parent;
0089     if (!bus_a || !bus_b)
0090         return false;
0091     bus_a = bus_a->parent;
0092     bus_b = bus_b->parent;
0093     if (bus_a && bus_a == bus_b)
0094         return true;
0095
0096     return false;
0097 }
0098
0099 static int i915_component_master_match(struct device *dev, int subcomponent,
0100                        void *data)
0101 {
0102     struct pci_dev *hdac_pci, *i915_pci;
0103     struct hdac_bus *bus = data;
0104
0105     if (!dev_is_pci(dev))
0106         return 0;
0107
0108     hdac_pci = to_pci_dev(bus->dev);
0109     i915_pci = to_pci_dev(dev);
0110
0111     if (!strcmp(dev->driver->name, "i915") &&
0112         subcomponent == I915_COMPONENT_AUDIO &&
0113         connectivity_check(i915_pci, hdac_pci))
0114         return 1;
0115
0116     return 0;
0117 }
0118
0119 /* check whether Intel graphics is present and reachable */
0120 static int i915_gfx_present(struct pci_dev *hdac_pci)
0121 {
0122     struct pci_dev *display_dev = NULL;
0123
0124     for_each_pci_dev(display_dev) {
0125         if (display_dev->vendor == PCI_VENDOR_ID_INTEL &&
0126             (display_dev->class >> 16) == PCI_BASE_CLASS_DISPLAY &&
0127             connectivity_check(display_dev, hdac_pci)) {
0128             pci_dev_put(display_dev);
0129             return true;
0130         }
0131     }
0132
0133     return false;
0134 }
0135
0136 /**
0137  * snd_hdac_i915_init - Initialize i915 audio component
0138  * @bus: HDA core bus
0139  *
0140  * This function is supposed to be used only by a HD-audio controller
0141  * driver that needs the interaction with i915 graphics.
0142  *
0143  * This function initializes and sets up the audio component to communicate
0144  * with i915 graphics driver.
0145  *
0146  * Returns zero for success or a negative error code.
0147  */
0148 int snd_hdac_i915_init(struct hdac_bus *bus)
0149 {
0150     struct drm_audio_component *acomp;
0151     int err;
0152
0153     if (!i915_gfx_present(to_pci_dev(bus->dev)))
0154         return -ENODEV;
0155
0156     err = snd_hdac_acomp_init(bus, NULL,
0157                   i915_component_master_match,
0158                   sizeof(struct i915_audio_component) - sizeof(*acomp));
0159     if (err < 0)
0160         return err;
0161     acomp = bus->audio_component;
0162     if (!acomp)
0163         return -ENODEV;
0164     if (!acomp->ops) {
0165         if (!IS_ENABLED(CONFIG_MODULES) ||
0166             !request_module("i915")) {
0167             /* 60s timeout */
0168             wait_for_completion_killable_timeout(&acomp->master_bind_complete,
0169                                  msecs_to_jiffies(60 * 1000));
0170         }
0171     }
0172     if (!acomp->ops) {
0173         dev_info(bus->dev, "couldn't bind with audio component\n");
0174         snd_hdac_acomp_exit(bus);
0175         return -ENODEV;
0176     }
0177     return 0;
0178 }
0179 EXPORT_SYMBOL_GPL(snd_hdac_i915_init);