Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * HD-audio core bus driver
0004  */
0005 
0006 #include <linux/init.h>
0007 #include <linux/io.h>
0008 #include <linux/device.h>
0009 #include <linux/module.h>
0010 #include <linux/export.h>
0011 #include <sound/hdaudio.h>
0012 #include "local.h"
0013 #include "trace.h"
0014 
0015 static void snd_hdac_bus_process_unsol_events(struct work_struct *work);
0016 
0017 static const struct hdac_bus_ops default_ops = {
0018     .command = snd_hdac_bus_send_cmd,
0019     .get_response = snd_hdac_bus_get_response,
0020     .link_power = snd_hdac_bus_link_power,
0021 };
0022 
0023 /**
0024  * snd_hdac_bus_init - initialize a HD-audio bas bus
0025  * @bus: the pointer to bus object
0026  * @dev: device pointer
0027  * @ops: bus verb operators
0028  *
0029  * Returns 0 if successful, or a negative error code.
0030  */
0031 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
0032               const struct hdac_bus_ops *ops)
0033 {
0034     memset(bus, 0, sizeof(*bus));
0035     bus->dev = dev;
0036     if (ops)
0037         bus->ops = ops;
0038     else
0039         bus->ops = &default_ops;
0040     bus->dma_type = SNDRV_DMA_TYPE_DEV;
0041     INIT_LIST_HEAD(&bus->stream_list);
0042     INIT_LIST_HEAD(&bus->codec_list);
0043     INIT_WORK(&bus->unsol_work, snd_hdac_bus_process_unsol_events);
0044     spin_lock_init(&bus->reg_lock);
0045     mutex_init(&bus->cmd_mutex);
0046     mutex_init(&bus->lock);
0047     INIT_LIST_HEAD(&bus->hlink_list);
0048     init_waitqueue_head(&bus->rirb_wq);
0049     bus->irq = -1;
0050 
0051     /*
0052      * Default value of '8' is as per the HD audio specification (Rev 1.0a).
0053      * Following relation is used to derive STRIPE control value.
0054      *  For sample rate <= 48K:
0055      *   { ((num_channels * bits_per_sample) / number of SDOs) >= 8 }
0056      *  For sample rate > 48K:
0057      *   { ((num_channels * bits_per_sample * rate/48000) /
0058      *  number of SDOs) >= 8 }
0059      */
0060     bus->sdo_limit = 8;
0061 
0062     return 0;
0063 }
0064 EXPORT_SYMBOL_GPL(snd_hdac_bus_init);
0065 
0066 /**
0067  * snd_hdac_bus_exit - clean up a HD-audio bas bus
0068  * @bus: the pointer to bus object
0069  */
0070 void snd_hdac_bus_exit(struct hdac_bus *bus)
0071 {
0072     WARN_ON(!list_empty(&bus->stream_list));
0073     WARN_ON(!list_empty(&bus->codec_list));
0074     cancel_work_sync(&bus->unsol_work);
0075 }
0076 EXPORT_SYMBOL_GPL(snd_hdac_bus_exit);
0077 
0078 /**
0079  * snd_hdac_bus_exec_verb - execute a HD-audio verb on the given bus
0080  * @bus: bus object
0081  * @addr: the HDAC device address
0082  * @cmd: HD-audio encoded verb
0083  * @res: pointer to store the response, NULL if performing asynchronously
0084  *
0085  * Returns 0 if successful, or a negative error code.
0086  */
0087 int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
0088                unsigned int cmd, unsigned int *res)
0089 {
0090     int err;
0091 
0092     mutex_lock(&bus->cmd_mutex);
0093     err = snd_hdac_bus_exec_verb_unlocked(bus, addr, cmd, res);
0094     mutex_unlock(&bus->cmd_mutex);
0095     return err;
0096 }
0097 
0098 /**
0099  * snd_hdac_bus_exec_verb_unlocked - unlocked version
0100  * @bus: bus object
0101  * @addr: the HDAC device address
0102  * @cmd: HD-audio encoded verb
0103  * @res: pointer to store the response, NULL if performing asynchronously
0104  *
0105  * Returns 0 if successful, or a negative error code.
0106  */
0107 int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
0108                     unsigned int cmd, unsigned int *res)
0109 {
0110     unsigned int tmp;
0111     int err;
0112 
0113     if (cmd == ~0)
0114         return -EINVAL;
0115 
0116     if (res)
0117         *res = -1;
0118     else if (bus->sync_write)
0119         res = &tmp;
0120     for (;;) {
0121         trace_hda_send_cmd(bus, cmd);
0122         err = bus->ops->command(bus, cmd);
0123         if (err != -EAGAIN)
0124             break;
0125         /* process pending verbs */
0126         err = bus->ops->get_response(bus, addr, &tmp);
0127         if (err)
0128             break;
0129     }
0130     if (!err && res) {
0131         err = bus->ops->get_response(bus, addr, res);
0132         trace_hda_get_response(bus, addr, *res);
0133     }
0134     return err;
0135 }
0136 EXPORT_SYMBOL_GPL(snd_hdac_bus_exec_verb_unlocked);
0137 
0138 /**
0139  * snd_hdac_bus_queue_event - add an unsolicited event to queue
0140  * @bus: the BUS
0141  * @res: unsolicited event (lower 32bit of RIRB entry)
0142  * @res_ex: codec addr and flags (upper 32bit or RIRB entry)
0143  *
0144  * Adds the given event to the queue.  The events are processed in
0145  * the workqueue asynchronously.  Call this function in the interrupt
0146  * hanlder when RIRB receives an unsolicited event.
0147  */
0148 void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex)
0149 {
0150     unsigned int wp;
0151 
0152     if (!bus)
0153         return;
0154 
0155     trace_hda_unsol_event(bus, res, res_ex);
0156     wp = (bus->unsol_wp + 1) % HDA_UNSOL_QUEUE_SIZE;
0157     bus->unsol_wp = wp;
0158 
0159     wp <<= 1;
0160     bus->unsol_queue[wp] = res;
0161     bus->unsol_queue[wp + 1] = res_ex;
0162 
0163     schedule_work(&bus->unsol_work);
0164 }
0165 
0166 /*
0167  * process queued unsolicited events
0168  */
0169 static void snd_hdac_bus_process_unsol_events(struct work_struct *work)
0170 {
0171     struct hdac_bus *bus = container_of(work, struct hdac_bus, unsol_work);
0172     struct hdac_device *codec;
0173     struct hdac_driver *drv;
0174     unsigned int rp, caddr, res;
0175 
0176     spin_lock_irq(&bus->reg_lock);
0177     while (bus->unsol_rp != bus->unsol_wp) {
0178         rp = (bus->unsol_rp + 1) % HDA_UNSOL_QUEUE_SIZE;
0179         bus->unsol_rp = rp;
0180         rp <<= 1;
0181         res = bus->unsol_queue[rp];
0182         caddr = bus->unsol_queue[rp + 1];
0183         if (!(caddr & (1 << 4))) /* no unsolicited event? */
0184             continue;
0185         codec = bus->caddr_tbl[caddr & 0x0f];
0186         if (!codec || !codec->registered)
0187             continue;
0188         spin_unlock_irq(&bus->reg_lock);
0189         drv = drv_to_hdac_driver(codec->dev.driver);
0190         if (drv->unsol_event)
0191             drv->unsol_event(codec, res);
0192         spin_lock_irq(&bus->reg_lock);
0193     }
0194     spin_unlock_irq(&bus->reg_lock);
0195 }
0196 
0197 /**
0198  * snd_hdac_bus_add_device - Add a codec to bus
0199  * @bus: HDA core bus
0200  * @codec: HDA core device to add
0201  *
0202  * Adds the given codec to the list in the bus.  The caddr_tbl array
0203  * and codec_powered bits are updated, as well.
0204  * Returns zero if success, or a negative error code.
0205  */
0206 int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec)
0207 {
0208     if (bus->caddr_tbl[codec->addr]) {
0209         dev_err(bus->dev, "address 0x%x is already occupied\n",
0210             codec->addr);
0211         return -EBUSY;
0212     }
0213 
0214     list_add_tail(&codec->list, &bus->codec_list);
0215     bus->caddr_tbl[codec->addr] = codec;
0216     set_bit(codec->addr, &bus->codec_powered);
0217     bus->num_codecs++;
0218     return 0;
0219 }
0220 
0221 /**
0222  * snd_hdac_bus_remove_device - Remove a codec from bus
0223  * @bus: HDA core bus
0224  * @codec: HDA core device to remove
0225  */
0226 void snd_hdac_bus_remove_device(struct hdac_bus *bus,
0227                 struct hdac_device *codec)
0228 {
0229     WARN_ON(bus != codec->bus);
0230     if (list_empty(&codec->list))
0231         return;
0232     list_del_init(&codec->list);
0233     bus->caddr_tbl[codec->addr] = NULL;
0234     clear_bit(codec->addr, &bus->codec_powered);
0235     bus->num_codecs--;
0236     flush_work(&bus->unsol_work);
0237 }
0238 
0239 #ifdef CONFIG_SND_HDA_ALIGNED_MMIO
0240 /* Helpers for aligned read/write of mmio space, for Tegra */
0241 unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask)
0242 {
0243     void __iomem *aligned_addr =
0244         (void __iomem *)((unsigned long)(addr) & ~0x3);
0245     unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
0246     unsigned int v;
0247 
0248     v = readl(aligned_addr);
0249     return (v >> shift) & mask;
0250 }
0251 EXPORT_SYMBOL_GPL(snd_hdac_aligned_read);
0252 
0253 void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
0254                 unsigned int mask)
0255 {
0256     void __iomem *aligned_addr =
0257         (void __iomem *)((unsigned long)(addr) & ~0x3);
0258     unsigned int shift = ((unsigned long)(addr) & 0x3) << 3;
0259     unsigned int v;
0260 
0261     v = readl(aligned_addr);
0262     v &= ~(mask << shift);
0263     v |= val << shift;
0264     writel(v, aligned_addr);
0265 }
0266 EXPORT_SYMBOL_GPL(snd_hdac_aligned_write);
0267 #endif /* CONFIG_SND_HDA_ALIGNED_MMIO */
0268 
0269 void snd_hdac_codec_link_up(struct hdac_device *codec)
0270 {
0271     struct hdac_bus *bus = codec->bus;
0272 
0273     if (bus->ops->link_power)
0274         bus->ops->link_power(codec, true);
0275     else
0276         snd_hdac_bus_link_power(codec, true);
0277 }
0278 EXPORT_SYMBOL_GPL(snd_hdac_codec_link_up);
0279 
0280 void snd_hdac_codec_link_down(struct hdac_device *codec)
0281 {
0282     struct hdac_bus *bus = codec->bus;
0283 
0284     if (bus->ops->link_power)
0285         bus->ops->link_power(codec, false);
0286     else
0287         snd_hdac_bus_link_power(codec, false);
0288 }
0289 EXPORT_SYMBOL_GPL(snd_hdac_codec_link_down);