firewire/motu/motu-protocol-v1.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002
0003 // motu-protocol-v1.c - a part of driver for MOTU FireWire series
0004 //
0005 // Copyright (c) 2021 Takashi Sakamoto <o-takashi@sakamocchi.jp>
0006 //
0007 // Licensed under the terms of the GNU General Public License, version 2.
0008
0009 #include "motu.h"
0010
0011 #include <linux/delay.h>
0012
0013 // Status register for MOTU 828 (0x'ffff'f000'0b00).
0014 //
0015 // 0xffff0000: ISOC_COMM_CONTROL_MASK in motu-stream.c.
0016 // 0x00008000: mode of optical input interface.
0017 //   0x00008000: for S/PDIF signal.
0018 //   0x00000000: disabled or for ADAT signal.
0019 // 0x00004000: mode of optical output interface.
0020 //   0x00004000: for S/PDIF signal.
0021 //   0x00000000: disabled or for ADAT signal.
0022 // 0x00003f00: monitor input mode.
0023 //   0x00000800: analog-1/2
0024 //   0x00001a00: analog-3/4
0025 //   0x00002c00: analog-5/6
0026 //   0x00003e00: analog-7/8
0027 //   0x00000000: analog-1
0028 //   0x00000900: analog-2
0029 //   0x00001200: analog-3
0030 //   0x00001b00: analog-4
0031 //   0x00002400: analog-5
0032 //   0x00002d00: analog-6
0033 //   0x00003600: analog-7
0034 //   0x00003f00: analog-8
0035 // 0x00000080: enable stream input.
0036 // 0x00000040: disable monitor input.
0037 // 0x00000008: enable main out.
0038 // 0x00000004: rate of sampling clock.
0039 //   0x00000004: 48.0 kHz
0040 //   0x00000000: 44.1 kHz
0041 // 0x00000023: source of sampling clock.
0042 //   0x00000003: source packet header (SPH)
0043 //   0x00000002: S/PDIF on optical/coaxial interface.
0044 //   0x00000021: ADAT on optical interface
0045 //   0x00000001: ADAT on Dsub 9pin
0046 //   0x00000000: internal
0047
0048 #define CLK_828_STATUS_OFFSET               0x0b00
0049 #define  CLK_828_STATUS_MASK                0x0000ffff
0050 #define  CLK_828_STATUS_FLAG_OPT_IN_IFACE_IS_SPDIF  0x00008000
0051 #define  CLK_828_STATUS_FLAG_OPT_OUT_IFACE_IS_SPDIF 0x00004000
0052 #define  CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES       0x00000080
0053 #define  CLK_828_STATUS_FLAG_ENABLE_OUTPUT      0x00000008
0054 #define  CLK_828_STATUS_FLAG_RATE_48000         0x00000004
0055 #define  CLK_828_STATUS_MASK_SRC            0x00000023
0056 #define   CLK_828_STATUS_FLAG_SRC_ADAT_ON_OPT       0x00000021
0057 #define   CLK_828_STATUS_FLAG_SRC_SPH           0x00000003
0058 #define   CLK_828_STATUS_FLAG_SRC_SPDIF         0x00000002
0059 #define   CLK_828_STATUS_FLAG_SRC_ADAT_ON_DSUB      0x00000001
0060 #define   CLK_828_STATUS_FLAG_SRC_INTERNAL      0x00000000
0061
0062 // Status register for MOTU 896 (0x'ffff'f000'0b14).
0063 //
0064 // 0xf0000000: enable physical and stream input to DAC.
0065 //   0x80000000: disable
0066 //   0x40000000: disable
0067 //   0x20000000: enable (prior to the other bits)
0068 //   0x10000000: disable
0069 //   0x00000000: disable
0070 // 0x08000000: speed of word clock signal output on BNC interface.
0071 //   0x00000000: force to low rate (44.1/48.0 kHz).
0072 //   0x08000000: follow to system clock.
0073 // 0x04000000: something relevant to clock.
0074 // 0x03000000: enable output.
0075 //  0x02000000: enabled irreversibly once standing unless the device voluntarily disables it.
0076 //  0x01000000: enabled irreversibly once standing unless the device voluntarily disables it.
0077 // 0x00ffff00: monitor input mode.
0078 //   0x00000000: disabled
0079 //   0x00004800: analog-1/2
0080 //   0x00005a00: analog-3/4
0081 //   0x00006c00: analog-5/6
0082 //   0x00007e00: analog-7/8
0083 //   0x00104800: AES/EBU-1/2
0084 //   0x00004000: analog-1
0085 //   0x00004900: analog-2
0086 //   0x00005200: analog-3
0087 //   0x00005b00: analog-4
0088 //   0x00006400: analog-5
0089 //   0x00006d00: analog-6
0090 //   0x00007600: analog-7
0091 //   0x00007f00: analog-8
0092 //   0x00104000: AES/EBU-1
0093 //   0x00104900: AES/EBU-2
0094 // 0x00000060: sample rate conversion for AES/EBU input/output.
0095 //   0x00000000: None
0096 //   0x00000020: input signal is converted to system rate
0097 //   0x00000040: output is slave to input, ignoring system rate
0098 //   0x00000060: output is double rate than system rate
0099 // 0x00000018: nominal rate of sampling clock.
0100 //   0x00000000: 44.1 kHz
0101 //   0x00000008: 48.0 kHz
0102 //   0x00000010: 88.2 kHz
0103 //   0x00000018: 96.0 kHz
0104 // 0x00000007: source of sampling clock.
0105 //   0x00000000: internal
0106 //   0x00000001: ADAT on optical interface
0107 //   0x00000002: AES/EBU on XLR
0108 //   0x00000003: source packet header (SPH)
0109 //   0x00000004: word clock on BNC
0110 //   0x00000005: ADAT on Dsub 9pin
0111
0112 #define CLK_896_STATUS_OFFSET           0x0b14
0113 #define  CLK_896_STATUS_FLAG_FETCH_ENABLE   0x20000000
0114 #define  CLK_896_STATUS_FLAG_OUTPUT_ON      0x03000000
0115 #define  CLK_896_STATUS_MASK_SRC        0x00000007
0116 #define   CLK_896_STATUS_FLAG_SRC_INTERNAL  0x00000000
0117 #define   CLK_896_STATUS_FLAG_SRC_ADAT_ON_OPT   0x00000001
0118 #define   CLK_896_STATUS_FLAG_SRC_AESEBU    0x00000002
0119 #define   CLK_896_STATUS_FLAG_SRC_SPH       0x00000003
0120 #define   CLK_896_STATUS_FLAG_SRC_WORD      0x00000004
0121 #define   CLK_896_STATUS_FLAG_SRC_ADAT_ON_DSUB  0x00000005
0122 #define  CLK_896_STATUS_MASK_RATE       0x00000018
0123 #define   CLK_896_STATUS_FLAG_RATE_44100    0x00000000
0124 #define   CLK_896_STATUS_FLAG_RATE_48000    0x00000008
0125 #define   CLK_896_STATUS_FLAG_RATE_88200    0x00000010
0126 #define   CLK_896_STATUS_FLAG_RATE_96000    0x00000018
0127
0128 static void parse_clock_rate_828(u32 data, unsigned int *rate)
0129 {
0130     if (data & CLK_828_STATUS_FLAG_RATE_48000)
0131         *rate = 48000;
0132     else
0133         *rate = 44100;
0134 }
0135
0136 static int get_clock_rate_828(struct snd_motu *motu, unsigned int *rate)
0137 {
0138     __be32 reg;
0139     int err;
0140
0141     err = snd_motu_transaction_read(motu, CLK_828_STATUS_OFFSET, &reg, sizeof(reg));
0142     if (err < 0)
0143         return err;
0144     parse_clock_rate_828(be32_to_cpu(reg), rate);
0145
0146     return 0;
0147 }
0148
0149 static int parse_clock_rate_896(u32 data, unsigned int *rate)
0150 {
0151     switch (data & CLK_896_STATUS_MASK_RATE) {
0152     case CLK_896_STATUS_FLAG_RATE_44100:
0153         *rate = 44100;
0154         break;
0155     case CLK_896_STATUS_FLAG_RATE_48000:
0156         *rate = 48000;
0157         break;
0158     case CLK_896_STATUS_FLAG_RATE_88200:
0159         *rate = 88200;
0160         break;
0161     case CLK_896_STATUS_FLAG_RATE_96000:
0162         *rate = 96000;
0163         break;
0164     default:
0165         return -ENXIO;
0166     }
0167
0168     return 0;
0169 }
0170
0171 static int get_clock_rate_896(struct snd_motu *motu, unsigned int *rate)
0172 {
0173     __be32 reg;
0174     int err;
0175
0176     err = snd_motu_transaction_read(motu, CLK_896_STATUS_OFFSET, &reg, sizeof(reg));
0177     if (err < 0)
0178         return err;
0179     return parse_clock_rate_896(be32_to_cpu(reg), rate);
0180 }
0181
0182 int snd_motu_protocol_v1_get_clock_rate(struct snd_motu *motu, unsigned int *rate)
0183 {
0184     if (motu->spec == &snd_motu_spec_828)
0185         return get_clock_rate_828(motu, rate);
0186     else if (motu->spec == &snd_motu_spec_896)
0187         return get_clock_rate_896(motu, rate);
0188     else
0189         return -ENXIO;
0190 }
0191
0192 static int set_clock_rate_828(struct snd_motu *motu, unsigned int rate)
0193 {
0194     __be32 reg;
0195     u32 data;
0196     int err;
0197
0198     err = snd_motu_transaction_read(motu, CLK_828_STATUS_OFFSET, &reg, sizeof(reg));
0199     if (err < 0)
0200         return err;
0201     data = be32_to_cpu(reg) & CLK_828_STATUS_MASK;
0202
0203     data &= ~CLK_828_STATUS_FLAG_RATE_48000;
0204     if (rate == 48000)
0205         data |= CLK_828_STATUS_FLAG_RATE_48000;
0206
0207     reg = cpu_to_be32(data);
0208     return snd_motu_transaction_write(motu, CLK_828_STATUS_OFFSET, &reg, sizeof(reg));
0209 }
0210
0211 static int set_clock_rate_896(struct snd_motu *motu, unsigned int rate)
0212 {
0213     unsigned int flag;
0214     __be32 reg;
0215     u32 data;
0216     int err;
0217
0218     err = snd_motu_transaction_read(motu, CLK_896_STATUS_OFFSET, &reg, sizeof(reg));
0219     if (err < 0)
0220         return err;
0221     data = be32_to_cpu(reg);
0222
0223     switch (rate) {
0224     case 44100:
0225         flag = CLK_896_STATUS_FLAG_RATE_44100;
0226         break;
0227     case 48000:
0228         flag = CLK_896_STATUS_FLAG_RATE_48000;
0229         break;
0230     case 88200:
0231         flag = CLK_896_STATUS_FLAG_RATE_88200;
0232         break;
0233     case 96000:
0234         flag = CLK_896_STATUS_FLAG_RATE_96000;
0235         break;
0236     default:
0237         return -EINVAL;
0238     }
0239
0240     data &= ~CLK_896_STATUS_MASK_RATE;
0241     data |= flag;
0242
0243     reg = cpu_to_be32(data);
0244     return snd_motu_transaction_write(motu, CLK_896_STATUS_OFFSET, &reg, sizeof(reg));
0245 }
0246
0247 int snd_motu_protocol_v1_set_clock_rate(struct snd_motu *motu, unsigned int rate)
0248 {
0249     if (motu->spec == &snd_motu_spec_828)
0250         return set_clock_rate_828(motu, rate);
0251     else if (motu->spec == &snd_motu_spec_896)
0252         return set_clock_rate_896(motu, rate);
0253     else
0254         return -ENXIO;
0255 }
0256
0257 static int get_clock_source_828(struct snd_motu *motu, enum snd_motu_clock_source *src)
0258 {
0259     __be32 reg;
0260     u32 data;
0261     int err;
0262
0263     err = snd_motu_transaction_read(motu, CLK_828_STATUS_OFFSET, &reg, sizeof(reg));
0264     if (err < 0)
0265         return err;
0266     data = be32_to_cpu(reg) & CLK_828_STATUS_MASK;
0267
0268     switch (data & CLK_828_STATUS_MASK_SRC) {
0269     case CLK_828_STATUS_FLAG_SRC_ADAT_ON_OPT:
0270         *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT;
0271         break;
0272     case CLK_828_STATUS_FLAG_SRC_SPH:
0273         *src = SND_MOTU_CLOCK_SOURCE_SPH;
0274         break;
0275     case CLK_828_STATUS_FLAG_SRC_SPDIF:
0276     {
0277         if (data & CLK_828_STATUS_FLAG_OPT_IN_IFACE_IS_SPDIF)
0278             *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_COAX;
0279         else
0280             *src = SND_MOTU_CLOCK_SOURCE_SPDIF_ON_OPT;
0281         break;
0282     }
0283     case CLK_828_STATUS_FLAG_SRC_ADAT_ON_DSUB:
0284         *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_DSUB;
0285         break;
0286     case CLK_828_STATUS_FLAG_SRC_INTERNAL:
0287         *src = SND_MOTU_CLOCK_SOURCE_INTERNAL;
0288         break;
0289     default:
0290         return -ENXIO;
0291     }
0292
0293     return 0;
0294 }
0295
0296 static int get_clock_source_896(struct snd_motu *motu, enum snd_motu_clock_source *src)
0297 {
0298     __be32 reg;
0299     u32 data;
0300     int err;
0301
0302     err = snd_motu_transaction_read(motu, CLK_896_STATUS_OFFSET, &reg, sizeof(reg));
0303     if (err < 0)
0304         return err;
0305     data = be32_to_cpu(reg);
0306
0307     switch (data & CLK_896_STATUS_MASK_SRC) {
0308     case CLK_896_STATUS_FLAG_SRC_INTERNAL:
0309         *src = SND_MOTU_CLOCK_SOURCE_INTERNAL;
0310         break;
0311     case CLK_896_STATUS_FLAG_SRC_ADAT_ON_OPT:
0312         *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_OPT;
0313         break;
0314     case CLK_896_STATUS_FLAG_SRC_AESEBU:
0315         *src = SND_MOTU_CLOCK_SOURCE_AESEBU_ON_XLR;
0316         break;
0317     case CLK_896_STATUS_FLAG_SRC_SPH:
0318         *src = SND_MOTU_CLOCK_SOURCE_SPH;
0319         break;
0320     case CLK_896_STATUS_FLAG_SRC_WORD:
0321         *src = SND_MOTU_CLOCK_SOURCE_WORD_ON_BNC;
0322         break;
0323     case CLK_896_STATUS_FLAG_SRC_ADAT_ON_DSUB:
0324         *src = SND_MOTU_CLOCK_SOURCE_ADAT_ON_DSUB;
0325         break;
0326     default:
0327         return -ENXIO;
0328     }
0329
0330     return 0;
0331 }
0332
0333 int snd_motu_protocol_v1_get_clock_source(struct snd_motu *motu, enum snd_motu_clock_source *src)
0334 {
0335     if (motu->spec == &snd_motu_spec_828)
0336         return get_clock_source_828(motu, src);
0337     else if (motu->spec == &snd_motu_spec_896)
0338         return get_clock_source_896(motu, src);
0339     else
0340         return -ENXIO;
0341 }
0342
0343 static int switch_fetching_mode_828(struct snd_motu *motu, bool enable)
0344 {
0345     __be32 reg;
0346     u32 data;
0347     int err;
0348
0349     err = snd_motu_transaction_read(motu, CLK_828_STATUS_OFFSET, &reg, sizeof(reg));
0350     if (err < 0)
0351         return err;
0352     data = be32_to_cpu(reg) & CLK_828_STATUS_MASK;
0353
0354     data &= ~(CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES | CLK_828_STATUS_FLAG_ENABLE_OUTPUT);
0355     if (enable) {
0356         // This transaction should be initiated after the device receives batch of packets
0357         // since the device voluntarily mutes outputs. As a workaround, yield processor over
0358         // 100 msec.
0359         msleep(100);
0360         data |= CLK_828_STATUS_FLAG_FETCH_PCM_FRAMES | CLK_828_STATUS_FLAG_ENABLE_OUTPUT;
0361     }
0362
0363     reg = cpu_to_be32(data);
0364     return snd_motu_transaction_write(motu, CLK_828_STATUS_OFFSET, &reg, sizeof(reg));
0365 }
0366
0367 static int switch_fetching_mode_896(struct snd_motu *motu, bool enable)
0368 {
0369     __be32 reg;
0370     u32 data;
0371     int err;
0372
0373     err = snd_motu_transaction_read(motu, CLK_896_STATUS_OFFSET, &reg, sizeof(reg));
0374     if (err < 0)
0375         return err;
0376     data = be32_to_cpu(reg);
0377
0378     data &= ~CLK_896_STATUS_FLAG_FETCH_ENABLE;
0379     if (enable)
0380         data |= CLK_896_STATUS_FLAG_FETCH_ENABLE | CLK_896_STATUS_FLAG_OUTPUT_ON;
0381
0382     reg = cpu_to_be32(data);
0383     return snd_motu_transaction_write(motu, CLK_896_STATUS_OFFSET, &reg, sizeof(reg));
0384 }
0385
0386 int snd_motu_protocol_v1_switch_fetching_mode(struct snd_motu *motu, bool enable)
0387 {
0388     if (motu->spec == &snd_motu_spec_828)
0389         return switch_fetching_mode_828(motu, enable);
0390     else if (motu->spec == &snd_motu_spec_896)
0391         return switch_fetching_mode_896(motu, enable);
0392     else
0393         return -ENXIO;
0394 }
0395
0396 static int detect_packet_formats_828(struct snd_motu *motu)
0397 {
0398     __be32 reg;
0399     u32 data;
0400     int err;
0401
0402     motu->tx_packet_formats.pcm_byte_offset = 4;
0403     motu->tx_packet_formats.msg_chunks = 2;
0404
0405     motu->rx_packet_formats.pcm_byte_offset = 4;
0406     motu->rx_packet_formats.msg_chunks = 0;
0407
0408     err = snd_motu_transaction_read(motu, CLK_828_STATUS_OFFSET, &reg, sizeof(reg));
0409     if (err < 0)
0410         return err;
0411     data = be32_to_cpu(reg) & CLK_828_STATUS_MASK;
0412
0413     // The number of chunks is just reduced when SPDIF is activated.
0414     if (!(data & CLK_828_STATUS_FLAG_OPT_IN_IFACE_IS_SPDIF))
0415         motu->tx_packet_formats.pcm_chunks[0] += 8;
0416
0417     if (!(data & CLK_828_STATUS_FLAG_OPT_OUT_IFACE_IS_SPDIF))
0418         motu->rx_packet_formats.pcm_chunks[0] += 8;
0419
0420     return 0;
0421 }
0422
0423 static int detect_packet_formats_896(struct snd_motu *motu)
0424 {
0425     // 24bit PCM frames follow to source packet header without message chunk.
0426     motu->tx_packet_formats.pcm_byte_offset = 4;
0427     motu->rx_packet_formats.pcm_byte_offset = 4;
0428
0429     // No message chunk in data block.
0430     motu->tx_packet_formats.msg_chunks = 0;
0431     motu->rx_packet_formats.msg_chunks = 0;
0432
0433     // Always enable optical interface for ADAT signal since the device have no registers
0434     // to refer to current configuration.
0435     motu->tx_packet_formats.pcm_chunks[0] += 8;
0436     motu->tx_packet_formats.pcm_chunks[1] += 8;
0437
0438     motu->rx_packet_formats.pcm_chunks[0] += 8;
0439     motu->rx_packet_formats.pcm_chunks[1] += 8;
0440
0441     return 0;
0442 }
0443
0444 int snd_motu_protocol_v1_cache_packet_formats(struct snd_motu *motu)
0445 {
0446     memcpy(motu->tx_packet_formats.pcm_chunks, motu->spec->tx_fixed_pcm_chunks,
0447            sizeof(motu->tx_packet_formats.pcm_chunks));
0448     memcpy(motu->rx_packet_formats.pcm_chunks, motu->spec->rx_fixed_pcm_chunks,
0449            sizeof(motu->rx_packet_formats.pcm_chunks));
0450
0451     if (motu->spec == &snd_motu_spec_828)
0452         return detect_packet_formats_828(motu);
0453     else if (motu->spec == &snd_motu_spec_896)
0454         return detect_packet_formats_896(motu);
0455     else
0456         return 0;
0457 }
0458
0459 const struct snd_motu_spec snd_motu_spec_828 = {
0460     .name = "828",
0461     .protocol_version = SND_MOTU_PROTOCOL_V1,
0462     .tx_fixed_pcm_chunks = {10, 0, 0},
0463     .rx_fixed_pcm_chunks = {10, 0, 0},
0464 };
0465
0466 const struct snd_motu_spec snd_motu_spec_896 = {
0467     .name = "896",
0468     .tx_fixed_pcm_chunks = {10, 10, 0},
0469     .rx_fixed_pcm_chunks = {10, 10, 0},
0470 };