0001 // SPDX-License-Identifier: GPL-2.0
0002 / {
0003 compatible = "cdns,xtensa-xtfpga";
0004 #address-cells = <1>;
0005 #size-cells = <1>;
0006 interrupt-parent = <&pic>;
0007
0008 chosen {
0009 bootargs = "earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug";
0010 };
0011
0012 memory@0 {
0013 device_type = "memory";
0014 reg = <0x00000000 0x06000000>;
0015 };
0016
0017 cpus {
0018 #address-cells = <1>;
0019 #size-cells = <0>;
0020 cpu@0 {
0021 compatible = "cdns,xtensa-cpu";
0022 reg = <0>;
0023 clocks = <&osc>;
0024 };
0025 };
0026
0027 pic: pic {
0028 compatible = "cdns,xtensa-pic";
0029 /* one cell: internal irq number,
0030 * two cells: second cell == 0: internal irq number
0031 * second cell == 1: external irq number
0032 */
0033 #interrupt-cells = <2>;
0034 interrupt-controller;
0035 };
0036
0037 clocks {
0038 clk54: clk54 {
0039 #clock-cells = <0>;
0040 compatible = "fixed-clock";
0041 clock-frequency = <54000000>;
0042 };
0043 };
0044
0045 soc {
0046 #address-cells = <1>;
0047 #size-cells = <1>;
0048 compatible = "simple-bus";
0049 ranges = <0x00000000 0xf0000000 0x10000000>;
0050
0051 osc: main-oscillator {
0052 #clock-cells = <0>;
0053 compatible = "cdns,xtfpga-clock";
0054 reg = <0x0d020004 0x4>;
0055 };
0056
0057 serial0: serial@0d050020 {
0058 device_type = "serial";
0059 compatible = "ns16550a";
0060 no-loopback-test;
0061 reg = <0x0d050020 0x20>;
0062 reg-shift = <2>;
0063 reg-io-width = <4>;
0064 native-endian;
0065 interrupts = <0 1>; /* external irq 0 */
0066 clocks = <&osc>;
0067 };
0068
0069 enet0: ethoc@0d030000 {
0070 compatible = "opencores,ethoc";
0071 reg = <0x0d030000 0x4000 0x0d800000 0x4000>;
0072 native-endian;
0073 interrupts = <1 1>; /* external irq 1 */
0074 local-mac-address = [00 50 c2 13 6f 00];
0075 clocks = <&osc>;
0076 };
0077
0078 i2s0: xtfpga-i2s@0d080000 {
0079 #sound-dai-cells = <0>;
0080 compatible = "cdns,xtfpga-i2s";
0081 reg = <0x0d080000 0x40>;
0082 interrupts = <2 1>; /* external irq 2 */
0083 clocks = <&cdce706 4>;
0084 };
0085
0086 i2c0: i2c-master@0d090000 {
0087 compatible = "opencores,i2c-ocores";
0088 #address-cells = <1>;
0089 #size-cells = <0>;
0090 reg = <0x0d090000 0x20>;
0091 reg-shift = <2>;
0092 reg-io-width = <4>;
0093 native-endian;
0094 interrupts = <4 1>;
0095 clocks = <&osc>;
0096
0097 cdce706: clock-synth@69 {
0098 compatible = "ti,cdce706";
0099 #clock-cells = <1>;
0100 reg = <0x69>;
0101 clocks = <&clk54>;
0102 clock-names = "clk_in0";
0103 };
0104 };
0105
0106 spi0: spi@0d0a0000 {
0107 compatible = "cdns,xtfpga-spi";
0108 #address-cells = <1>;
0109 #size-cells = <0>;
0110 reg = <0x0d0a0000 0xc>;
0111
0112 tlv320aic23: sound-codec@0 {
0113 #sound-dai-cells = <0>;
0114 compatible = "tlv320aic23";
0115 reg = <0>;
0116 spi-max-frequency = <12500000>;
0117 };
0118 };
0119 };
0120
0121 sound {
0122 compatible = "simple-audio-card";
0123 simple-audio-card,format = "i2s";
0124 simple-audio-card,mclk-fs = <256>;
0125
0126 simple-audio-card,cpu {
0127 sound-dai = <&i2s0>;
0128 };
0129
0130 simple-audio-card,codec {
0131 sound-dai = <&tlv320aic23>;
0132 simple-audio-card,bitclock-master = <0>;
0133 simple-audio-card,frame-master = <0>;
0134 clocks = <&cdce706 4>;
0135 };
0136 };
0137 };
