0001 // SPDX-License-Identifier: GPL-2.0
0002 /dts-v1/;
0003
0004 / {
0005 compatible = "cdns,xtensa-xtfpga";
0006 #address-cells = <1>;
0007 #size-cells = <1>;
0008 interrupt-parent = <&pic>;
0009
0010 chosen {
0011 bootargs = "earlycon=cdns,0xfd000000,115200 console=tty0 console=ttyPS0,115200 root=/dev/ram0 rw earlyprintk xilinx_uartps.rx_trigger_level=32 loglevel=8 nohz=off ignore_loglevel";
0012 };
0013
0014 memory@0 {
0015 device_type = "memory";
0016 reg = <0x00000000 0x40000000>;
0017 };
0018
0019 cpus {
0020 #address-cells = <1>;
0021 #size-cells = <0>;
0022 cpu@0 {
0023 compatible = "cdns,xtensa-cpu";
0024 reg = <0>;
0025 };
0026 };
0027
0028 pic: pic {
0029 compatible = "cdns,xtensa-pic";
0030 #interrupt-cells = <2>;
0031 interrupt-controller;
0032 };
0033
0034 clocks {
0035 osc: main-oscillator {
0036 #clock-cells = <0>;
0037 compatible = "fixed-clock";
0038 };
0039 };
0040
0041 soc {
0042 #address-cells = <1>;
0043 #size-cells = <1>;
0044 compatible = "simple-bus";
0045 ranges = <0x00000000 0xf0000000 0x10000000>;
0046
0047 uart0: serial@0d000000 {
0048 compatible = "xlnx,xuartps", "cdns,uart-r1p8";
0049 clocks = <&osc>, <&osc>;
0050 clock-names = "uart_clk", "pclk";
0051 reg = <0x0d000000 0x1000>;
0052 interrupts = <0 1>;
0053 };
0054 };
0055 };
