0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Device Tree for Klondike (APM8018X) board.
0004 *
0005 * Copyright (c) 2010, Applied Micro Circuits Corporation
0006 * Author: Tanmay Inamdar <tinamdar@apm.com>
0007 */
0008
0009 /dts-v1/;
0010
0011 / {
0012 #address-cells = <1>;
0013 #size-cells = <1>;
0014 model = "apm,klondike";
0015 compatible = "apm,klondike";
0016 dcr-parent = <&{/cpus/cpu@0}>;
0017
0018 aliases {
0019 ethernet0 = &EMAC0;
0020 ethernet1 = &EMAC1;
0021 };
0022
0023 cpus {
0024 #address-cells = <1>;
0025 #size-cells = <0>;
0026
0027 cpu@0 {
0028 device_type = "cpu";
0029 model = "PowerPC,apm8018x";
0030 reg = <0x00000000>;
0031 clock-frequency = <300000000>; /* Filled in by U-Boot */
0032 timebase-frequency = <300000000>; /* Filled in by U-Boot */
0033 i-cache-line-size = <32>;
0034 d-cache-line-size = <32>;
0035 i-cache-size = <16384>; /* 16 kB */
0036 d-cache-size = <16384>; /* 16 kB */
0037 dcr-controller;
0038 dcr-access-method = "native";
0039 };
0040 };
0041
0042 memory {
0043 device_type = "memory";
0044 reg = <0x00000000 0x20000000>; /* Filled in by U-Boot */
0045 };
0046
0047 UIC0: interrupt-controller {
0048 compatible = "ibm,uic";
0049 interrupt-controller;
0050 cell-index = <0>;
0051 dcr-reg = <0x0c0 0x010>;
0052 #address-cells = <0>;
0053 #size-cells = <0>;
0054 #interrupt-cells = <2>;
0055 };
0056
0057 UIC1: interrupt-controller1 {
0058 compatible = "ibm,uic";
0059 interrupt-controller;
0060 cell-index = <1>;
0061 dcr-reg = <0x0d0 0x010>;
0062 #address-cells = <0>;
0063 #size-cells = <0>;
0064 #interrupt-cells = <2>;
0065 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
0066 interrupt-parent = <&UIC0>;
0067 };
0068
0069 UIC2: interrupt-controller2 {
0070 compatible = "ibm,uic";
0071 interrupt-controller;
0072 cell-index = <2>;
0073 dcr-reg = <0x0e0 0x010>;
0074 #address-cells = <0>;
0075 #size-cells = <0>;
0076 #interrupt-cells = <2>;
0077 interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
0078 interrupt-parent = <&UIC0>;
0079 };
0080
0081 UIC3: interrupt-controller3 {
0082 compatible = "ibm,uic";
0083 interrupt-controller;
0084 cell-index = <3>;
0085 dcr-reg = <0x0f0 0x010>;
0086 #address-cells = <0>;
0087 #size-cells = <0>;
0088 #interrupt-cells = <2>;
0089 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
0090 interrupt-parent = <&UIC0>;
0091 };
0092
0093 plb {
0094 compatible = "ibm,plb4";
0095 #address-cells = <1>;
0096 #size-cells = <1>;
0097 ranges;
0098 clock-frequency = <0>; /* Filled in by U-Boot */
0099
0100 SDRAM0: memory-controller {
0101 compatible = "ibm,sdram-apm8018x";
0102 dcr-reg = <0x010 0x002>;
0103 };
0104
0105 MAL0: mcmal {
0106 compatible = "ibm,mcmal2";
0107 dcr-reg = <0x180 0x062>;
0108 num-tx-chans = <2>;
0109 num-rx-chans = <16>;
0110 #address-cells = <0>;
0111 #size-cells = <0>;
0112 interrupt-parent = <&UIC1>;
0113 interrupts = </*TXEOB*/ 0x6 0x4
0114 /*RXEOB*/ 0x7 0x4
0115 /*SERR*/ 0x1 0x4
0116 /*TXDE*/ 0x2 0x4
0117 /*RXDE*/ 0x3 0x4>;
0118 };
0119
0120 POB0: opb {
0121 compatible = "ibm,opb";
0122 #address-cells = <1>;
0123 #size-cells = <1>;
0124 ranges = <0x20000000 0x20000000 0x30000000
0125 0x50000000 0x50000000 0x10000000
0126 0x60000000 0x60000000 0x10000000
0127 0xFE000000 0xFE000000 0x00010000>;
0128 dcr-reg = <0x100 0x020>;
0129 clock-frequency = <300000000>; /* Filled in by U-Boot */
0130
0131 RGMII0: emac-rgmii@400a2000 {
0132 compatible = "ibm,rgmii";
0133 reg = <0x400a2000 0x00000010>;
0134 has-mdio;
0135 };
0136
0137 TAH0: emac-tah@400a3000 {
0138 compatible = "ibm,tah";
0139 reg = <0x400a3000 0x100>;
0140 };
0141
0142 TAH1: emac-tah@400a4000 {
0143 compatible = "ibm,tah";
0144 reg = <0x400a4000 0x100>;
0145 };
0146
0147 EMAC0: ethernet@400a0000 {
0148 compatible = "ibm,emac4", "ibm-emac4sync";
0149 interrupt-parent = <&EMAC0>;
0150 interrupts = <0x0>;
0151 #interrupt-cells = <1>;
0152 #address-cells = <0>;
0153 #size-cells = <0>;
0154 interrupt-map = </*Status*/ 0x0 &UIC0 0x13 0x4>;
0155 reg = <0x400a0000 0x00000100>;
0156 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0157 mal-device = <&MAL0>;
0158 mal-tx-channel = <0x0>;
0159 mal-rx-channel = <0x0>;
0160 cell-index = <0>;
0161 max-frame-size = <9000>;
0162 rx-fifo-size = <4096>;
0163 tx-fifo-size = <2048>;
0164 phy-mode = "rgmii";
0165 phy-address = <0x2>;
0166 turbo = "no";
0167 phy-map = <0x00000000>;
0168 rgmii-device = <&RGMII0>;
0169 rgmii-channel = <0>;
0170 tah-device = <&TAH0>;
0171 tah-channel = <0>;
0172 has-inverted-stacr-oc;
0173 has-new-stacr-staopc;
0174 };
0175
0176 EMAC1: ethernet@400a1000 {
0177 compatible = "ibm,emac4", "ibm-emac4sync";
0178 status = "disabled";
0179 interrupt-parent = <&EMAC1>;
0180 interrupts = <0x0>;
0181 #interrupt-cells = <1>;
0182 #address-cells = <0>;
0183 #size-cells = <0>;
0184 interrupt-map = </*Status*/ 0x0 &UIC0 0x14 0x4>;
0185 reg = <0x400a1000 0x00000100>;
0186 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0187 mal-device = <&MAL0>;
0188 mal-tx-channel = <1>;
0189 mal-rx-channel = <8>;
0190 cell-index = <1>;
0191 max-frame-size = <9000>;
0192 rx-fifo-size = <4096>;
0193 tx-fifo-size = <2048>;
0194 phy-mode = "rgmii";
0195 phy-address = <0x3>;
0196 turbo = "no";
0197 phy-map = <0x00000000>;
0198 rgmii-device = <&RGMII0>;
0199 rgmii-channel = <1>;
0200 tah-device = <&TAH1>;
0201 tah-channel = <0>;
0202 has-inverted-stacr-oc;
0203 has-new-stacr-staopc;
0204 mdio-device = <&EMAC0>;
0205 };
0206 };
0207 };
0208
0209 chosen {
0210 stdout-path = "/plb/opb/serial@50001000";
0211 };
0212 };
