0001 /*
0002 * Device Tree Source for AMCC Glacier (460GT)
0003 *
0004 * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
0005 *
0006 * This file is licensed under the terms of the GNU General Public
0007 * License version 2. This program is licensed "as is" without
0008 * any warranty of any kind, whether express or implied.
0009 */
0010
0011 /dts-v1/;
0012
0013 / {
0014 #address-cells = <2>;
0015 #size-cells = <1>;
0016 model = "amcc,glacier";
0017 compatible = "amcc,glacier";
0018 dcr-parent = <&{/cpus/cpu@0}>;
0019
0020 aliases {
0021 ethernet0 = &EMAC0;
0022 ethernet1 = &EMAC1;
0023 ethernet2 = &EMAC2;
0024 ethernet3 = &EMAC3;
0025 serial0 = &UART0;
0026 serial1 = &UART1;
0027 };
0028
0029 cpus {
0030 #address-cells = <1>;
0031 #size-cells = <0>;
0032
0033 cpu@0 {
0034 device_type = "cpu";
0035 model = "PowerPC,460GT";
0036 reg = <0x00000000>;
0037 clock-frequency = <0>; /* Filled in by U-Boot */
0038 timebase-frequency = <0>; /* Filled in by U-Boot */
0039 i-cache-line-size = <32>;
0040 d-cache-line-size = <32>;
0041 i-cache-size = <32768>;
0042 d-cache-size = <32768>;
0043 dcr-controller;
0044 dcr-access-method = "native";
0045 next-level-cache = <&L2C0>;
0046 };
0047 };
0048
0049 memory {
0050 device_type = "memory";
0051 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
0052 };
0053
0054 UIC0: interrupt-controller0 {
0055 compatible = "ibm,uic-460gt","ibm,uic";
0056 interrupt-controller;
0057 cell-index = <0>;
0058 dcr-reg = <0x0c0 0x009>;
0059 #address-cells = <0>;
0060 #size-cells = <0>;
0061 #interrupt-cells = <2>;
0062 };
0063
0064 UIC1: interrupt-controller1 {
0065 compatible = "ibm,uic-460gt","ibm,uic";
0066 interrupt-controller;
0067 cell-index = <1>;
0068 dcr-reg = <0x0d0 0x009>;
0069 #address-cells = <0>;
0070 #size-cells = <0>;
0071 #interrupt-cells = <2>;
0072 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
0073 interrupt-parent = <&UIC0>;
0074 };
0075
0076 UIC2: interrupt-controller2 {
0077 compatible = "ibm,uic-460gt","ibm,uic";
0078 interrupt-controller;
0079 cell-index = <2>;
0080 dcr-reg = <0x0e0 0x009>;
0081 #address-cells = <0>;
0082 #size-cells = <0>;
0083 #interrupt-cells = <2>;
0084 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
0085 interrupt-parent = <&UIC0>;
0086 };
0087
0088 UIC3: interrupt-controller3 {
0089 compatible = "ibm,uic-460gt","ibm,uic";
0090 interrupt-controller;
0091 cell-index = <3>;
0092 dcr-reg = <0x0f0 0x009>;
0093 #address-cells = <0>;
0094 #size-cells = <0>;
0095 #interrupt-cells = <2>;
0096 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
0097 interrupt-parent = <&UIC0>;
0098 };
0099
0100 SDR0: sdr {
0101 compatible = "ibm,sdr-460gt";
0102 dcr-reg = <0x00e 0x002>;
0103 };
0104
0105 CPR0: cpr {
0106 compatible = "ibm,cpr-460gt";
0107 dcr-reg = <0x00c 0x002>;
0108 };
0109
0110 L2C0: l2c {
0111 compatible = "ibm,l2-cache-460gt", "ibm,l2-cache";
0112 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
0113 0x030 0x008>; /* L2 cache DCR's */
0114 cache-line-size = <32>; /* 32 bytes */
0115 cache-size = <262144>; /* L2, 256K */
0116 interrupt-parent = <&UIC1>;
0117 interrupts = <11 1>;
0118 };
0119
0120 plb {
0121 compatible = "ibm,plb-460gt", "ibm,plb4";
0122 #address-cells = <2>;
0123 #size-cells = <1>;
0124 ranges;
0125 clock-frequency = <0>; /* Filled in by U-Boot */
0126
0127 SDRAM0: sdram {
0128 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
0129 dcr-reg = <0x010 0x002>;
0130 };
0131
0132 CRYPTO: crypto@180000 {
0133 compatible = "amcc,ppc460gt-crypto", "amcc,ppc460ex-crypto",
0134 "amcc,ppc4xx-crypto";
0135 reg = <4 0x00180000 0x80400>;
0136 interrupt-parent = <&UIC0>;
0137 interrupts = <0x1d 0x4>;
0138 };
0139
0140 HWRNG: hwrng@110000 {
0141 compatible = "amcc,ppc460ex-rng", "ppc4xx-rng";
0142 reg = <4 0x00110000 0x50>;
0143 };
0144
0145 MAL0: mcmal {
0146 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
0147 dcr-reg = <0x180 0x062>;
0148 num-tx-chans = <4>;
0149 num-rx-chans = <32>;
0150 #address-cells = <0>;
0151 #size-cells = <0>;
0152 interrupt-parent = <&UIC2>;
0153 interrupts = < /*TXEOB*/ 0x6 0x4
0154 /*RXEOB*/ 0x7 0x4
0155 /*SERR*/ 0x3 0x4
0156 /*TXDE*/ 0x4 0x4
0157 /*RXDE*/ 0x5 0x4>;
0158 desc-base-addr-high = <0x8>;
0159 };
0160
0161 POB0: opb {
0162 compatible = "ibm,opb-460gt", "ibm,opb";
0163 #address-cells = <1>;
0164 #size-cells = <1>;
0165 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
0166 clock-frequency = <0>; /* Filled in by U-Boot */
0167
0168 EBC0: ebc {
0169 compatible = "ibm,ebc-460gt", "ibm,ebc";
0170 dcr-reg = <0x012 0x002>;
0171 #address-cells = <2>;
0172 #size-cells = <1>;
0173 clock-frequency = <0>; /* Filled in by U-Boot */
0174 /* ranges property is supplied by U-Boot */
0175 interrupts = <0x6 0x4>;
0176 interrupt-parent = <&UIC1>;
0177
0178 nor_flash@0,0 {
0179 compatible = "amd,s29gl512n", "cfi-flash";
0180 bank-width = <2>;
0181 reg = <0x00000000 0x00000000 0x04000000>;
0182 #address-cells = <1>;
0183 #size-cells = <1>;
0184 partition@0 {
0185 label = "kernel";
0186 reg = <0x00000000 0x001e0000>;
0187 };
0188 partition@1e0000 {
0189 label = "dtb";
0190 reg = <0x001e0000 0x00020000>;
0191 };
0192 partition@200000 {
0193 label = "ramdisk";
0194 reg = <0x00200000 0x01400000>;
0195 };
0196 partition@1600000 {
0197 label = "jffs2";
0198 reg = <0x01600000 0x00400000>;
0199 };
0200 partition@1a00000 {
0201 label = "user";
0202 reg = <0x01a00000 0x02560000>;
0203 };
0204 partition@3f60000 {
0205 label = "env";
0206 reg = <0x03f60000 0x00040000>;
0207 };
0208 partition@3fa0000 {
0209 label = "u-boot";
0210 reg = <0x03fa0000 0x00060000>;
0211 };
0212 };
0213
0214 ndfc@3,0 {
0215 compatible = "ibm,ndfc";
0216 reg = <0x00000003 0x00000000 0x00002000>;
0217 ccr = <0x00001000>;
0218 bank-settings = <0x80002222>;
0219 #address-cells = <1>;
0220 #size-cells = <1>;
0221
0222 nand {
0223 #address-cells = <1>;
0224 #size-cells = <1>;
0225
0226 partition@0 {
0227 label = "u-boot";
0228 reg = <0x00000000 0x00100000>;
0229 };
0230 partition@100000 {
0231 label = "user";
0232 reg = <0x00000000 0x03f00000>;
0233 };
0234 };
0235 };
0236 };
0237
0238 UART0: serial@ef600300 {
0239 device_type = "serial";
0240 compatible = "ns16550";
0241 reg = <0xef600300 0x00000008>;
0242 virtual-reg = <0xef600300>;
0243 clock-frequency = <0>; /* Filled in by U-Boot */
0244 current-speed = <0>; /* Filled in by U-Boot */
0245 interrupt-parent = <&UIC1>;
0246 interrupts = <0x1 0x4>;
0247 };
0248
0249 UART1: serial@ef600400 {
0250 device_type = "serial";
0251 compatible = "ns16550";
0252 reg = <0xef600400 0x00000008>;
0253 virtual-reg = <0xef600400>;
0254 clock-frequency = <0>; /* Filled in by U-Boot */
0255 current-speed = <0>; /* Filled in by U-Boot */
0256 interrupt-parent = <&UIC0>;
0257 interrupts = <0x1 0x4>;
0258 };
0259
0260 UART2: serial@ef600500 {
0261 device_type = "serial";
0262 compatible = "ns16550";
0263 reg = <0xef600500 0x00000008>;
0264 virtual-reg = <0xef600500>;
0265 clock-frequency = <0>; /* Filled in by U-Boot */
0266 current-speed = <0>; /* Filled in by U-Boot */
0267 interrupt-parent = <&UIC1>;
0268 interrupts = <28 0x4>;
0269 };
0270
0271 UART3: serial@ef600600 {
0272 device_type = "serial";
0273 compatible = "ns16550";
0274 reg = <0xef600600 0x00000008>;
0275 virtual-reg = <0xef600600>;
0276 clock-frequency = <0>; /* Filled in by U-Boot */
0277 current-speed = <0>; /* Filled in by U-Boot */
0278 interrupt-parent = <&UIC1>;
0279 interrupts = <29 0x4>;
0280 };
0281
0282 IIC0: i2c@ef600700 {
0283 compatible = "ibm,iic-460gt", "ibm,iic";
0284 reg = <0xef600700 0x00000014>;
0285 interrupt-parent = <&UIC0>;
0286 interrupts = <0x2 0x4>;
0287 #address-cells = <1>;
0288 #size-cells = <0>;
0289 rtc@68 {
0290 compatible = "st,m41t80";
0291 reg = <0x68>;
0292 interrupt-parent = <&UIC2>;
0293 interrupts = <0x19 0x8>;
0294 };
0295 sttm@48 {
0296 compatible = "ad,ad7414";
0297 reg = <0x48>;
0298 interrupt-parent = <&UIC1>;
0299 interrupts = <0x14 0x8>;
0300 };
0301 };
0302
0303 IIC1: i2c@ef600800 {
0304 compatible = "ibm,iic-460gt", "ibm,iic";
0305 reg = <0xef600800 0x00000014>;
0306 interrupt-parent = <&UIC0>;
0307 interrupts = <0x3 0x4>;
0308 };
0309
0310 ZMII0: emac-zmii@ef600d00 {
0311 compatible = "ibm,zmii-460gt", "ibm,zmii";
0312 reg = <0xef600d00 0x0000000c>;
0313 };
0314
0315 RGMII0: emac-rgmii@ef601500 {
0316 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
0317 reg = <0xef601500 0x00000008>;
0318 has-mdio;
0319 };
0320
0321 RGMII1: emac-rgmii@ef601600 {
0322 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
0323 reg = <0xef601600 0x00000008>;
0324 has-mdio;
0325 };
0326
0327 TAH0: emac-tah@ef601350 {
0328 compatible = "ibm,tah-460gt", "ibm,tah";
0329 reg = <0xef601350 0x00000030>;
0330 };
0331
0332 TAH1: emac-tah@ef601450 {
0333 compatible = "ibm,tah-460gt", "ibm,tah";
0334 reg = <0xef601450 0x00000030>;
0335 };
0336
0337 EMAC0: ethernet@ef600e00 {
0338 device_type = "network";
0339 compatible = "ibm,emac-460gt", "ibm,emac4sync";
0340 interrupt-parent = <&EMAC0>;
0341 interrupts = <0x0 0x1>;
0342 #interrupt-cells = <1>;
0343 #address-cells = <0>;
0344 #size-cells = <0>;
0345 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
0346 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
0347 reg = <0xef600e00 0x000000c4>;
0348 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0349 mal-device = <&MAL0>;
0350 mal-tx-channel = <0>;
0351 mal-rx-channel = <0>;
0352 cell-index = <0>;
0353 max-frame-size = <9000>;
0354 rx-fifo-size = <4096>;
0355 tx-fifo-size = <2048>;
0356 rx-fifo-size-gige = <16384>;
0357 phy-mode = "rgmii";
0358 phy-map = <0x00000000>;
0359 rgmii-device = <&RGMII0>;
0360 rgmii-channel = <0>;
0361 tah-device = <&TAH0>;
0362 tah-channel = <0>;
0363 has-inverted-stacr-oc;
0364 has-new-stacr-staopc;
0365 };
0366
0367 EMAC1: ethernet@ef600f00 {
0368 device_type = "network";
0369 compatible = "ibm,emac-460gt", "ibm,emac4sync";
0370 interrupt-parent = <&EMAC1>;
0371 interrupts = <0x0 0x1>;
0372 #interrupt-cells = <1>;
0373 #address-cells = <0>;
0374 #size-cells = <0>;
0375 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
0376 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
0377 reg = <0xef600f00 0x000000c4>;
0378 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0379 mal-device = <&MAL0>;
0380 mal-tx-channel = <1>;
0381 mal-rx-channel = <8>;
0382 cell-index = <1>;
0383 max-frame-size = <9000>;
0384 rx-fifo-size = <4096>;
0385 tx-fifo-size = <2048>;
0386 rx-fifo-size-gige = <16384>;
0387 phy-mode = "rgmii";
0388 phy-map = <0x00000000>;
0389 rgmii-device = <&RGMII0>;
0390 rgmii-channel = <1>;
0391 tah-device = <&TAH1>;
0392 tah-channel = <1>;
0393 has-inverted-stacr-oc;
0394 has-new-stacr-staopc;
0395 mdio-device = <&EMAC0>;
0396 };
0397
0398 EMAC2: ethernet@ef601100 {
0399 device_type = "network";
0400 compatible = "ibm,emac-460gt", "ibm,emac4sync";
0401 interrupt-parent = <&EMAC2>;
0402 interrupts = <0x0 0x1>;
0403 #interrupt-cells = <1>;
0404 #address-cells = <0>;
0405 #size-cells = <0>;
0406 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
0407 /*Wake*/ 0x1 &UIC2 0x16 0x4>;
0408 reg = <0xef601100 0x000000c4>;
0409 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0410 mal-device = <&MAL0>;
0411 mal-tx-channel = <2>;
0412 mal-rx-channel = <16>;
0413 cell-index = <2>;
0414 max-frame-size = <9000>;
0415 rx-fifo-size = <4096>;
0416 tx-fifo-size = <2048>;
0417 rx-fifo-size-gige = <16384>;
0418 tx-fifo-size-gige = <16384>; /* emac2&3 only */
0419 phy-mode = "rgmii";
0420 phy-map = <0x00000000>;
0421 rgmii-device = <&RGMII1>;
0422 rgmii-channel = <0>;
0423 has-inverted-stacr-oc;
0424 has-new-stacr-staopc;
0425 mdio-device = <&EMAC0>;
0426 };
0427
0428 EMAC3: ethernet@ef601200 {
0429 device_type = "network";
0430 compatible = "ibm,emac-460gt", "ibm,emac4sync";
0431 interrupt-parent = <&EMAC3>;
0432 interrupts = <0x0 0x1>;
0433 #interrupt-cells = <1>;
0434 #address-cells = <0>;
0435 #size-cells = <0>;
0436 interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
0437 /*Wake*/ 0x1 &UIC2 0x17 0x4>;
0438 reg = <0xef601200 0x000000c4>;
0439 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0440 mal-device = <&MAL0>;
0441 mal-tx-channel = <3>;
0442 mal-rx-channel = <24>;
0443 cell-index = <3>;
0444 max-frame-size = <9000>;
0445 rx-fifo-size = <4096>;
0446 tx-fifo-size = <2048>;
0447 rx-fifo-size-gige = <16384>;
0448 tx-fifo-size-gige = <16384>; /* emac2&3 only */
0449 phy-mode = "rgmii";
0450 phy-map = <0x00000000>;
0451 rgmii-device = <&RGMII1>;
0452 rgmii-channel = <1>;
0453 has-inverted-stacr-oc;
0454 has-new-stacr-staopc;
0455 mdio-device = <&EMAC0>;
0456 };
0457 };
0458
0459 PCIX0: pci@c0ec00000 {
0460 device_type = "pci";
0461 #interrupt-cells = <1>;
0462 #size-cells = <2>;
0463 #address-cells = <3>;
0464 compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix";
0465 primary;
0466 large-inbound-windows;
0467 enable-msi-hole;
0468 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
0469 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
0470 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
0471 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
0472 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
0473
0474 /* Outbound ranges, one memory and one IO,
0475 * later cannot be changed
0476 */
0477 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
0478 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
0479 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
0480
0481 /* Inbound 2GB range starting at 0 */
0482 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
0483
0484 /* This drives busses 0 to 0x3f */
0485 bus-range = <0x0 0x3f>;
0486
0487 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
0488 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
0489 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
0490 };
0491
0492 PCIE0: pcie@d00000000 {
0493 device_type = "pci";
0494 #interrupt-cells = <1>;
0495 #size-cells = <2>;
0496 #address-cells = <3>;
0497 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
0498 primary;
0499 port = <0x0>; /* port number */
0500 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
0501 0x0000000c 0x08010000 0x00001000>; /* Registers */
0502 dcr-reg = <0x100 0x020>;
0503 sdr-base = <0x300>;
0504
0505 /* Outbound ranges, one memory and one IO,
0506 * later cannot be changed
0507 */
0508 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
0509 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
0510 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
0511
0512 /* Inbound 2GB range starting at 0 */
0513 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
0514
0515 /* This drives busses 40 to 0x7f */
0516 bus-range = <0x40 0x7f>;
0517
0518 /* Legacy interrupts (note the weird polarity, the bridge seems
0519 * to invert PCIe legacy interrupts).
0520 * We are de-swizzling here because the numbers are actually for
0521 * port of the root complex virtual P2P bridge. But I want
0522 * to avoid putting a node for it in the tree, so the numbers
0523 * below are basically de-swizzled numbers.
0524 * The real slot is on idsel 0, so the swizzling is 1:1
0525 */
0526 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0527 interrupt-map = <
0528 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
0529 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
0530 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
0531 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
0532 };
0533
0534 PCIE1: pcie@d20000000 {
0535 device_type = "pci";
0536 #interrupt-cells = <1>;
0537 #size-cells = <2>;
0538 #address-cells = <3>;
0539 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
0540 primary;
0541 port = <0x1>; /* port number */
0542 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
0543 0x0000000c 0x08011000 0x00001000>; /* Registers */
0544 dcr-reg = <0x120 0x020>;
0545 sdr-base = <0x340>;
0546
0547 /* Outbound ranges, one memory and one IO,
0548 * later cannot be changed
0549 */
0550 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
0551 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
0552 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
0553
0554 /* Inbound 2GB range starting at 0 */
0555 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
0556
0557 /* This drives busses 80 to 0xbf */
0558 bus-range = <0x80 0xbf>;
0559
0560 /* Legacy interrupts (note the weird polarity, the bridge seems
0561 * to invert PCIe legacy interrupts).
0562 * We are de-swizzling here because the numbers are actually for
0563 * port of the root complex virtual P2P bridge. But I want
0564 * to avoid putting a node for it in the tree, so the numbers
0565 * below are basically de-swizzled numbers.
0566 * The real slot is on idsel 0, so the swizzling is 1:1
0567 */
0568 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0569 interrupt-map = <
0570 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
0571 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
0572 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
0573 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
0574 };
0575 };
0576 };
