0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Copyright (C) 2013 Altera Corporation
0004 *
0005 * This file is generated by sopc2dts.
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 model = "altr,qsys_ghrd_3c120";
0012 compatible = "altr,qsys_ghrd_3c120";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 cpus {
0017 #address-cells = <1>;
0018 #size-cells = <0>;
0019
0020 cpu: cpu@0 {
0021 device_type = "cpu";
0022 compatible = "altr,nios2-1.0";
0023 reg = <0x00000000>;
0024 interrupt-controller;
0025 #interrupt-cells = <1>;
0026 clock-frequency = <125000000>;
0027 dcache-line-size = <32>;
0028 icache-line-size = <32>;
0029 dcache-size = <32768>;
0030 icache-size = <32768>;
0031 altr,implementation = "fast";
0032 altr,pid-num-bits = <8>;
0033 altr,tlb-num-ways = <16>;
0034 altr,tlb-num-entries = <128>;
0035 altr,tlb-ptr-sz = <7>;
0036 altr,has-div = <1>;
0037 altr,has-mul = <1>;
0038 altr,reset-addr = <0xc2800000>;
0039 altr,fast-tlb-miss-addr = <0xc7fff400>;
0040 altr,exception-addr = <0xd0000020>;
0041 altr,has-initda = <1>;
0042 altr,has-mmu = <1>;
0043 };
0044 };
0045
0046 memory@0 {
0047 device_type = "memory";
0048 reg = <0x10000000 0x08000000>,
0049 <0x07fff400 0x00000400>;
0050 };
0051
0052 sopc@0 {
0053 device_type = "soc";
0054 ranges;
0055 #address-cells = <1>;
0056 #size-cells = <1>;
0057 compatible = "altr,avalon", "simple-bus";
0058 bus-frequency = <125000000>;
0059
0060 pb_cpu_to_io: bridge@8000000 {
0061 compatible = "simple-bus";
0062 reg = <0x08000000 0x00800000>;
0063 #address-cells = <1>;
0064 #size-cells = <1>;
0065 ranges = <0x00002000 0x08002000 0x00002000>,
0066 <0x00004000 0x08004000 0x00000400>,
0067 <0x00004400 0x08004400 0x00000040>,
0068 <0x00004800 0x08004800 0x00000040>,
0069 <0x00004c80 0x08004c80 0x00000020>,
0070 <0x00004d50 0x08004d50 0x00000008>,
0071 <0x00008000 0x08008000 0x00000020>,
0072 <0x00400000 0x08400000 0x00000020>;
0073
0074 timer_1ms: timer@400000 {
0075 compatible = "altr,timer-1.0";
0076 reg = <0x00400000 0x00000020>;
0077 interrupt-parent = <&cpu>;
0078 interrupts = <11>;
0079 clock-frequency = <125000000>;
0080 };
0081
0082 timer_0: timer@8000 {
0083 compatible = "altr,timer-1.0";
0084 reg = < 0x00008000 0x00000020 >;
0085 interrupt-parent = < &cpu >;
0086 interrupts = < 5 >;
0087 clock-frequency = < 125000000 >;
0088 };
0089
0090 jtag_uart: serial@4d50 {
0091 compatible = "altr,juart-1.0";
0092 reg = <0x00004d50 0x00000008>;
0093 interrupt-parent = <&cpu>;
0094 interrupts = <1>;
0095 };
0096
0097 tse_mac: ethernet@4000 {
0098 compatible = "altr,tse-1.0";
0099 reg = <0x00004000 0x00000400>,
0100 <0x00004400 0x00000040>,
0101 <0x00004800 0x00000040>,
0102 <0x00002000 0x00002000>;
0103 reg-names = "control_port", "rx_csr", "tx_csr", "s1";
0104 interrupt-parent = <&cpu>;
0105 interrupts = <2 3>;
0106 interrupt-names = "rx_irq", "tx_irq";
0107 rx-fifo-depth = <8192>;
0108 tx-fifo-depth = <8192>;
0109 max-frame-size = <1518>;
0110 local-mac-address = [ 00 00 00 00 00 00 ];
0111 phy-mode = "rgmii-id";
0112 phy-handle = <&phy0>;
0113 tse_mac_mdio: mdio {
0114 compatible = "altr,tse-mdio";
0115 #address-cells = <1>;
0116 #size-cells = <0>;
0117 phy0: ethernet-phy@18 {
0118 reg = <18>;
0119 device_type = "ethernet-phy";
0120 };
0121 };
0122 };
0123
0124 uart: serial@4c80 {
0125 compatible = "altr,uart-1.0";
0126 reg = <0x00004c80 0x00000020>;
0127 interrupt-parent = <&cpu>;
0128 interrupts = <10>;
0129 current-speed = <115200>;
0130 clock-frequency = <62500000>;
0131 };
0132 };
0133
0134 cfi_flash_64m: flash@0 {
0135 compatible = "cfi-flash";
0136 reg = <0x00000000 0x04000000>;
0137 bank-width = <2>;
0138 device-width = <1>;
0139 #address-cells = <1>;
0140 #size-cells = <1>;
0141
0142 partition@800000 {
0143 reg = <0x00800000 0x01e00000>;
0144 label = "JFFS2 Filesystem";
0145 };
0146 };
0147 };
0148
0149 chosen {
0150 bootargs = "debug earlycon console=ttyJ0,115200";
0151 stdout-path = &jtag_uart;
0152 };
0153 };
