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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
0002 /* Copyright (c) 2017 Microsemi Corporation */
0003 
0004 /dts-v1/;
0005 
0006 #include "ocelot.dtsi"
0007 
0008 / {
0009         compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
0010 
0011         chosen {
0012                 stdout-path = "serial0:115200n8";
0013         };
0014 
0015         memory@0 {
0016                 device_type = "memory";
0017                 reg = <0x0 0x0e000000>;
0018         };
0019 };
0020 
0021 &uart0 {
0022         status = "okay";
0023 };
0024 
0025 &uart2 {
0026         status = "okay";
0027 };
0028 
0029 &spi {
0030         status = "okay";
0031 
0032         flash@0 {
0033                 compatible = "macronix,mx25l25635f", "jedec,spi-nor";
0034                 spi-max-frequency = <20000000>;
0035                 reg = <0>;
0036         };
0037 };
0038 
0039 &i2c {
0040         clock-frequency = <100000>;
0041         i2c-sda-hold-time-ns = <300>;
0042         status = "okay";
0043 };
0044 
0045 &mdio0 {
0046         status = "okay";
0047 };
0048 
0049 &port0 {
0050         status = "okay";
0051         phy-handle = <&phy0>;
0052         phy-mode = "internal";
0053 };
0054 
0055 &port1 {
0056         status = "okay";
0057         phy-handle = <&phy1>;
0058         phy-mode = "internal";
0059 };
0060 
0061 &port2 {
0062         status = "okay";
0063         phy-handle = <&phy2>;
0064         phy-mode = "internal";
0065 };
0066 
0067 &port3 {
0068         status = "okay";
0069         phy-handle = <&phy3>;
0070         phy-mode = "internal";
0071 };