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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef _DT_BINDINGS_SAMSUNG_I2S_H
0003 #define _DT_BINDINGS_SAMSUNG_I2S_H
0004 
0005 #define CLK_I2S_CDCLK       0 /* the CDCLK (CODECLKO) gate clock */
0006 
0007 #define CLK_I2S_RCLK_SRC    1 /* the RCLKSRC mux clock (corresponding to
0008                    * RCLKSRC bit in IISMOD register)
0009                    */
0010 
0011 #define CLK_I2S_RCLK_PSR    2 /* the RCLK prescaler divider clock
0012                    * (corresponding to the IISPSR register)
0013                    */
0014 
0015 #endif /* _DT_BINDINGS_SAMSUNG_I2S_H */