0001
0002
0003 #ifndef __DT_BINDINGS_RESET_BCM6318_H
0004 #define __DT_BINDINGS_RESET_BCM6318_H
0005
0006 #define BCM6318_RST_SPI 0
0007 #define BCM6318_RST_EPHY 1
0008 #define BCM6318_RST_SAR 2
0009 #define BCM6318_RST_ENETSW 3
0010 #define BCM6318_RST_USBD 4
0011 #define BCM6318_RST_USBH 5
0012 #define BCM6318_RST_PCIE_CORE 6
0013 #define BCM6318_RST_PCIE 7
0014 #define BCM6318_RST_PCIE_EXT 8
0015 #define BCM6318_RST_PCIE_HARD 9
0016 #define BCM6318_RST_ADSL 10
0017 #define BCM6318_RST_PHYMIPS 11
0018 #define BCM6318_RST_HOSTMIPS 12
0019
0020 #endif