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0001 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
0002 /*
0003  * Sunplus SP7021 dt-bindings Pinctrl header file
0004  * Copyright (C) Sunplus Tech/Tibbo Tech.
0005  * Author: Dvorkin Dmitry <dvorkin@tibbo.com>
0006  */
0007 
0008 #ifndef __DT_BINDINGS_PINCTRL_SPPCTL_SP7021_H__
0009 #define __DT_BINDINGS_PINCTRL_SPPCTL_SP7021_H__
0010 
0011 #include <dt-bindings/pinctrl/sppctl.h>
0012 
0013 /*
0014  * Please don't change the order of the following defines.
0015  * They are based on order of 'hardware' control register
0016  * defined in MOON2 ~ MOON3 registers.
0017  */
0018 #define MUXF_GPIO                       0
0019 #define MUXF_IOP                        1
0020 #define MUXF_L2SW_CLK_OUT               2
0021 #define MUXF_L2SW_MAC_SMI_MDC           3
0022 #define MUXF_L2SW_LED_FLASH0            4
0023 #define MUXF_L2SW_LED_FLASH1            5
0024 #define MUXF_L2SW_LED_ON0               6
0025 #define MUXF_L2SW_LED_ON1               7
0026 #define MUXF_L2SW_MAC_SMI_MDIO          8
0027 #define MUXF_L2SW_P0_MAC_RMII_TXEN      9
0028 #define MUXF_L2SW_P0_MAC_RMII_TXD0      10
0029 #define MUXF_L2SW_P0_MAC_RMII_TXD1      11
0030 #define MUXF_L2SW_P0_MAC_RMII_CRSDV     12
0031 #define MUXF_L2SW_P0_MAC_RMII_RXD0      13
0032 #define MUXF_L2SW_P0_MAC_RMII_RXD1      14
0033 #define MUXF_L2SW_P0_MAC_RMII_RXER      15
0034 #define MUXF_L2SW_P1_MAC_RMII_TXEN      16
0035 #define MUXF_L2SW_P1_MAC_RMII_TXD0      17
0036 #define MUXF_L2SW_P1_MAC_RMII_TXD1      18
0037 #define MUXF_L2SW_P1_MAC_RMII_CRSDV     19
0038 #define MUXF_L2SW_P1_MAC_RMII_RXD0      20
0039 #define MUXF_L2SW_P1_MAC_RMII_RXD1      21
0040 #define MUXF_L2SW_P1_MAC_RMII_RXER      22
0041 #define MUXF_DAISY_MODE                 23
0042 #define MUXF_SDIO_CLK                   24
0043 #define MUXF_SDIO_CMD                   25
0044 #define MUXF_SDIO_D0                    26
0045 #define MUXF_SDIO_D1                    27
0046 #define MUXF_SDIO_D2                    28
0047 #define MUXF_SDIO_D3                    29
0048 #define MUXF_PWM0                       30
0049 #define MUXF_PWM1                       31
0050 #define MUXF_PWM2                       32
0051 #define MUXF_PWM3                       33
0052 #define MUXF_PWM4                       34
0053 #define MUXF_PWM5                       35
0054 #define MUXF_PWM6                       36
0055 #define MUXF_PWM7                       37
0056 #define MUXF_ICM0_D                     38
0057 #define MUXF_ICM1_D                     39
0058 #define MUXF_ICM2_D                     40
0059 #define MUXF_ICM3_D                     41
0060 #define MUXF_ICM0_CLK                   42
0061 #define MUXF_ICM1_CLK                   43
0062 #define MUXF_ICM2_CLK                   44
0063 #define MUXF_ICM3_CLK                   45
0064 #define MUXF_SPIM0_INT                  46
0065 #define MUXF_SPIM0_CLK                  47
0066 #define MUXF_SPIM0_EN                   48
0067 #define MUXF_SPIM0_DO                   49
0068 #define MUXF_SPIM0_DI                   50
0069 #define MUXF_SPIM1_INT                  51
0070 #define MUXF_SPIM1_CLK                  52
0071 #define MUXF_SPIM1_EN                   53
0072 #define MUXF_SPIM1_DO                   54
0073 #define MUXF_SPIM1_DI                   55
0074 #define MUXF_SPIM2_INT                  56
0075 #define MUXF_SPIM2_CLK                  57
0076 #define MUXF_SPIM2_EN                   58
0077 #define MUXF_SPIM2_DO                   59
0078 #define MUXF_SPIM2_DI                   60
0079 #define MUXF_SPIM3_INT                  61
0080 #define MUXF_SPIM3_CLK                  62
0081 #define MUXF_SPIM3_EN                   63
0082 #define MUXF_SPIM3_DO                   64
0083 #define MUXF_SPIM3_DI                   65
0084 #define MUXF_SPI0S_INT                  66
0085 #define MUXF_SPI0S_CLK                  67
0086 #define MUXF_SPI0S_EN                   68
0087 #define MUXF_SPI0S_DO                   69
0088 #define MUXF_SPI0S_DI                   70
0089 #define MUXF_SPI1S_INT                  71
0090 #define MUXF_SPI1S_CLK                  72
0091 #define MUXF_SPI1S_EN                   73
0092 #define MUXF_SPI1S_DO                   74
0093 #define MUXF_SPI1S_DI                   75
0094 #define MUXF_SPI2S_INT                  76
0095 #define MUXF_SPI2S_CLK                  77
0096 #define MUXF_SPI2S_EN                   78
0097 #define MUXF_SPI2S_DO                   79
0098 #define MUXF_SPI2S_DI                   80
0099 #define MUXF_SPI3S_INT                  81
0100 #define MUXF_SPI3S_CLK                  82
0101 #define MUXF_SPI3S_EN                   83
0102 #define MUXF_SPI3S_DO                   84
0103 #define MUXF_SPI3S_DI                   85
0104 #define MUXF_I2CM0_CLK                  86
0105 #define MUXF_I2CM0_DAT                  87
0106 #define MUXF_I2CM1_CLK                  88
0107 #define MUXF_I2CM1_DAT                  89
0108 #define MUXF_I2CM2_CLK                  90
0109 #define MUXF_I2CM2_DAT                  91
0110 #define MUXF_I2CM3_CLK                  92
0111 #define MUXF_I2CM3_DAT                  93
0112 #define MUXF_UA1_TX                     94
0113 #define MUXF_UA1_RX                     95
0114 #define MUXF_UA1_CTS                    96
0115 #define MUXF_UA1_RTS                    97
0116 #define MUXF_UA2_TX                     98
0117 #define MUXF_UA2_RX                     99
0118 #define MUXF_UA2_CTS                    100
0119 #define MUXF_UA2_RTS                    101
0120 #define MUXF_UA3_TX                     102
0121 #define MUXF_UA3_RX                     103
0122 #define MUXF_UA3_CTS                    104
0123 #define MUXF_UA3_RTS                    105
0124 #define MUXF_UA4_TX                     106
0125 #define MUXF_UA4_RX                     107
0126 #define MUXF_UA4_CTS                    108
0127 #define MUXF_UA4_RTS                    109
0128 #define MUXF_TIMER0_INT                 110
0129 #define MUXF_TIMER1_INT                 111
0130 #define MUXF_TIMER2_INT                 112
0131 #define MUXF_TIMER3_INT                 113
0132 #define MUXF_GPIO_INT0                  114
0133 #define MUXF_GPIO_INT1                  115
0134 #define MUXF_GPIO_INT2                  116
0135 #define MUXF_GPIO_INT3                  117
0136 #define MUXF_GPIO_INT4                  118
0137 #define MUXF_GPIO_INT5                  119
0138 #define MUXF_GPIO_INT6                  120
0139 #define MUXF_GPIO_INT7                  121
0140 
0141 /*
0142  * Please don't change the order of the following defines.
0143  * They are based on order of items in array 'sppctl_list_funcs'
0144  * in Sunplus pinctrl driver.
0145  */
0146 #define GROP_SPI_FLASH                  122
0147 #define GROP_SPI_FLASH_4BIT             123
0148 #define GROP_SPI_NAND                   124
0149 #define GROP_CARD0_EMMC                 125
0150 #define GROP_SD_CARD                    126
0151 #define GROP_UA0                        127
0152 #define GROP_ACHIP_DEBUG                128
0153 #define GROP_ACHIP_UA2AXI               129
0154 #define GROP_FPGA_IFX                   130
0155 #define GROP_HDMI_TX                    131
0156 #define GROP_AUD_EXT_ADC_IFX0           132
0157 #define GROP_AUD_EXT_DAC_IFX0           133
0158 #define GROP_SPDIF_RX                   134
0159 #define GROP_SPDIF_TX                   135
0160 #define GROP_TDMTX_IFX0                 136
0161 #define GROP_TDMRX_IFX0                 137
0162 #define GROP_PDMRX_IFX0                 138
0163 #define GROP_PCM_IEC_TX                 139
0164 #define GROP_LCDIF                      140
0165 #define GROP_DVD_DSP_DEBUG              141
0166 #define GROP_I2C_DEBUG                  142
0167 #define GROP_I2C_SLAVE                  143
0168 #define GROP_WAKEUP                     144
0169 #define GROP_UART2AXI                   145
0170 #define GROP_USB0_I2C                   146
0171 #define GROP_USB1_I2C                   147
0172 #define GROP_USB0_OTG                   148
0173 #define GROP_USB1_OTG                   149
0174 #define GROP_UPHY0_DEBUG                150
0175 #define GROP_UPHY1_DEBUG                151
0176 #define GROP_UPHY0_EXT                  152
0177 #define GROP_PROBE_PORT                 153
0178 
0179 #endif