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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2014 MediaTek Inc.
0004  * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
0005  */
0006 
0007 #ifndef _DT_BINDINGS_PINCTRL_MT65XX_H
0008 #define _DT_BINDINGS_PINCTRL_MT65XX_H
0009 
0010 #define MTK_PIN_NO(x) ((x) << 8)
0011 #define MTK_GET_PIN_NO(x) ((x) >> 8)
0012 #define MTK_GET_PIN_FUNC(x) ((x) & 0xf)
0013 
0014 #define MTK_PUPD_SET_R1R0_00 100
0015 #define MTK_PUPD_SET_R1R0_01 101
0016 #define MTK_PUPD_SET_R1R0_10 102
0017 #define MTK_PUPD_SET_R1R0_11 103
0018 
0019 #define MTK_PULL_SET_RSEL_000  200
0020 #define MTK_PULL_SET_RSEL_001  201
0021 #define MTK_PULL_SET_RSEL_010  202
0022 #define MTK_PULL_SET_RSEL_011  203
0023 #define MTK_PULL_SET_RSEL_100  204
0024 #define MTK_PULL_SET_RSEL_101  205
0025 #define MTK_PULL_SET_RSEL_110  206
0026 #define MTK_PULL_SET_RSEL_111  207
0027 
0028 #define MTK_DRIVE_2mA  2
0029 #define MTK_DRIVE_4mA  4
0030 #define MTK_DRIVE_6mA  6
0031 #define MTK_DRIVE_8mA  8
0032 #define MTK_DRIVE_10mA 10
0033 #define MTK_DRIVE_12mA 12
0034 #define MTK_DRIVE_14mA 14
0035 #define MTK_DRIVE_16mA 16
0036 #define MTK_DRIVE_20mA 20
0037 #define MTK_DRIVE_24mA 24
0038 #define MTK_DRIVE_28mA 28
0039 #define MTK_DRIVE_32mA 32
0040 
0041 #endif /* _DT_BINDINGS_PINCTRL_MT65XX_H */