dt-bindings/pinctrl/dra.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * This header provides constants for DRA pinctrl bindings.
0004  *
0005  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
0006  * Author: Rajendra Nayak <rnayak@ti.com>
0007  */
0008
0009 #ifndef _DT_BINDINGS_PINCTRL_DRA_H
0010 #define _DT_BINDINGS_PINCTRL_DRA_H
0011
0012 /* DRA7 mux mode options for each pin. See TRM for options */
0013 #define MUX_MODE0   0x0
0014 #define MUX_MODE1   0x1
0015 #define MUX_MODE2   0x2
0016 #define MUX_MODE3   0x3
0017 #define MUX_MODE4   0x4
0018 #define MUX_MODE5   0x5
0019 #define MUX_MODE6   0x6
0020 #define MUX_MODE7   0x7
0021 #define MUX_MODE8   0x8
0022 #define MUX_MODE9   0x9
0023 #define MUX_MODE10  0xa
0024 #define MUX_MODE11  0xb
0025 #define MUX_MODE12  0xc
0026 #define MUX_MODE13  0xd
0027 #define MUX_MODE14  0xe
0028 #define MUX_MODE15  0xf
0029
0030 /* Certain pins need virtual mode, but note: they may glitch */
0031 #define MUX_VIRTUAL_MODE0   (MODE_SELECT | (0x0 << 4))
0032 #define MUX_VIRTUAL_MODE1   (MODE_SELECT | (0x1 << 4))
0033 #define MUX_VIRTUAL_MODE2   (MODE_SELECT | (0x2 << 4))
0034 #define MUX_VIRTUAL_MODE3   (MODE_SELECT | (0x3 << 4))
0035 #define MUX_VIRTUAL_MODE4   (MODE_SELECT | (0x4 << 4))
0036 #define MUX_VIRTUAL_MODE5   (MODE_SELECT | (0x5 << 4))
0037 #define MUX_VIRTUAL_MODE6   (MODE_SELECT | (0x6 << 4))
0038 #define MUX_VIRTUAL_MODE7   (MODE_SELECT | (0x7 << 4))
0039 #define MUX_VIRTUAL_MODE8   (MODE_SELECT | (0x8 << 4))
0040 #define MUX_VIRTUAL_MODE9   (MODE_SELECT | (0x9 << 4))
0041 #define MUX_VIRTUAL_MODE10  (MODE_SELECT | (0xa << 4))
0042 #define MUX_VIRTUAL_MODE11  (MODE_SELECT | (0xb << 4))
0043 #define MUX_VIRTUAL_MODE12  (MODE_SELECT | (0xc << 4))
0044 #define MUX_VIRTUAL_MODE13  (MODE_SELECT | (0xd << 4))
0045 #define MUX_VIRTUAL_MODE14  (MODE_SELECT | (0xe << 4))
0046 #define MUX_VIRTUAL_MODE15  (MODE_SELECT | (0xf << 4))
0047
0048 #define MODE_SELECT     (1 << 8)
0049
0050 #define PULL_ENA        (0 << 16)
0051 #define PULL_DIS        (1 << 16)
0052 #define PULL_UP         (1 << 17)
0053 #define INPUT_EN        (1 << 18)
0054 #define SLEWCONTROL     (1 << 19)
0055 #define WAKEUP_EN       (1 << 24)
0056 #define WAKEUP_EVENT        (1 << 25)
0057
0058 /* Active pin states */
0059 #define PIN_OUTPUT      (0 | PULL_DIS)
0060 #define PIN_OUTPUT_PULLUP   (PULL_UP)
0061 #define PIN_OUTPUT_PULLDOWN (0)
0062 #define PIN_INPUT       (INPUT_EN | PULL_DIS)
0063 #define PIN_INPUT_SLEW      (INPUT_EN | SLEWCONTROL)
0064 #define PIN_INPUT_PULLUP    (PULL_ENA | INPUT_EN | PULL_UP)
0065 #define PIN_INPUT_PULLDOWN  (PULL_ENA | INPUT_EN)
0066
0067 /*
0068  * Macro to allow using the absolute physical address instead of the
0069  * padconf registers instead of the offset from padconf base.
0070  */
0071 #define DRA7XX_CORE_IOPAD(pa, val)  (((pa) & 0xffff) - 0x3400) (val)
0072
0073 /* DRA7 IODELAY configuration parameters */
0074 #define A_DELAY_PS(val)         ((val) & 0xffff)
0075 #define G_DELAY_PS(val)         ((val) & 0xffff)
0076 #endif
0077