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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * This header provides constants specific to AM33XX pinctrl bindings.
0004  */
0005 
0006 #ifndef _DT_BINDINGS_PINCTRL_AM33XX_H
0007 #define _DT_BINDINGS_PINCTRL_AM33XX_H
0008 
0009 #include <dt-bindings/pinctrl/omap.h>
0010 
0011 /* am33xx specific mux bit defines */
0012 #undef PULL_ENA
0013 #undef INPUT_EN
0014 
0015 #define PULL_DISABLE        (1 << 3)
0016 #define INPUT_EN        (1 << 5)
0017 #define SLEWCTRL_SLOW       (1 << 6)
0018 #define SLEWCTRL_FAST       0
0019 
0020 /* update macro depending on INPUT_EN and PULL_ENA */
0021 #undef PIN_OUTPUT
0022 #undef PIN_OUTPUT_PULLUP
0023 #undef PIN_OUTPUT_PULLDOWN
0024 #undef PIN_INPUT
0025 #undef PIN_INPUT_PULLUP
0026 #undef PIN_INPUT_PULLDOWN
0027 
0028 #define PIN_OUTPUT      (PULL_DISABLE)
0029 #define PIN_OUTPUT_PULLUP   (PULL_UP)
0030 #define PIN_OUTPUT_PULLDOWN 0
0031 #define PIN_INPUT       (INPUT_EN | PULL_DISABLE)
0032 #define PIN_INPUT_PULLUP    (INPUT_EN | PULL_UP)
0033 #define PIN_INPUT_PULLDOWN  (INPUT_EN)
0034 
0035 /* undef non-existing modes */
0036 #undef PIN_OFF_NONE
0037 #undef PIN_OFF_OUTPUT_HIGH
0038 #undef PIN_OFF_OUTPUT_LOW
0039 #undef PIN_OFF_INPUT_PULLUP
0040 #undef PIN_OFF_INPUT_PULLDOWN
0041 #undef PIN_OFF_WAKEUPENABLE
0042 
0043 #define AM335X_PIN_OFFSET_MIN           0x0800U
0044 
0045 #define AM335X_PIN_GPMC_AD0         0x800
0046 #define AM335X_PIN_GPMC_AD1         0x804
0047 #define AM335X_PIN_GPMC_AD2         0x808
0048 #define AM335X_PIN_GPMC_AD3         0x80c
0049 #define AM335X_PIN_GPMC_AD4         0x810
0050 #define AM335X_PIN_GPMC_AD5         0x814
0051 #define AM335X_PIN_GPMC_AD6         0x818
0052 #define AM335X_PIN_GPMC_AD7         0x81c
0053 #define AM335X_PIN_GPMC_AD8         0x820
0054 #define AM335X_PIN_GPMC_AD9         0x824
0055 #define AM335X_PIN_GPMC_AD10            0x828
0056 #define AM335X_PIN_GPMC_AD11            0x82c
0057 #define AM335X_PIN_GPMC_AD12            0x830
0058 #define AM335X_PIN_GPMC_AD13            0x834
0059 #define AM335X_PIN_GPMC_AD14            0x838
0060 #define AM335X_PIN_GPMC_AD15            0x83c
0061 #define AM335X_PIN_GPMC_A0          0x840
0062 #define AM335X_PIN_GPMC_A1          0x844
0063 #define AM335X_PIN_GPMC_A2          0x848
0064 #define AM335X_PIN_GPMC_A3          0x84c
0065 #define AM335X_PIN_GPMC_A4          0x850
0066 #define AM335X_PIN_GPMC_A5          0x854
0067 #define AM335X_PIN_GPMC_A6          0x858
0068 #define AM335X_PIN_GPMC_A7          0x85c
0069 #define AM335X_PIN_GPMC_A8          0x860
0070 #define AM335X_PIN_GPMC_A9          0x864
0071 #define AM335X_PIN_GPMC_A10         0x868
0072 #define AM335X_PIN_GPMC_A11         0x86c
0073 #define AM335X_PIN_GPMC_WAIT0           0x870
0074 #define AM335X_PIN_GPMC_WPN         0x874
0075 #define AM335X_PIN_GPMC_BEN1            0x878
0076 #define AM335X_PIN_GPMC_CSN0            0x87c
0077 #define AM335X_PIN_GPMC_CSN1            0x880
0078 #define AM335X_PIN_GPMC_CSN2            0x884
0079 #define AM335X_PIN_GPMC_CSN3            0x888
0080 #define AM335X_PIN_GPMC_CLK         0x88c
0081 #define AM335X_PIN_GPMC_ADVN_ALE        0x890
0082 #define AM335X_PIN_GPMC_OEN_REN         0x894
0083 #define AM335X_PIN_GPMC_WEN         0x898
0084 #define AM335X_PIN_GPMC_BEN0_CLE        0x89c
0085 #define AM335X_PIN_LCD_DATA0            0x8a0
0086 #define AM335X_PIN_LCD_DATA1            0x8a4
0087 #define AM335X_PIN_LCD_DATA2            0x8a8
0088 #define AM335X_PIN_LCD_DATA3            0x8ac
0089 #define AM335X_PIN_LCD_DATA4            0x8b0
0090 #define AM335X_PIN_LCD_DATA5            0x8b4
0091 #define AM335X_PIN_LCD_DATA6            0x8b8
0092 #define AM335X_PIN_LCD_DATA7            0x8bc
0093 #define AM335X_PIN_LCD_DATA8            0x8c0
0094 #define AM335X_PIN_LCD_DATA9            0x8c4
0095 #define AM335X_PIN_LCD_DATA10           0x8c8
0096 #define AM335X_PIN_LCD_DATA11           0x8cc
0097 #define AM335X_PIN_LCD_DATA12           0x8d0
0098 #define AM335X_PIN_LCD_DATA13           0x8d4
0099 #define AM335X_PIN_LCD_DATA14           0x8d8
0100 #define AM335X_PIN_LCD_DATA15           0x8dc
0101 #define AM335X_PIN_LCD_VSYNC            0x8e0
0102 #define AM335X_PIN_LCD_HSYNC            0x8e4
0103 #define AM335X_PIN_LCD_PCLK         0x8e8
0104 #define AM335X_PIN_LCD_AC_BIAS_EN       0x8ec
0105 #define AM335X_PIN_MMC0_DAT3            0x8f0
0106 #define AM335X_PIN_MMC0_DAT2            0x8f4
0107 #define AM335X_PIN_MMC0_DAT1            0x8f8
0108 #define AM335X_PIN_MMC0_DAT0            0x8fc
0109 #define AM335X_PIN_MMC0_CLK         0x900
0110 #define AM335X_PIN_MMC0_CMD         0x904
0111 #define AM335X_PIN_MII1_COL         0x908
0112 #define AM335X_PIN_MII1_CRS         0x90c
0113 #define AM335X_PIN_MII1_RX_ER           0x910
0114 #define AM335X_PIN_MII1_TX_EN           0x914
0115 #define AM335X_PIN_MII1_RX_DV           0x918
0116 #define AM335X_PIN_MII1_TXD3            0x91c
0117 #define AM335X_PIN_MII1_TXD2            0x920
0118 #define AM335X_PIN_MII1_TXD1            0x924
0119 #define AM335X_PIN_MII1_TXD0            0x928
0120 #define AM335X_PIN_MII1_TX_CLK          0x92c
0121 #define AM335X_PIN_MII1_RX_CLK          0x930
0122 #define AM335X_PIN_MII1_RXD3            0x934
0123 #define AM335X_PIN_MII1_RXD2            0x938
0124 #define AM335X_PIN_MII1_RXD1            0x93c
0125 #define AM335X_PIN_MII1_RXD0            0x940
0126 #define AM335X_PIN_RMII1_REF_CLK        0x944
0127 #define AM335X_PIN_MDIO             0x948
0128 #define AM335X_PIN_MDC              0x94c
0129 #define AM335X_PIN_SPI0_SCLK            0x950
0130 #define AM335X_PIN_SPI0_D0          0x954
0131 #define AM335X_PIN_SPI0_D1          0x958
0132 #define AM335X_PIN_SPI0_CS0         0x95c
0133 #define AM335X_PIN_SPI0_CS1         0x960
0134 #define AM335X_PIN_ECAP0_IN_PWM0_OUT        0x964
0135 #define AM335X_PIN_UART0_CTSN           0x968
0136 #define AM335X_PIN_UART0_RTSN           0x96c
0137 #define AM335X_PIN_UART0_RXD            0x970
0138 #define AM335X_PIN_UART0_TXD            0x974
0139 #define AM335X_PIN_UART1_CTSN           0x978
0140 #define AM335X_PIN_UART1_RTSN           0x97c
0141 #define AM335X_PIN_UART1_RXD            0x980
0142 #define AM335X_PIN_UART1_TXD            0x984
0143 #define AM335X_PIN_I2C0_SDA         0x988
0144 #define AM335X_PIN_I2C0_SCL         0x98c
0145 #define AM335X_PIN_MCASP0_ACLKX         0x990
0146 #define AM335X_PIN_MCASP0_FSX           0x994
0147 #define AM335X_PIN_MCASP0_AXR0          0x998
0148 #define AM335X_PIN_MCASP0_AHCLKR        0x99c
0149 #define AM335X_PIN_MCASP0_ACLKR         0x9a0
0150 #define AM335X_PIN_MCASP0_FSR           0x9a4
0151 #define AM335X_PIN_MCASP0_AXR1          0x9a8
0152 #define AM335X_PIN_MCASP0_AHCLKX        0x9ac
0153 #define AM335X_PIN_XDMA_EVENT_INTR0     0x9b0
0154 #define AM335X_PIN_XDMA_EVENT_INTR1     0x9b4
0155 #define AM335X_PIN_WARMRSTN         0x9b8
0156 #define AM335X_PIN_NNMI             0x9c0
0157 #define AM335X_PIN_TMS              0x9d0
0158 #define AM335X_PIN_TDI              0x9d4
0159 #define AM335X_PIN_TDO              0x9d8
0160 #define AM335X_PIN_TCK              0x9dc
0161 #define AM335X_PIN_TRSTN            0x9e0
0162 #define AM335X_PIN_EMU0             0x9e4
0163 #define AM335X_PIN_EMU1             0x9e8
0164 #define AM335X_PIN_RTC_PWRONRSTN        0x9f8
0165 #define AM335X_PIN_PMIC_POWER_EN        0x9fc
0166 #define AM335X_PIN_EXT_WAKEUP           0xa00
0167 #define AM335X_PIN_USB0_DRVVBUS         0xa1c
0168 #define AM335X_PIN_USB1_DRVVBUS         0xa34
0169 
0170 #define AM335X_PIN_OFFSET_MAX           0x0a34U
0171 
0172 #endif