dt-bindings/mailbox/tegra186-hsp.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * This header provides constants for binding nvidia,tegra186-hsp.
0004  */
0005
0006 #ifndef _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
0007 #define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
0008
0009 /*
0010  * These define the type of mailbox that is to be used (doorbell, shared
0011  * mailbox, shared semaphore or arbitrated semaphore).
0012  */
0013 #define TEGRA_HSP_MBOX_TYPE_DB 0x0
0014 #define TEGRA_HSP_MBOX_TYPE_SM 0x1
0015 #define TEGRA_HSP_MBOX_TYPE_SS 0x2
0016 #define TEGRA_HSP_MBOX_TYPE_AS 0x3
0017
0018 /*
0019  * These define the types of shared mailbox supported based on data size.
0020  */
0021 #define TEGRA_HSP_MBOX_TYPE_SM_128BIT (1 << 8)
0022
0023 /*
0024  * These defines represent the bit associated with the given master ID in the
0025  * doorbell registers.
0026  */
0027 #define TEGRA_HSP_DB_MASTER_CCPLEX 17
0028 #define TEGRA_HSP_DB_MASTER_BPMP 19
0029
0030 /*
0031  * Shared mailboxes are unidirectional, so the direction needs to be specified
0032  * in the device tree.
0033  */
0034 #define TEGRA_HSP_SM_MASK 0x00ffffff
0035 #define TEGRA_HSP_SM_FLAG_RX (0 << 31)
0036 #define TEGRA_HSP_SM_FLAG_TX (1 << 31)
0037
0038 #define TEGRA_HSP_SM_RX(x) (TEGRA_HSP_SM_FLAG_RX | ((x) & TEGRA_HSP_SM_MASK))
0039 #define TEGRA_HSP_SM_TX(x) (TEGRA_HSP_SM_FLAG_TX | ((x) & TEGRA_HSP_SM_MASK))
0040
0041 #endif