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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * Copyright (c) 2014 MundoReader S.L.
0004  * Author: Heiko Stuebner <heiko@sntech.de>
0005  */
0006 
0007 #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
0008 #define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
0009 
0010 #include <dt-bindings/clock/rk3188-cru-common.h>
0011 
0012 /* soft-reset indices */
0013 #define SRST_PTM_CORE2      0
0014 #define SRST_PTM_CORE3      1
0015 #define SRST_CORE2      5
0016 #define SRST_CORE3      6
0017 #define SRST_CORE2_DBG      10
0018 #define SRST_CORE3_DBG      11
0019 
0020 #define SRST_TIMER2     16
0021 #define SRST_TIMER4     23
0022 #define SRST_I2S0       24
0023 #define SRST_TIMER5     25
0024 #define SRST_TIMER3     29
0025 #define SRST_TIMER6     31
0026 
0027 #define SRST_PTM3       36
0028 #define SRST_PTM3_ATB       37
0029 
0030 #define SRST_GPS        67
0031 #define SRST_HSICPHY        75
0032 #define SRST_TIMER      78
0033 
0034 #define SRST_PTM2       92
0035 #define SRST_CORE2_WDT      94
0036 #define SRST_CORE3_WDT      95
0037 
0038 #define SRST_PTM2_ATB       111
0039 
0040 #define SRST_HSIC       117
0041 #define SRST_CTI2       118
0042 #define SRST_CTI2_APB       119
0043 #define SRST_GPU_BRIDGE     121
0044 #define SRST_CTI3       123
0045 #define SRST_CTI3_APB       124
0046 
0047 #endif