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OSCL-LXR

 
 

    


0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
0004  * Copyright (c) BayLibre, SAS.
0005  * Author : Neil Armstrong <narmstrong@baylibre.com>
0006  */
0007 
0008 #ifndef _DT_BINDINGS_CLK_MDM_GCC_9615_H
0009 #define _DT_BINDINGS_CLK_MDM_GCC_9615_H
0010 
0011 #define AFAB_CLK_SRC                0
0012 #define AFAB_CORE_CLK               1
0013 #define SFAB_MSS_Q6_SW_A_CLK            2
0014 #define SFAB_MSS_Q6_FW_A_CLK            3
0015 #define QDSS_STM_CLK                4
0016 #define SCSS_A_CLK              5
0017 #define SCSS_H_CLK              6
0018 #define SCSS_XO_SRC_CLK             7
0019 #define AFAB_EBI1_CH0_A_CLK         8
0020 #define AFAB_EBI1_CH1_A_CLK         9
0021 #define AFAB_AXI_S0_FCLK            10
0022 #define AFAB_AXI_S1_FCLK            11
0023 #define AFAB_AXI_S2_FCLK            12
0024 #define AFAB_AXI_S3_FCLK            13
0025 #define AFAB_AXI_S4_FCLK            14
0026 #define SFAB_CORE_CLK               15
0027 #define SFAB_AXI_S0_FCLK            16
0028 #define SFAB_AXI_S1_FCLK            17
0029 #define SFAB_AXI_S2_FCLK            18
0030 #define SFAB_AXI_S3_FCLK            19
0031 #define SFAB_AXI_S4_FCLK            20
0032 #define SFAB_AHB_S0_FCLK            21
0033 #define SFAB_AHB_S1_FCLK            22
0034 #define SFAB_AHB_S2_FCLK            23
0035 #define SFAB_AHB_S3_FCLK            24
0036 #define SFAB_AHB_S4_FCLK            25
0037 #define SFAB_AHB_S5_FCLK            26
0038 #define SFAB_AHB_S6_FCLK            27
0039 #define SFAB_AHB_S7_FCLK            28
0040 #define QDSS_AT_CLK_SRC             29
0041 #define QDSS_AT_CLK             30
0042 #define QDSS_TRACECLKIN_CLK_SRC         31
0043 #define QDSS_TRACECLKIN_CLK         32
0044 #define QDSS_TSCTR_CLK_SRC          33
0045 #define QDSS_TSCTR_CLK              34
0046 #define SFAB_ADM0_M0_A_CLK          35
0047 #define SFAB_ADM0_M1_A_CLK          36
0048 #define SFAB_ADM0_M2_H_CLK          37
0049 #define ADM0_CLK                38
0050 #define ADM0_PBUS_CLK               39
0051 #define MSS_XPU_CLK             40
0052 #define IMEM0_A_CLK             41
0053 #define QDSS_H_CLK              42
0054 #define PCIE_A_CLK              43
0055 #define PCIE_AUX_CLK                44
0056 #define PCIE_PHY_REF_CLK            45
0057 #define PCIE_H_CLK              46
0058 #define SFAB_CLK_SRC                47
0059 #define MAHB0_CLK               48
0060 #define Q6SW_CLK_SRC                49
0061 #define Q6SW_CLK                50
0062 #define Q6FW_CLK_SRC                51
0063 #define Q6FW_CLK                52
0064 #define SFAB_MSS_M_A_CLK            53
0065 #define SFAB_USB3_M_A_CLK           54
0066 #define SFAB_LPASS_Q6_A_CLK         55
0067 #define SFAB_AFAB_M_A_CLK           56
0068 #define AFAB_SFAB_M0_A_CLK          57
0069 #define AFAB_SFAB_M1_A_CLK          58
0070 #define SFAB_SATA_S_H_CLK           59
0071 #define DFAB_CLK_SRC                60
0072 #define DFAB_CLK                61
0073 #define SFAB_DFAB_M_A_CLK           62
0074 #define DFAB_SFAB_M_A_CLK           63
0075 #define DFAB_SWAY0_H_CLK            64
0076 #define DFAB_SWAY1_H_CLK            65
0077 #define DFAB_ARB0_H_CLK             66
0078 #define DFAB_ARB1_H_CLK             67
0079 #define PPSS_H_CLK              68
0080 #define PPSS_PROC_CLK               69
0081 #define PPSS_TIMER0_CLK             70
0082 #define PPSS_TIMER1_CLK             71
0083 #define PMEM_A_CLK              72
0084 #define DMA_BAM_H_CLK               73
0085 #define SIC_H_CLK               74
0086 #define SPS_TIC_H_CLK               75
0087 #define SLIMBUS_H_CLK               76
0088 #define SLIMBUS_XO_SRC_CLK          77
0089 #define CFPB_2X_CLK_SRC             78
0090 #define CFPB_CLK                79
0091 #define CFPB0_H_CLK             80
0092 #define CFPB1_H_CLK             81
0093 #define CFPB2_H_CLK             82
0094 #define SFAB_CFPB_M_H_CLK           83
0095 #define CFPB_MASTER_H_CLK           84
0096 #define SFAB_CFPB_S_H_CLK           85
0097 #define CFPB_SPLITTER_H_CLK         86
0098 #define TSIF_H_CLK              87
0099 #define TSIF_INACTIVITY_TIMERS_CLK      88
0100 #define TSIF_REF_SRC                89
0101 #define TSIF_REF_CLK                90
0102 #define CE1_H_CLK               91
0103 #define CE1_CORE_CLK                92
0104 #define CE1_SLEEP_CLK               93
0105 #define CE2_H_CLK               94
0106 #define CE2_CORE_CLK                95
0107 #define SFPB_H_CLK_SRC              97
0108 #define SFPB_H_CLK              98
0109 #define SFAB_SFPB_M_H_CLK           99
0110 #define SFAB_SFPB_S_H_CLK           100
0111 #define RPM_PROC_CLK                101
0112 #define RPM_BUS_H_CLK               102
0113 #define RPM_SLEEP_CLK               103
0114 #define RPM_TIMER_CLK               104
0115 #define RPM_MSG_RAM_H_CLK           105
0116 #define PMIC_ARB0_H_CLK             106
0117 #define PMIC_ARB1_H_CLK             107
0118 #define PMIC_SSBI2_SRC              108
0119 #define PMIC_SSBI2_CLK              109
0120 #define SDC1_H_CLK              110
0121 #define SDC2_H_CLK              111
0122 #define SDC3_H_CLK              112
0123 #define SDC4_H_CLK              113
0124 #define SDC5_H_CLK              114
0125 #define SDC1_SRC                115
0126 #define SDC2_SRC                116
0127 #define SDC3_SRC                117
0128 #define SDC4_SRC                118
0129 #define SDC5_SRC                119
0130 #define SDC1_CLK                120
0131 #define SDC2_CLK                121
0132 #define SDC3_CLK                122
0133 #define SDC4_CLK                123
0134 #define SDC5_CLK                124
0135 #define DFAB_A2_H_CLK               125
0136 #define USB_HS1_H_CLK               126
0137 #define USB_HS1_XCVR_SRC            127
0138 #define USB_HS1_XCVR_CLK            128
0139 #define USB_HSIC_H_CLK              129
0140 #define USB_HSIC_XCVR_FS_SRC            130
0141 #define USB_HSIC_XCVR_FS_CLK            131
0142 #define USB_HSIC_SYSTEM_CLK_SRC         132
0143 #define USB_HSIC_SYSTEM_CLK         133
0144 #define CFPB0_C0_H_CLK              134
0145 #define CFPB0_C1_H_CLK              135
0146 #define CFPB0_D0_H_CLK              136
0147 #define CFPB0_D1_H_CLK              137
0148 #define USB_FS1_H_CLK               138
0149 #define USB_FS1_XCVR_FS_SRC         139
0150 #define USB_FS1_XCVR_FS_CLK         140
0151 #define USB_FS1_SYSTEM_CLK          141
0152 #define USB_FS2_H_CLK               142
0153 #define USB_FS2_XCVR_FS_SRC         143
0154 #define USB_FS2_XCVR_FS_CLK         144
0155 #define USB_FS2_SYSTEM_CLK          145
0156 #define GSBI_COMMON_SIM_SRC         146
0157 #define GSBI1_H_CLK             147
0158 #define GSBI2_H_CLK             148
0159 #define GSBI3_H_CLK             149
0160 #define GSBI4_H_CLK             150
0161 #define GSBI5_H_CLK             151
0162 #define GSBI6_H_CLK             152
0163 #define GSBI7_H_CLK             153
0164 #define GSBI8_H_CLK             154
0165 #define GSBI9_H_CLK             155
0166 #define GSBI10_H_CLK                156
0167 #define GSBI11_H_CLK                157
0168 #define GSBI12_H_CLK                158
0169 #define GSBI1_UART_SRC              159
0170 #define GSBI1_UART_CLK              160
0171 #define GSBI2_UART_SRC              161
0172 #define GSBI2_UART_CLK              162
0173 #define GSBI3_UART_SRC              163
0174 #define GSBI3_UART_CLK              164
0175 #define GSBI4_UART_SRC              165
0176 #define GSBI4_UART_CLK              166
0177 #define GSBI5_UART_SRC              167
0178 #define GSBI5_UART_CLK              168
0179 #define GSBI6_UART_SRC              169
0180 #define GSBI6_UART_CLK              170
0181 #define GSBI7_UART_SRC              171
0182 #define GSBI7_UART_CLK              172
0183 #define GSBI8_UART_SRC              173
0184 #define GSBI8_UART_CLK              174
0185 #define GSBI9_UART_SRC              175
0186 #define GSBI9_UART_CLK              176
0187 #define GSBI10_UART_SRC             177
0188 #define GSBI10_UART_CLK             178
0189 #define GSBI11_UART_SRC             179
0190 #define GSBI11_UART_CLK             180
0191 #define GSBI12_UART_SRC             181
0192 #define GSBI12_UART_CLK             182
0193 #define GSBI1_QUP_SRC               183
0194 #define GSBI1_QUP_CLK               184
0195 #define GSBI2_QUP_SRC               185
0196 #define GSBI2_QUP_CLK               186
0197 #define GSBI3_QUP_SRC               187
0198 #define GSBI3_QUP_CLK               188
0199 #define GSBI4_QUP_SRC               189
0200 #define GSBI4_QUP_CLK               190
0201 #define GSBI5_QUP_SRC               191
0202 #define GSBI5_QUP_CLK               192
0203 #define GSBI6_QUP_SRC               193
0204 #define GSBI6_QUP_CLK               194
0205 #define GSBI7_QUP_SRC               195
0206 #define GSBI7_QUP_CLK               196
0207 #define GSBI8_QUP_SRC               197
0208 #define GSBI8_QUP_CLK               198
0209 #define GSBI9_QUP_SRC               199
0210 #define GSBI9_QUP_CLK               200
0211 #define GSBI10_QUP_SRC              201
0212 #define GSBI10_QUP_CLK              202
0213 #define GSBI11_QUP_SRC              203
0214 #define GSBI11_QUP_CLK              204
0215 #define GSBI12_QUP_SRC              205
0216 #define GSBI12_QUP_CLK              206
0217 #define GSBI1_SIM_CLK               207
0218 #define GSBI2_SIM_CLK               208
0219 #define GSBI3_SIM_CLK               209
0220 #define GSBI4_SIM_CLK               210
0221 #define GSBI5_SIM_CLK               211
0222 #define GSBI6_SIM_CLK               212
0223 #define GSBI7_SIM_CLK               213
0224 #define GSBI8_SIM_CLK               214
0225 #define GSBI9_SIM_CLK               215
0226 #define GSBI10_SIM_CLK              216
0227 #define GSBI11_SIM_CLK              217
0228 #define GSBI12_SIM_CLK              218
0229 #define USB_HSIC_HSIC_CLK_SRC           219
0230 #define USB_HSIC_HSIC_CLK           220
0231 #define USB_HSIC_HSIO_CAL_CLK           221
0232 #define SPDM_CFG_H_CLK              222
0233 #define SPDM_MSTR_H_CLK             223
0234 #define SPDM_FF_CLK_SRC             224
0235 #define SPDM_FF_CLK             225
0236 #define SEC_CTRL_CLK                226
0237 #define SEC_CTRL_ACC_CLK_SRC            227
0238 #define SEC_CTRL_ACC_CLK            228
0239 #define TLMM_H_CLK              229
0240 #define TLMM_CLK                230
0241 #define SFAB_MSS_S_H_CLK            231
0242 #define MSS_SLP_CLK             232
0243 #define MSS_Q6SW_JTAG_CLK           233
0244 #define MSS_Q6FW_JTAG_CLK           234
0245 #define MSS_S_H_CLK             235
0246 #define MSS_CXO_SRC_CLK             236
0247 #define SATA_H_CLK              237
0248 #define SATA_CLK_SRC                238
0249 #define SATA_RXOOB_CLK              239
0250 #define SATA_PMALIVE_CLK            240
0251 #define SATA_PHY_REF_CLK            241
0252 #define TSSC_CLK_SRC                242
0253 #define TSSC_CLK                243
0254 #define PDM_SRC                 244
0255 #define PDM_CLK                 245
0256 #define GP0_SRC                 246
0257 #define GP0_CLK                 247
0258 #define GP1_SRC                 248
0259 #define GP1_CLK                 249
0260 #define GP2_SRC                 250
0261 #define GP2_CLK                 251
0262 #define MPM_CLK                 252
0263 #define EBI1_CLK_SRC                253
0264 #define EBI1_CH0_CLK                254
0265 #define EBI1_CH1_CLK                255
0266 #define EBI1_2X_CLK             256
0267 #define EBI1_CH0_DQ_CLK             257
0268 #define EBI1_CH1_DQ_CLK             258
0269 #define EBI1_CH0_CA_CLK             259
0270 #define EBI1_CH1_CA_CLK             260
0271 #define EBI1_XO_CLK             261
0272 #define SFAB_SMPSS_S_H_CLK          262
0273 #define PRNG_SRC                263
0274 #define PRNG_CLK                264
0275 #define PXO_SRC                 265
0276 #define LPASS_CXO_CLK               266
0277 #define LPASS_PXO_CLK               267
0278 #define SPDM_CY_PORT0_CLK           268
0279 #define SPDM_CY_PORT1_CLK           269
0280 #define SPDM_CY_PORT2_CLK           270
0281 #define SPDM_CY_PORT3_CLK           271
0282 #define SPDM_CY_PORT4_CLK           272
0283 #define SPDM_CY_PORT5_CLK           273
0284 #define SPDM_CY_PORT6_CLK           274
0285 #define SPDM_CY_PORT7_CLK           275
0286 #define PLL0                    276
0287 #define PLL0_VOTE               277
0288 #define PLL3                    278
0289 #define PLL3_VOTE               279
0290 #define PLL4_VOTE               280
0291 #define PLL5                    281
0292 #define PLL5_VOTE               282
0293 #define PLL6                    283
0294 #define PLL6_VOTE               284
0295 #define PLL7_VOTE               285
0296 #define PLL8                    286
0297 #define PLL8_VOTE               287
0298 #define PLL9                    288
0299 #define PLL10                   289
0300 #define PLL11                   290
0301 #define PLL12                   291
0302 #define PLL13                   292
0303 #define PLL14                   293
0304 #define PLL14_VOTE              294
0305 #define USB_HS3_H_CLK               295
0306 #define USB_HS3_XCVR_SRC            296
0307 #define USB_HS3_XCVR_CLK            297
0308 #define USB_HS4_H_CLK               298
0309 #define USB_HS4_XCVR_SRC            299
0310 #define USB_HS4_XCVR_CLK            300
0311 #define SATA_PHY_CFG_CLK            301
0312 #define SATA_A_CLK              302
0313 #define CE3_SRC                 303
0314 #define CE3_CORE_CLK                304
0315 #define CE3_H_CLK               305
0316 #define USB_HS1_SYSTEM_CLK_SRC          306
0317 #define USB_HS1_SYSTEM_CLK          307
0318 #define EBI2_CLK                308
0319 #define EBI2_AON_CLK                309
0320 
0321 #endif