dt-bindings/clock/bcm-nsp.h

0001 /*
0002  *  BSD LICENSE
0003  *
0004  *  Copyright(c) 2015 Broadcom Corporation.  All rights reserved.
0005  *
0006  *  Redistribution and use in source and binary forms, with or without
0007  *  modification, are permitted provided that the following conditions
0008  *  are met:
0009  *
0010  *  * Redistributions of source code must retain the above copyright
0011  *    notice, this list of conditions and the following disclaimer.
0012  *  * Redistributions in binary form must reproduce the above copyright
0013  *    notice, this list of conditions and the following disclaimer in
0014  *    the documentation and/or other materials provided with the
0015  *    distribution.
0016  *  * Neither the name of Broadcom Corporation nor the names of its
0017  *    contributors may be used to endorse or promote products derived
0018  *    from this software without specific prior written permission.
0019  *
0020  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
0021  *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
0022  *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
0023  *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
0024  *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
0025  *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
0026  *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
0027  *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
0028  *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0029  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
0030  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0031  */
0032
0033 #ifndef _CLOCK_BCM_NSP_H
0034 #define _CLOCK_BCM_NSP_H
0035
0036 /* GENPLL clock channel ID */
0037 #define BCM_NSP_GENPLL          0
0038 #define BCM_NSP_GENPLL_PHY_CLK      1
0039 #define BCM_NSP_GENPLL_ENET_SW_CLK  2
0040 #define BCM_NSP_GENPLL_USB_PHY_REF_CLK  3
0041 #define BCM_NSP_GENPLL_IPROCFAST_CLK    4
0042 #define BCM_NSP_GENPLL_SATA1_CLK    5
0043 #define BCM_NSP_GENPLL_SATA2_CLK    6
0044
0045 /* LCPLL0 clock channel ID */
0046 #define BCM_NSP_LCPLL0          0
0047 #define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK 1
0048 #define BCM_NSP_LCPLL0_SDIO_CLK     2
0049 #define BCM_NSP_LCPLL0_DDR_PHY_CLK  3
0050
0051 #endif /* _CLOCK_BCM_NSP_H */