arm64/xilinx/zynqmp-zc1751-xm017-dc3.dts

0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * dts file for Xilinx ZynqMP zc1751-xm017-dc3
0004  *
0005  * (C) Copyright 2016 - 2021, Xilinx, Inc.
0006  *
0007  * Michal Simek <michal.simek@xilinx.com>
0008  */
0009
0010 /dts-v1/;
0011
0012 #include "zynqmp.dtsi"
0013 #include "zynqmp-clk-ccf.dtsi"
0014 #include <dt-bindings/phy/phy.h>
0015
0016 / {
0017         model = "ZynqMP zc1751-xm017-dc3 RevA";
0018         compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
0019
0020         aliases {
0021                 ethernet0 = &gem0;
0022                 i2c0 = &i2c0;
0023                 i2c1 = &i2c1;
0024                 mmc0 = &sdhci1;
0025                 rtc0 = &rtc;
0026                 serial0 = &uart0;
0027                 serial1 = &uart1;
0028                 usb0 = &usb0;
0029                 usb1 = &usb1;
0030         };
0031
0032         chosen {
0033                 bootargs = "earlycon";
0034                 stdout-path = "serial0:115200n8";
0035         };
0036
0037         memory@0 {
0038                 device_type = "memory";
0039                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
0040         };
0041
0042         clock_si5338_2: clk26 {
0043                 compatible = "fixed-clock";
0044                 #clock-cells = <0>;
0045                 clock-frequency = <26000000>;
0046         };
0047
0048         clock_si5338_3: clk125 {
0049                 compatible = "fixed-clock";
0050                 #clock-cells = <0>;
0051                 clock-frequency = <125000000>;
0052         };
0053 };
0054
0055 &fpd_dma_chan1 {
0056         status = "okay";
0057 };
0058
0059 &fpd_dma_chan2 {
0060         status = "okay";
0061 };
0062
0063 &fpd_dma_chan3 {
0064         status = "okay";
0065 };
0066
0067 &fpd_dma_chan4 {
0068         status = "okay";
0069 };
0070
0071 &fpd_dma_chan5 {
0072         status = "okay";
0073 };
0074
0075 &fpd_dma_chan6 {
0076         status = "okay";
0077 };
0078
0079 &fpd_dma_chan7 {
0080         status = "okay";
0081 };
0082
0083 &fpd_dma_chan8 {
0084         status = "okay";
0085 };
0086
0087 &gem0 {
0088         status = "okay";
0089         phy-handle = <&phy0>;
0090         phy-mode = "rgmii-id";
0091         phy0: ethernet-phy@0 { /* VSC8211 */
0092                 reg = <0>;
0093         };
0094 };
0095
0096 &gpio {
0097         status = "okay";
0098 };
0099
0100 /* just eeprom here */
0101 &i2c0 {
0102         status = "okay";
0103         clock-frequency = <400000>;
0104
0105         tca6416_u26: gpio@20 {
0106                 compatible = "ti,tca6416";
0107                 reg = <0x20>;
0108                 gpio-controller;
0109                 #gpio-cells = <2>;
0110                 /* IRQ not connected */
0111         };
0112
0113         rtc@68 {
0114                 compatible = "dallas,ds1339";
0115                 reg = <0x68>;
0116         };
0117 };
0118
0119 /* eeprom24c02 and SE98A temp chip pca9306 */
0120 &i2c1 {
0121         status = "okay";
0122         clock-frequency = <400000>;
0123 };
0124
0125 /* MT29F64G08AECDBJ4-6 */
0126 &nand0 {
0127         status = "okay";
0128         arasan,has-mdma;
0129         num-cs = <2>;
0130 };
0131
0132 &psgtr {
0133         status = "okay";
0134         /* usb3, sata */
0135         clocks = <&clock_si5338_2>, <&clock_si5338_3>;
0136         clock-names = "ref2", "ref3";
0137 };
0138
0139 &rtc {
0140         status = "okay";
0141 };
0142
0143 &sata {
0144         status = "okay";
0145         /* SATA phy OOB timing settings */
0146         ceva,p0-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
0147         ceva,p0-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
0148         ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
0149         ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
0150         ceva,p1-cominit-params = /bits/ 8 <0x1B 0x4D 0x18 0x28>;
0151         ceva,p1-comwake-params = /bits/ 8 <0x06 0x19 0x08 0x0E>;
0152         ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
0153         ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
0154         phy-names = "sata-phy";
0155         phys = <&psgtr 2 PHY_TYPE_SATA 0 3>;
0156 };
0157
0158 &sdhci1 { /* emmc with some settings */
0159         status = "okay";
0160 };
0161
0162 /* main */
0163 &uart0 {
0164         status = "okay";
0165 };
0166
0167 /* DB9 */
0168 &uart1 {
0169         status = "okay";
0170 };
0171
0172 &usb0 {
0173         status = "okay";
0174         phy-names = "usb3-phy";
0175         phys = <&psgtr 0 PHY_TYPE_USB3 0 2>;
0176 };
0177
0178 &dwc3_0 {
0179         status = "okay";
0180         dr_mode = "host";
0181         snps,usb3_lpm_capable;
0182         maximum-speed = "super-speed";
0183 };
0184
0185 /* ULPI SMSC USB3320 */
0186 &usb1 {
0187         status = "okay";
0188         phy-names = "usb3-phy";
0189         phys = <&psgtr 3 PHY_TYPE_USB3 1 2>;
0190 };
0191
0192 &dwc3_1 {
0193         status = "okay";
0194         dr_mode = "host";
0195         snps,usb3_lpm_capable;
0196         maximum-speed = "super-speed";
0197 };