arm64/ti/k3-am65-iot2050-common-pg2.dtsi

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) Siemens AG, 2021
0004  *
0005  * Authors:
0006  *   Chao Zeng <chao.zeng@siemens.com>
0007  *   Jan Kiszka <jan.kiszka@siemens.com>
0008  *
0009  * Common bits of the IOT2050 Basic and Advanced variants, PG2
0010  */
0011
0012 &main_pmx0 {
0013         cp2102n_reset_pin_default: cp2102n-reset-pin-default {
0014                 pinctrl-single,pins = <
0015                         /* (AF12) GPIO1_24, used as cp2102 reset */
0016                         AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7)
0017                 >;
0018         };
0019 };
0020
0021 &main_gpio1 {
0022         pinctrl-names = "default";
0023         pinctrl-0 = <&cp2102n_reset_pin_default>;
0024         gpio-line-names =
0025                 "", "", "", "", "", "", "", "", "", "",
0026                 "", "", "", "", "", "", "", "", "", "",
0027                 "", "", "", "", "CP2102N-RESET";
0028 };
0029
0030 &dss {
0031         /* Workaround needed to get DP clock of 154Mhz */
0032         assigned-clocks = <&k3_clks 67 0>;
0033 };
0034
0035 &serdes0 {
0036         assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
0037         assigned-clock-parents = <&k3_clks 153 7>, <&k3_clks 153 4>;
0038 };
0039
0040 &dwc3_0 {
0041         assigned-clock-parents = <&k3_clks 151 4>,  /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
0042                                  <&k3_clks 151 8>;  /* set PIPE3_TXB_CLK to WIZ8B2M4VSB */
0043         phys = <&serdes0 PHY_TYPE_USB3 0>;
0044         phy-names = "usb3-phy";
0045 };
0046
0047 &usb0 {
0048         maximum-speed = "super-speed";
0049         snps,dis-u1-entry-quirk;
0050         snps,dis-u2-entry-quirk;
0051 };