0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for AM64 SoC Family MCU Domain peripherals
0004 *
0005 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
0006 */
0007
0008 &cbass_mcu {
0009 mcu_uart0: serial@4a00000 {
0010 compatible = "ti,am64-uart", "ti,am654-uart";
0011 reg = <0x00 0x04a00000 0x00 0x100>;
0012 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
0013 current-speed = <115200>;
0014 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
0015 clocks = <&k3_clks 149 0>;
0016 clock-names = "fclk";
0017 };
0018
0019 mcu_uart1: serial@4a10000 {
0020 compatible = "ti,am64-uart", "ti,am654-uart";
0021 reg = <0x00 0x04a10000 0x00 0x100>;
0022 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
0023 current-speed = <115200>;
0024 power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
0025 clocks = <&k3_clks 160 0>;
0026 clock-names = "fclk";
0027 };
0028
0029 mcu_i2c0: i2c@4900000 {
0030 compatible = "ti,am64-i2c", "ti,omap4-i2c";
0031 reg = <0x00 0x04900000 0x00 0x100>;
0032 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0033 #address-cells = <1>;
0034 #size-cells = <0>;
0035 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
0036 clocks = <&k3_clks 106 2>;
0037 clock-names = "fck";
0038 };
0039
0040 mcu_i2c1: i2c@4910000 {
0041 compatible = "ti,am64-i2c", "ti,omap4-i2c";
0042 reg = <0x00 0x04910000 0x00 0x100>;
0043 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
0044 #address-cells = <1>;
0045 #size-cells = <0>;
0046 power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
0047 clocks = <&k3_clks 107 2>;
0048 clock-names = "fck";
0049 };
0050
0051 mcu_spi0: spi@4b00000 {
0052 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
0053 reg = <0x00 0x04b00000 0x00 0x400>;
0054 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
0055 #address-cells = <1>;
0056 #size-cells = <0>;
0057 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
0058 clocks = <&k3_clks 147 0>;
0059 };
0060
0061 mcu_spi1: spi@4b10000 {
0062 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
0063 reg = <0x00 0x04b10000 0x00 0x400>;
0064 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
0065 #address-cells = <1>;
0066 #size-cells = <0>;
0067 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
0068 clocks = <&k3_clks 148 0>;
0069 };
0070
0071 mcu_gpio_intr: interrupt-controller@4210000 {
0072 compatible = "ti,sci-intr";
0073 reg = <0x00 0x04210000 0x00 0x200>;
0074 ti,intr-trigger-type = <1>;
0075 interrupt-controller;
0076 interrupt-parent = <&gic500>;
0077 #interrupt-cells = <1>;
0078 ti,sci = <&dmsc>;
0079 ti,sci-dev-id = <5>;
0080 ti,interrupt-ranges = <0 104 4>;
0081 };
0082
0083 mcu_gpio0: gpio@4201000 {
0084 compatible = "ti,am64-gpio", "ti,keystone-gpio";
0085 reg = <0x0 0x4201000 0x0 0x100>;
0086 gpio-controller;
0087 #gpio-cells = <2>;
0088 interrupt-parent = <&mcu_gpio_intr>;
0089 interrupts = <30>, <31>;
0090 interrupt-controller;
0091 #interrupt-cells = <2>;
0092 ti,ngpio = <23>;
0093 ti,davinci-gpio-unbanked = <0>;
0094 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
0095 clocks = <&k3_clks 79 0>;
0096 clock-names = "gpio";
0097 };
0098
0099 mcu_pmx0: pinctrl@4084000 {
0100 compatible = "pinctrl-single";
0101 reg = <0x00 0x4084000 0x00 0x84>;
0102 #pinctrl-cells = <1>;
0103 pinctrl-single,register-width = <32>;
0104 pinctrl-single,function-mask = <0xffffffff>;
0105 };
0106 };
