0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for AM62 SoC Family
0004 *
0005 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
0006 */
0007
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/interrupt-controller/irq.h>
0010 #include <dt-bindings/interrupt-controller/arm-gic.h>
0011 #include <dt-bindings/pinctrl/k3.h>
0012 #include <dt-bindings/soc/ti,sci_pm_domain.h>
0013
0014 / {
0015 model = "Texas Instruments K3 AM625 SoC";
0016 compatible = "ti,am625";
0017 interrupt-parent = <&gic500>;
0018 #address-cells = <2>;
0019 #size-cells = <2>;
0020
0021 chosen { };
0022
0023 firmware {
0024 optee {
0025 compatible = "linaro,optee-tz";
0026 method = "smc";
0027 };
0028
0029 psci: psci {
0030 compatible = "arm,psci-1.0";
0031 method = "smc";
0032 };
0033 };
0034
0035 a53_timer0: timer-cl0-cpu0 {
0036 compatible = "arm,armv8-timer";
0037 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
0038 <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
0039 <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
0040 <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
0041 };
0042
0043 pmu: pmu {
0044 compatible = "arm,cortex-a53-pmu";
0045 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
0046 };
0047
0048 cbass_main: bus@f0000 {
0049 compatible = "simple-bus";
0050 #address-cells = <2>;
0051 #size-cells = <2>;
0052
0053 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
0054 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
0055 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
0056 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
0057 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
0058 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
0059 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
0060 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
0061 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
0062 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
0063 <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */
0064 <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */
0065 <0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>, /* CSI window */
0066 <0x00 0x30200000 0x00 0x30200000 0x00 0x00010000>, /* DSS */
0067 <0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core window */
0068 <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core window */
0069 <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA3UL */
0070 <0x00 0x43600000 0x00 0x43600000 0x00 0x00010000>, /* SA3 sproxy data */
0071 <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */
0072 <0x00 0x44860000 0x00 0x44860000 0x00 0x00040000>, /* SA3 sproxy config */
0073 <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMSS */
0074 <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS0 DAT1 */
0075 <0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>, /* OCSRAM */
0076 <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */
0077 <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */
0078
0079 /* MCU Domain Range */
0080 <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>,
0081
0082 /* Wakeup Domain Range */
0083 <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>,
0084 <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
0085
0086 cbass_mcu: bus@4000000 {
0087 compatible = "simple-bus";
0088 #address-cells = <2>;
0089 #size-cells = <2>;
0090 ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
0091 };
0092
0093 cbass_wakeup: bus@2b000000 {
0094 compatible = "simple-bus";
0095 #address-cells = <2>;
0096 #size-cells = <2>;
0097 ranges = <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */
0098 <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
0099 };
0100 };
0101 };
0102
0103 /* Now include the peripherals for each bus segments */
0104 #include "k3-am62-main.dtsi"
0105 #include "k3-am62-mcu.dtsi"
0106 #include "k3-am62-wakeup.dtsi"
