0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for AM625 SoC Family MCU Domain peripherals
0004 *
0005 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
0006 */
0007
0008 &cbass_mcu {
0009 mcu_pmx0: pinctrl@4084000 {
0010 compatible = "pinctrl-single";
0011 reg = <0x00 0x04084000 0x00 0x88>;
0012 #pinctrl-cells = <1>;
0013 pinctrl-single,register-width = <32>;
0014 pinctrl-single,function-mask = <0xffffffff>;
0015 };
0016
0017 mcu_uart0: serial@4a00000 {
0018 compatible = "ti,am64-uart", "ti,am654-uart";
0019 reg = <0x00 0x04a00000 0x00 0x100>;
0020 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
0021 power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
0022 clocks = <&k3_clks 149 0>;
0023 clock-names = "fclk";
0024 };
0025
0026 mcu_i2c0: i2c@4900000 {
0027 compatible = "ti,am64-i2c", "ti,omap4-i2c";
0028 reg = <0x00 0x04900000 0x00 0x100>;
0029 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
0030 #address-cells = <1>;
0031 #size-cells = <0>;
0032 power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
0033 clocks = <&k3_clks 106 2>;
0034 clock-names = "fck";
0035 };
0036
0037 mcu_spi0: spi@4b00000 {
0038 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
0039 reg = <0x00 0x04b00000 0x00 0x400>;
0040 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
0041 #address-cells = <1>;
0042 #size-cells = <0>;
0043 power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
0044 clocks = <&k3_clks 147 0>;
0045 };
0046
0047 mcu_spi1: spi@4b10000 {
0048 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
0049 reg = <0x00 0x04b10000 0x00 0x400>;
0050 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
0051 #address-cells = <1>;
0052 #size-cells = <0>;
0053 power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
0054 clocks = <&k3_clks 148 0>;
0055 };
0056
0057 mcu_gpio_intr: interrupt-controller@4210000 {
0058 compatible = "ti,sci-intr";
0059 reg = <0x00 0x04210000 0x00 0x200>;
0060 ti,intr-trigger-type = <1>;
0061 interrupt-controller;
0062 interrupt-parent = <&gic500>;
0063 #interrupt-cells = <1>;
0064 ti,sci = <&dmsc>;
0065 ti,sci-dev-id = <5>;
0066 ti,interrupt-ranges = <0 104 4>;
0067 };
0068
0069 mcu_gpio0: gpio@4201000 {
0070 compatible = "ti,am64-gpio", "ti,keystone-gpio";
0071 reg = <0x00 0x4201000 0x00 0x100>;
0072 gpio-controller;
0073 #gpio-cells = <2>;
0074 interrupt-parent = <&mcu_gpio_intr>;
0075 interrupts = <30>, <31>;
0076 interrupt-controller;
0077 #interrupt-cells = <2>;
0078 ti,ngpio = <24>;
0079 ti,davinci-gpio-unbanked = <0>;
0080 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
0081 clocks = <&k3_clks 79 0>;
0082 clock-names = "gpio";
0083 };
0084 };
