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0001 /*
0002  * Spreadtrum Whale2 platform peripherals
0003  *
0004  * Copyright (C) 2016, Spreadtrum Communications Inc.
0005  *
0006  * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0007  */
0008 
0009 #include <dt-bindings/clock/sprd,sc9860-clk.h>
0010 
0011 / {
0012         interrupt-parent = <&gic>;
0013         #address-cells = <2>;
0014         #size-cells = <2>;
0015 
0016         soc: soc {
0017                 compatible = "simple-bus";
0018                 #address-cells = <2>;
0019                 #size-cells = <2>;
0020                 ranges;
0021 
0022                 ap_ahb_regs: syscon@20210000 {
0023                         compatible = "syscon";
0024                         reg = <0 0x20210000 0 0x10000>;
0025                 };
0026 
0027                 pmu_regs: syscon@402b0000 {
0028                         compatible = "syscon";
0029                         reg = <0 0x402b0000 0 0x10000>;
0030                 };
0031 
0032                 aon_regs: syscon@402e0000 {
0033                         compatible = "syscon";
0034                         reg = <0 0x402e0000 0 0x10000>;
0035                 };
0036 
0037                 ana_regs: syscon@40400000 {
0038                         compatible = "syscon";
0039                         reg = <0 0x40400000 0 0x10000>;
0040                 };
0041 
0042                 agcp_regs: syscon@415e0000 {
0043                         compatible = "syscon";
0044                         reg = <0 0x415e0000 0 0x1000000>;
0045                 };
0046 
0047                 vsp_regs: syscon@61100000 {
0048                         compatible = "syscon";
0049                         reg = <0 0x61100000 0 0x10000>;
0050                 };
0051 
0052                 cam_regs: syscon@62100000 {
0053                         compatible = "syscon";
0054                         reg = <0 0x62100000 0 0x10000>;
0055                 };
0056 
0057                 disp_regs: syscon@63100000 {
0058                         compatible = "syscon";
0059                         reg = <0 0x63100000 0 0x10000>;
0060                 };
0061 
0062                 ap_apb_regs: syscon@70b00000 {
0063                         compatible = "syscon";
0064                         reg = <0 0x70b00000 0 0x40000>;
0065                 };
0066 
0067                 ap-apb {
0068                         compatible = "simple-bus";
0069                         #address-cells = <1>;
0070                         #size-cells = <1>;
0071                         ranges = <0 0x0 0x70000000 0x10000000>;
0072 
0073                         uart0: serial@0 {
0074                                 compatible = "sprd,sc9860-uart",
0075                                              "sprd,sc9836-uart";
0076                                 reg = <0x0 0x100>;
0077                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
0078                                 clock-names = "enable", "uart", "source";
0079                                 clocks = <&apapb_gate CLK_UART0_EB>,
0080                                        <&ap_clk CLK_UART0>, <&ext_26m>;
0081                                 status = "disabled";
0082                         };
0083 
0084                         uart1: serial@100000 {
0085                                 compatible = "sprd,sc9860-uart",
0086                                              "sprd,sc9836-uart";
0087                                 reg = <0x100000 0x100>;
0088                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
0089                                 clock-names = "enable", "uart", "source";
0090                                 clocks = <&apapb_gate CLK_UART1_EB>,
0091                                        <&ap_clk CLK_UART1>, <&ext_26m>;
0092                                 status = "disabled";
0093                         };
0094 
0095                         uart2: serial@200000 {
0096                                 compatible = "sprd,sc9860-uart",
0097                                              "sprd,sc9836-uart";
0098                                 reg = <0x200000 0x100>;
0099                                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
0100                                 clock-names = "enable", "uart", "source";
0101                                 clocks = <&apapb_gate CLK_UART2_EB>,
0102                                        <&ap_clk CLK_UART2>, <&ext_26m>;
0103                                 status = "disabled";
0104                         };
0105 
0106                         uart3: serial@300000 {
0107                                 compatible = "sprd,sc9860-uart",
0108                                              "sprd,sc9836-uart";
0109                                 reg = <0x300000 0x100>;
0110                                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
0111                                 clock-names = "enable", "uart", "source";
0112                                 clocks = <&apapb_gate CLK_UART3_EB>,
0113                                        <&ap_clk CLK_UART3>, <&ext_26m>;
0114                                 status = "disabled";
0115                         };
0116                 };
0117 
0118                 ap-ahb {
0119                         compatible = "simple-bus";
0120                         #address-cells = <2>;
0121                         #size-cells = <2>;
0122                         ranges;
0123 
0124                         ap_dma: dma-controller@20100000 {
0125                                 compatible = "sprd,sc9860-dma";
0126                                 reg = <0 0x20100000 0 0x4000>;
0127                                 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
0128                                 #dma-cells = <1>;
0129                                 /* For backwards compatibility: */
0130                                 #dma-channels = <32>;
0131                                 dma-channels = <32>;
0132                                 clock-names = "enable";
0133                                 clocks = <&apahb_gate CLK_DMA_EB>;
0134                         };
0135 
0136                         sdio3: sdio@50430000 {
0137                                 compatible = "sprd,sdhci-r11";
0138                                 reg = <0 0x50430000 0 0x1000>;
0139                                 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
0140 
0141                                 clock-names = "sdio", "enable", "2x_enable";
0142                                 clocks = <&aon_prediv CLK_EMMC_2X>,
0143                                        <&apahb_gate CLK_EMMC_EB>,
0144                                        <&aon_gate CLK_EMMC_2X_EN>;
0145                                 assigned-clocks = <&aon_prediv CLK_EMMC_2X>;
0146                                 assigned-clock-parents = <&clk_l0_409m6>;
0147 
0148                                 sprd,phy-delay-mmc-hs400 = <0x44 0x7f 0x2e 0x2e>;
0149                                 sprd,phy-delay-mmc-hs200 = <0x0 0x8c 0x8c 0x8c>;
0150                                 sprd,phy-delay-mmc-ddr52 = <0x3f 0x75 0x14 0x14>;
0151                                 sprd,phy-delay-mmc-hs400es = <0x3f 0x3f 0x2e 0x2e>;
0152                                 vmmc-supply = <&vddemmccore>;
0153                                 bus-width = <8>;
0154                                 non-removable;
0155                                 no-sdio;
0156                                 no-sd;
0157                                 cap-mmc-hw-reset;
0158                                 mmc-hs400-enhanced-strobe;
0159                                 mmc-hs400-1_8v;
0160                                 mmc-hs200-1_8v;
0161                                 mmc-ddr-1_8v;
0162                         };
0163                 };
0164 
0165                 aon {
0166                         compatible = "simple-bus";
0167                         #address-cells = <2>;
0168                         #size-cells = <2>;
0169                         ranges;
0170 
0171                         adi_bus: spi@40030000 {
0172                                 compatible = "sprd,sc9860-adi";
0173                                 reg = <0 0x40030000 0 0x10000>;
0174                                 hwlocks = <&hwlock 0>;
0175                                 hwlock-names = "adi";
0176                                 #address-cells = <1>;
0177                                 #size-cells = <0>;
0178                         };
0179 
0180                         timer@40050000 {
0181                                 compatible = "sprd,sc9860-timer";
0182                                 reg = <0 0x40050000 0 0x20>;
0183                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
0184                                 clocks = <&ext_32k>;
0185                         };
0186 
0187                         timer@40050020 {
0188                                 compatible = "sprd,sc9860-suspend-timer";
0189                                 reg = <0 0x40050020 0 0x20>;
0190                                 clocks = <&ext_32k>;
0191                         };
0192 
0193                         hwlock: hwspinlock@40500000 {
0194                                 compatible = "sprd,hwspinlock-r3p0";
0195                                 reg = <0 0x40500000 0 0x1000>;
0196                                 #hwlock-cells = <1>;
0197                                 clock-names = "enable";
0198                                 clocks = <&aon_gate CLK_SPLK_EB>;
0199                         };
0200 
0201                         eic_debounce: gpio@40210000 {
0202                                 compatible = "sprd,sc9860-eic-debounce";
0203                                 reg = <0 0x40210000 0 0x80>;
0204                                 gpio-controller;
0205                                 #gpio-cells = <2>;
0206                                 interrupt-controller;
0207                                 #interrupt-cells = <2>;
0208                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
0209                         };
0210 
0211                         eic_latch: gpio@40210080 {
0212                                 compatible = "sprd,sc9860-eic-latch";
0213                                 reg = <0 0x40210080 0 0x20>;
0214                                 gpio-controller;
0215                                 #gpio-cells = <2>;
0216                                 interrupt-controller;
0217                                 #interrupt-cells = <2>;
0218                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
0219                         };
0220 
0221                         eic_async: gpio@402100a0 {
0222                                 compatible = "sprd,sc9860-eic-async";
0223                                 reg = <0 0x402100a0 0 0x20>;
0224                                 gpio-controller;
0225                                 #gpio-cells = <2>;
0226                                 interrupt-controller;
0227                                 #interrupt-cells = <2>;
0228                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
0229                         };
0230 
0231                         eic_sync: gpio@402100c0 {
0232                                 compatible = "sprd,sc9860-eic-sync";
0233                                 reg = <0 0x402100c0 0 0x20>;
0234                                 gpio-controller;
0235                                 #gpio-cells = <2>;
0236                                 interrupt-controller;
0237                                 #interrupt-cells = <2>;
0238                                 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
0239                         };
0240 
0241                         ap_gpio: gpio@40280000 {
0242                                 compatible = "sprd,sc9860-gpio";
0243                                 reg = <0 0x40280000 0 0x1000>;
0244                                 gpio-controller;
0245                                 #gpio-cells = <2>;
0246                                 interrupt-controller;
0247                                 #interrupt-cells = <2>;
0248                                 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
0249                         };
0250 
0251                         pin_controller: pinctrl@402a0000 {
0252                                 compatible = "sprd,sc9860-pinctrl";
0253                                 reg = <0 0x402a0000 0 0x10000>;
0254                         };
0255 
0256                         watchdog@40310000 {
0257                                 compatible = "sprd,sp9860-wdt";
0258                                 reg = <0 0x40310000 0 0x1000>;
0259                                 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
0260                                 timeout-sec = <12>;
0261                                 clock-names = "enable", "rtc_enable";
0262                                 clocks = <&aon_gate CLK_APCPU_WDG_EB>,
0263                                        <&aon_gate CLK_AP_WDG_RTC_EB>;
0264                         };
0265                 };
0266 
0267                 agcp {
0268                         compatible = "simple-bus";
0269                         #address-cells = <2>;
0270                         #size-cells = <2>;
0271                         ranges;
0272 
0273                         agcp_dma: dma-controller@41580000 {
0274                                 compatible = "sprd,sc9860-dma";
0275                                 reg = <0 0x41580000 0 0x4000>;
0276                                 #dma-cells = <1>;
0277                                 /* For backwards compatibility: */
0278                                 #dma-channels = <32>;
0279                                 dma-channels = <32>;
0280                                 clock-names = "enable", "ashb_eb";
0281                                 clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,
0282                                        <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
0283                         };
0284                 };
0285         };
0286 
0287         ext_32k: ext_32k {
0288                 compatible = "fixed-clock";
0289                 #clock-cells = <0>;
0290                 clock-frequency = <32768>;
0291                 clock-output-names = "ext-32k";
0292         };
0293 
0294         ext_26m: ext_26m {
0295                 compatible = "fixed-clock";
0296                 #clock-cells = <0>;
0297                 clock-frequency = <26000000>;
0298                 clock-output-names = "ext-26m";
0299         };
0300 
0301         ext_rco_100m: ext_rco_100m {
0302                 compatible = "fixed-clock";
0303                 #clock-cells = <0>;
0304                 clock-frequency = <100000000>;
0305                 clock-output-names = "ext-rco-100m";
0306         };
0307 
0308         clk_l0_409m6: clk_l0_409m6 {
0309                 compatible = "fixed-clock";
0310                 #clock-cells = <0>;
0311                 clock-frequency = <409600000>;
0312                 clock-output-names = "ext-409m6";
0313         };
0314 };