arm64/socionext/uniphier-pxs3-ref.dts

0001 // SPDX-License-Identifier: GPL-2.0+ OR MIT
0002 //
0003 // Device Tree Source for UniPhier PXs3 Reference Board
0004 //
0005 // Copyright (C) 2017 Socionext Inc.
0006 //   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
0007
0008 /dts-v1/;
0009 #include "uniphier-pxs3.dtsi"
0010 #include "uniphier-support-card.dtsi"
0011
0012 / {
0013         model = "UniPhier PXs3 Reference Board";
0014         compatible = "socionext,uniphier-pxs3-ref", "socionext,uniphier-pxs3";
0015
0016         chosen {
0017                 stdout-path = "serial0:115200n8";
0018         };
0019
0020         aliases {
0021                 serial0 = &serial0;
0022                 serial1 = &serialsc;
0023                 serial2 = &serial2;
0024                 serial3 = &serial3;
0025                 i2c0 = &i2c0;
0026                 i2c1 = &i2c1;
0027                 i2c2 = &i2c2;
0028                 i2c3 = &i2c3;
0029                 i2c6 = &i2c6;
0030                 spi0 = &spi0;
0031                 spi1 = &spi1;
0032                 ethernet0 = &eth0;
0033                 ethernet1 = &eth1;
0034         };
0035
0036         memory@80000000 {
0037                 device_type = "memory";
0038                 reg = <0 0x80000000 0 0xa0000000>;
0039         };
0040 };
0041
0042 &ethsc {
0043         interrupts = <4 8>;
0044 };
0045
0046 &serialsc {
0047         interrupts = <4 8>;
0048 };
0049
0050 &spi0 {
0051         status = "okay";
0052 };
0053
0054 &spi1 {
0055         status = "okay";
0056 };
0057
0058 &serial0 {
0059         status = "okay";
0060 };
0061
0062 &serial2 {
0063         status = "okay";
0064 };
0065
0066 &serial3 {
0067         status = "okay";
0068 };
0069
0070 &gpio {
0071         xirq4 {
0072                 gpio-hog;
0073                 gpios = <UNIPHIER_GPIO_IRQ(4) 0>;
0074                 input;
0075         };
0076 };
0077
0078 &i2c0 {
0079         status = "okay";
0080 };
0081
0082 &i2c1 {
0083         status = "okay";
0084 };
0085
0086 &i2c2 {
0087         status = "okay";
0088 };
0089
0090 &i2c3 {
0091         status = "okay";
0092 };
0093
0094 &sd {
0095         status = "okay";
0096 };
0097
0098 &eth0 {
0099         status = "okay";
0100         phy-handle = <&ethphy0>;
0101 };
0102
0103 &mdio0 {
0104         ethphy0: ethernet-phy@0 {
0105                 reg = <0>;
0106         };
0107 };
0108
0109 &eth1 {
0110         status = "okay";
0111         phy-handle = <&ethphy1>;
0112 };
0113
0114 &mdio1 {
0115         ethphy1: ethernet-phy@0 {
0116                 reg = <0>;
0117         };
0118 };
0119
0120 &usb0 {
0121         status = "okay";
0122 };
0123
0124 &usb1 {
0125         status = "okay";
0126 };
0127
0128 &pcie {
0129         status = "okay";
0130 };
0131
0132 &nand {
0133         status = "okay";
0134
0135         nand@0 {
0136                 reg = <0>;
0137         };
0138 };
0139
0140 &pinctrl_ether_rgmii {
0141         tx {
0142                 pins = "RGMII0_TXCLK", "RGMII0_TXD0", "RGMII0_TXD1",
0143                        "RGMII0_TXD2", "RGMII0_TXD3", "RGMII0_TXCTL";
0144                 drive-strength = <9>;
0145         };
0146 };
0147
0148 &pinctrl_ether1_rgmii {
0149         tx {
0150                 pins = "RGMII1_TXCLK", "RGMII1_TXD0", "RGMII1_TXD1",
0151                        "RGMII1_TXD2", "RGMII1_TXD3", "RGMII1_TXCTL";
0152                 drive-strength = <9>;
0153         };
0154 };