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OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
0002 /*
0003  * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
0004  * Copyright (c) 2020 Engicam srl
0005  * Copyright (c) 2020 Amarula Solutions(India)
0006  */
0007 
0008 /dts-v1/;
0009 #include "px30.dtsi"
0010 #include "px30-engicam-edimm2.2.dtsi"
0011 #include "px30-engicam-px30-core.dtsi"
0012 
0013 / {
0014         model = "Engicam PX30.Core EDIMM2.2 Starter Kit";
0015         compatible = "engicam,px30-core-edimm2.2", "engicam,px30-core",
0016                      "rockchip,px30";
0017 
0018         chosen {
0019                 stdout-path = "serial2:115200n8";
0020         };
0021 };
0022 
0023 &pinctrl {
0024         bt {
0025                 bt_enable_h: bt-enable-h {
0026                         rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
0027                 };
0028         };
0029 
0030         sdio-pwrseq {
0031                 wifi_enable_h: wifi-enable-h {
0032                         rockchip,pins = <1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
0033                 };
0034         };
0035 };
0036 
0037 &sdio_pwrseq {
0038         reset-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>;
0039 };
0040 
0041 &vcc3v3_btreg {
0042         enable-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
0043 };