0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003 * Device Tree Source for the Salvator-X 2nd version board
0004 *
0005 * Copyright (C) 2015-2017 Renesas Electronics Corp.
0006 */
0007
0008 #include "salvator-common.dtsi"
0009
0010 / {
0011 model = "Renesas Salvator-X 2nd version board";
0012 compatible = "renesas,salvator-xs";
0013 };
0014
0015 &extal_clk {
0016 clock-frequency = <16640000>;
0017 };
0018
0019 &i2c4 {
0020 clock-frequency = <400000>;
0021
0022 versaclock6: clock-generator@6a {
0023 compatible = "idt,5p49v6901";
0024 reg = <0x6a>;
0025 #clock-cells = <1>;
0026 clocks = <&x23_clk>;
0027 clock-names = "xin";
0028 };
0029 };
0030
0031 #ifdef SOC_HAS_SATA
0032 &pca9654 {
0033 pcie-sata-switch-hog {
0034 gpio-hog;
0035 gpios = <7 GPIO_ACTIVE_HIGH>;
0036 output-low; /* enable SATA by default */
0037 line-name = "PCIE/SATA switch";
0038 };
0039 };
0040
0041 /* SW12-7 must be set 'Off' (MD12 set to 1) which is not the default! */
0042 #endif /* SOC_HAS_SATA */
0043
0044 #ifdef SOC_HAS_USB2_CH3
0045 &ehci3 {
0046 dr_mode = "otg";
0047 status = "okay";
0048 };
0049
0050 &hsusb3 {
0051 dr_mode = "otg";
0052 status = "okay";
0053 };
0054
0055 &ohci3 {
0056 dr_mode = "otg";
0057 status = "okay";
0058 };
0059
0060 &pfc {
0061 /*
0062 * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
0063 * (when SW31 is the default setting on Salvator-XS).
0064 * - If SW31 is the default setting, you cannot use USB2.0 ch3 on
0065 * r8a77951 with Salvator-XS.
0066 * Hence the SW31 setting must be changed like 2) below.
0067 * 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
0068 * - Connect GP6_3[01] to ADV7842.
0069 * 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
0070 * - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
0071 * - Connect GP6_{04,21} to ADV7842.
0072 */
0073 usb2_ch3_pins: usb2_ch3 {
0074 groups = "usb2_ch3";
0075 function = "usb2_ch3";
0076 };
0077 };
0078
0079 &usb2_phy3 {
0080 pinctrl-0 = <&usb2_ch3_pins>;
0081 pinctrl-names = "default";
0082
0083 status = "okay";
0084 };
0085 #endif /* SOC_HAS_USB2_CH3 */
