Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 /*
0003  * Device Tree Source for the RZ/G2LC SMARC pincontrol parts
0004  *
0005  * Copyright (C) 2021 Renesas Electronics Corp.
0006  */
0007 
0008 #include <dt-bindings/gpio/gpio.h>
0009 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
0010 
0011 &pinctrl {
0012         pinctrl-0 = <&sound_clk_pins>;
0013         pinctrl-names = "default";
0014 
0015 #if SW_SCIF_CAN
0016         /* SW8 should be at position 2->1 */
0017         can1_pins: can1 {
0018                 pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
0019                          <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
0020         };
0021 #endif
0022 
0023 #if SW_RSPI_CAN
0024         /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
0025         can1-stb-hog {
0026                 gpio-hog;
0027                 gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>;
0028                 output-low;
0029                 line-name = "can1_stb";
0030         };
0031 
0032         can1_pins: can1 {
0033                 pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
0034                          <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
0035         };
0036 #endif
0037 
0038         i2c0_pins: i2c0 {
0039                 pins = "RIIC0_SDA", "RIIC0_SCL";
0040                 input-enable;
0041         };
0042 
0043         i2c1_pins: i2c1 {
0044                 pins = "RIIC1_SDA", "RIIC1_SCL";
0045                 input-enable;
0046         };
0047 
0048         i2c2_pins: i2c2 {
0049                 pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
0050                          <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
0051         };
0052 
0053         scif0_pins: scif0 {
0054                 pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
0055                          <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
0056         };
0057 
0058         scif1_pins: scif1 {
0059                 pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
0060                          <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
0061                          <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
0062                          <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
0063         };
0064 
0065         sd1-pwr-en-hog {
0066                 gpio-hog;
0067                 gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
0068                 output-high;
0069                 line-name = "sd1_pwr_en";
0070         };
0071 
0072         sdhi1_pins: sd1 {
0073                 sd1_data {
0074                         pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
0075                         power-source = <3300>;
0076                 };
0077 
0078                 sd1_ctrl {
0079                         pins = "SD1_CLK", "SD1_CMD";
0080                         power-source = <3300>;
0081                 };
0082 
0083                 sd1_mux {
0084                         pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
0085                 };
0086         };
0087 
0088         sdhi1_pins_uhs: sd1_uhs {
0089                 sd1_data_uhs {
0090                         pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
0091                         power-source = <1800>;
0092                 };
0093 
0094                 sd1_ctrl_uhs {
0095                         pins = "SD1_CLK", "SD1_CMD";
0096                         power-source = <1800>;
0097                 };
0098 
0099                 sd1_mux_uhs {
0100                         pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
0101                 };
0102         };
0103 
0104         sound_clk_pins: sound_clk {
0105                 pins = "AUDIO_CLK1", "AUDIO_CLK2";
0106                 input-enable;
0107         };
0108 
0109         spi1_pins: spi1 {
0110                 pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
0111                          <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
0112                          <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
0113                          <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
0114         };
0115 
0116         ssi0_pins: ssi0 {
0117                 pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
0118                          <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
0119                          <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
0120                          <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
0121         };
0122 
0123         usb0_pins: usb0 {
0124                 pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
0125                          <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
0126                          <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
0127         };
0128 
0129         usb1_pins: usb1 {
0130                 pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
0131                          <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
0132         };
0133 };
0134