0001 // SPDX-License-Identifier: (GPL-2.0 or MIT)
0002 /*
0003 * Device Tree Source for the Spider CPU board
0004 *
0005 * Copyright (C) 2021 Renesas Electronics Corp.
0006 */
0007
0008 #include "r8a779f0.dtsi"
0009
0010 / {
0011 model = "Renesas Spider CPU board";
0012 compatible = "renesas,spider-cpu", "renesas,r8a779f0";
0013
0014 memory@48000000 {
0015 device_type = "memory";
0016 /* first 128MB is reserved for secure area. */
0017 reg = <0x0 0x48000000 0x0 0x78000000>;
0018 };
0019
0020 memory@480000000 {
0021 device_type = "memory";
0022 reg = <0x4 0x80000000 0x0 0x80000000>;
0023 };
0024 };
0025
0026 &extal_clk {
0027 clock-frequency = <20000000>;
0028 };
0029
0030 &extalr_clk {
0031 clock-frequency = <32768>;
0032 };
0033
0034 &i2c4 {
0035 pinctrl-0 = <&i2c4_pins>;
0036 pinctrl-names = "default";
0037
0038 status = "okay";
0039 clock-frequency = <400000>;
0040
0041 eeprom@50 {
0042 compatible = "rohm,br24g01", "atmel,24c01";
0043 label = "cpu-board";
0044 reg = <0x50>;
0045 pagesize = <8>;
0046 };
0047 };
0048
0049 &pfc {
0050 pinctrl-0 = <&scif_clk_pins>;
0051 pinctrl-names = "default";
0052
0053 i2c4_pins: i2c4 {
0054 groups = "i2c4";
0055 function = "i2c4";
0056 };
0057
0058 scif0_pins: scif0 {
0059 groups = "scif0_data", "scif0_ctrl";
0060 function = "scif0";
0061 };
0062
0063 scif3_pins: scif3 {
0064 groups = "scif3_data", "scif3_ctrl";
0065 function = "scif3";
0066 };
0067
0068 scif_clk_pins: scif_clk {
0069 groups = "scif_clk";
0070 function = "scif_clk";
0071 };
0072 };
0073
0074 &rwdt {
0075 timeout-sec = <60>;
0076 status = "okay";
0077 };
0078
0079 &scif0 {
0080 pinctrl-0 = <&scif0_pins>;
0081 pinctrl-names = "default";
0082
0083 uart-has-rtscts;
0084 status = "okay";
0085 };
0086
0087 &scif3 {
0088 pinctrl-0 = <&scif3_pins>;
0089 pinctrl-names = "default";
0090
0091 uart-has-rtscts;
0092 status = "okay";
0093 };
0094
0095 &scif_clk {
0096 clock-frequency = <24000000>;
0097 };
